Commit 4eb10671 authored by Hugo Villeneuve's avatar Hugo Villeneuve Committed by Kevin Hilman

Add support for VLYNQ module clock.

Signed-off-by: default avatarHugo Villeneuve <hugo@hugovil.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent 1c9abb28
......@@ -322,6 +322,11 @@ static struct clk davinci_clks[] = {
.rate = &commonrate,
.lpsc = DAVINCI_LPSC_USB,
},
{
.name = "VLYNQCLK",
.rate = &commonrate,
.lpsc = DAVINCI_LPSC_VLYNQ,
},
{
.name = "AEMIFCLK",
.rate = &commonrate,
......
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