Merge branch 'tusb-search-replace'

drivers/usb/musb/cppi_dma.h

@@ -65,7 +65,7 @@ struct cppi_channel {
 	struct cppi		*pController;
 
 	/* which direction of which endpoint? */
-	struct musb_hw_ep	*pEndPt;
+	struct musb_hw_ep	*hw_ep;
 	u8			bTransmit;
 	u8			chNo;
 

drivers/usb/musb/davinci.c

@@ -116,7 +116,7 @@ void musb_platform_disable(struct musb *musb)
 			  DAVINCI_USB_USBINT_MASK
 			| DAVINCI_USB_TXINT_MASK
 			| DAVINCI_USB_RXINT_MASK);
-	musb_writeb(musb->pRegs, MGC_O_HDRC_DEVCTL, 0);
+	musb_writeb(musb->mregs, MGC_O_HDRC_DEVCTL, 0);
 	musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
 
 	if (is_dma_capable() && !dma_off)
@@ -200,7 +200,7 @@ static struct timer_list otg_workaround;
 static void otg_timer(unsigned long _musb)
 {
 	struct musb		*musb = (void *)_musb;
-	void	*__iomem	mregs = musb->pRegs;
+	void	*__iomem	mregs = musb->mregs;
 	u8			devctl;
 	unsigned long		flags;
 
@@ -210,7 +210,7 @@ static void otg_timer(unsigned long _musb)
 	devctl = musb_readb(mregs, MGC_O_HDRC_DEVCTL);
 	DBG(7, "poll devctl %02x (%s)\n", devctl, otg_state_string(musb));
 
-	spin_lock_irqsave(&musb->Lock, flags);
+	spin_lock_irqsave(&musb->lock, flags);
 	switch (musb->xceiv.state) {
 	case OTG_STATE_A_WAIT_VFALL:
 		/* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
@@ -252,7 +252,7 @@ static void otg_timer(unsigned long _musb)
 	default:
 		break;
 	}
-	spin_unlock_irqrestore(&musb->Lock, flags);
+	spin_unlock_irqrestore(&musb->lock, flags);
 }
 
 static irqreturn_t davinci_interrupt(int irq, void *__hci)
@@ -263,7 +263,7 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci)
 	void		*__iomem tibase = musb->ctrl_base;
 	u32		tmp;
 
-	spin_lock_irqsave(&musb->Lock, flags);
+	spin_lock_irqsave(&musb->lock, flags);
 
 	/* NOTE: DaVinci shadows the Mentor IRQs.  Don't manage them through
 	 * the Mentor registers (except for setup), use the TI ones and EOI.
@@ -309,7 +309,7 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci)
 	 */
 	if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) {
 		int	drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);
-		void	*__iomem mregs = musb->pRegs;
+		void	*__iomem mregs = musb->mregs;
 		u8	devctl = musb_readb(mregs, MGC_O_HDRC_DEVCTL);
 		int	err = musb->int_usb & MGC_M_INTR_VBUSERROR;
 
@@ -366,7 +366,7 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci)
 			&& musb->xceiv.state == OTG_STATE_B_IDLE)
 		mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
 
-	spin_unlock_irqrestore(&musb->Lock, flags);
+	spin_unlock_irqrestore(&musb->lock, flags);
 
 	/* REVISIT we sometimes get unhandled IRQs
 	 * (e.g. ep0).  not clear why...
@@ -381,7 +381,7 @@ int __init musb_platform_init(struct musb *musb)
 	void	*__iomem tibase = musb->ctrl_base;
 	u32	revision;
 
-	musb->pRegs += DAVINCI_BASE_OFFSET;
+	musb->mregs += DAVINCI_BASE_OFFSET;
 #if 0
 	/* REVISIT there's something odd about clocking, this
 	 * didn't appear do the job ...
@@ -440,7 +440,7 @@ int musb_platform_exit(struct musb *musb)
 		 * long time to fall, especially on EVM with huge C133.
 		 */
 		do {
-			devctl = musb_readb(musb->pRegs, MGC_O_HDRC_DEVCTL);
+			devctl = musb_readb(musb->mregs, MGC_O_HDRC_DEVCTL);
 			if (!(devctl & MGC_M_DEVCTL_VBUS))
 				break;
 			if ((devctl & MGC_M_DEVCTL_VBUS) != warn) {

drivers/usb/musb/davinci.h

@@ -64,10 +64,10 @@
 /* CPPI state RAM entries */
 #define DAVINCI_CPPI_STATERAM_BASE_OFFSET   0x100
 
-#define DAVINCI_TXCPPI_STATERAM_OFFSET(channelNum) \
-	(DAVINCI_CPPI_STATERAM_BASE_OFFSET +       ((channelNum)* 0x40))
-#define DAVINCI_RXCPPI_STATERAM_OFFSET(channelNum) \
-	(DAVINCI_CPPI_STATERAM_BASE_OFFSET + 0x20 +((channelNum)* 0x40))
+#define DAVINCI_TXCPPI_STATERAM_OFFSET(chnum) \
+	(DAVINCI_CPPI_STATERAM_BASE_OFFSET +       ((chnum)* 0x40))
+#define DAVINCI_RXCPPI_STATERAM_OFFSET(chnum) \
+	(DAVINCI_CPPI_STATERAM_BASE_OFFSET + 0x20 +((chnum)* 0x40))
 
 /* CPPI masks */
 #define DAVINCI_DMA_CTRL_ENABLE		1

drivers/usb/musb/dma.h

@@ -100,23 +100,23 @@ struct dma_controller;
 
 /**
  * struct dma_channel - A DMA channel.
- * @pPrivateData: channel-private data
+ * @private_data: channel-private data
  * @wMaxLength: the maximum number of bytes the channel can move in one
  *	transaction (typically representing many USB maximum-sized packets)
- * @dwActualLength: how many bytes have been transferred
- * @bStatus: current channel status (updated e.g. on interrupt)
- * @bDesiredMode: TRUE if mode 1 is desired; FALSE if mode 0 is desired
+ * @actual_len: how many bytes have been transferred
+ * @status: current channel status (updated e.g. on interrupt)
+ * @desired_mode: TRUE if mode 1 is desired; FALSE if mode 0 is desired
  *
  * channels are associated with an endpoint for the duration of at least
  * one usb transfer.
  */
 struct dma_channel {
-	void			*pPrivateData;
+	void			*private_data;
 	// FIXME not void* private_data, but a dma_controller *
-	size_t			dwMaxLength;
-	size_t			dwActualLength;
-	enum dma_channel_status	bStatus;
-	u8			bDesiredMode;
+	size_t			max_len;
+	size_t			actual_len;
+	enum dma_channel_status	status;
+	u8			desired_mode;
 };
 
 /*
@@ -126,17 +126,17 @@ struct dma_channel {
  *
  * @channel: pointer to a channel obtained by channel_alloc
  * @maxpacket: the maximum packet size
- * @bMode: TRUE if mode 1; FALSE if mode 0
+ * @mode: TRUE if mode 1; FALSE if mode 0
  * @dma_addr: base address of data (in DMA space)
  * @length: the number of bytes to transfer; no larger than the channel's
- *	reported dwMaxLength
+ *	reported max_len
  *
  * Returns TRUE on success, else FALSE
  */
-typedef int (*MGC_pfDmaProgramChannel) (
+typedef int (*dma_program_channel) (
 		struct dma_channel	*channel,
 		u16			maxpacket,
-		u8			bMode,
+		u8			mode,
 		dma_addr_t		dma_addr,
 		u32			length);
 
@@ -151,12 +151,12 @@ typedef int (*MGC_pfDmaProgramChannel) (
 static inline enum dma_channel_status
 dma_channel_status(struct dma_channel *c)
 {
-	return (is_dma_capable() && c) ? c->bStatus : MGC_DMA_STATUS_UNKNOWN;
+	return (is_dma_capable() && c) ? c->status : MGC_DMA_STATUS_UNKNOWN;
 }
 
 /**
  * struct dma_controller - A DMA Controller.
- * @pPrivateData: controller-private data;
+ * @private_data: controller-private data;
  * @start: call this to start a DMA controller;
  *	return 0 on success, else negative errno
  * @stop: call this to stop a DMA controller
@@ -169,18 +169,18 @@ dma_channel_status(struct dma_channel *c)
  * Controllers manage dma channels.
  */
 struct dma_controller {
-	void			*pPrivateData;
+	void			*private_data;
 	int			(*start)(struct dma_controller *);
 	int			(*stop)(struct dma_controller *);
 	struct dma_channel	*(*channel_alloc)(struct dma_controller *,
 					struct musb_hw_ep *, u8 is_tx);
 	void			(*channel_release)(struct dma_channel *);
-	MGC_pfDmaProgramChannel	channel_program;
+	dma_program_channel	channel_program;
 	int			(*channel_abort)(struct dma_channel *);
 };
 
 /* called after channel_program(), may indicate a fault */
-extern void musb_dma_completion(struct musb *musb, u8 bLocalEnd, u8 bTransmit);
+extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 bTransmit);
 
 
 extern struct dma_controller *__init

drivers/usb/musb/musb_gadget.h

@@ -38,8 +38,8 @@ struct musb_request {
 	struct usb_request	request;
 	struct musb_ep		*ep;
 	struct musb		*musb;
-	u8 bTx;			/* endpoint direction */
-	u8 bEnd;
+	u8 tx;			/* endpoint direction */
+	u8 epnum;
 	u8 mapped;
 };
 
@@ -61,13 +61,13 @@ struct musb_ep {
 	struct usb_ep			end_point;
 	char				name[12];
 	struct musb_hw_ep		*hw_ep;
-	struct musb			*pThis;
-	u8				bEndNumber;
+	struct musb			*musb;
+	u8				current_epnum;
 
 	/* ... when enabled/disabled ... */
 	u8				type;
 	u8				is_in;
-	u16				wPacketSize;
+	u16				packet_sz;
 	const struct usb_endpoint_descriptor	*desc;
 	struct dma_channel		*dma;
 
@@ -92,8 +92,8 @@ static inline struct usb_request *next_request(struct musb_ep *ep)
 	return container_of(queue->next, struct usb_request, list);
 }
 
-extern void musb_g_tx(struct musb *pThis, u8 bEnd);
-extern void musb_g_rx(struct musb *pThis, u8 bEnd);
+extern void musb_g_tx(struct musb *musb, u8 epnum);
+extern void musb_g_rx(struct musb *musb, u8 epnum);
 
 extern const struct usb_ep_ops musb_g_ep0_ops;
 

drivers/usb/musb/musbhdrc.h

@@ -61,7 +61,7 @@
 #define MGC_O_HDRC_INDEX        0x0E	/* 8 bit */
 #define MGC_O_HDRC_TESTMODE     0x0F	/* 8 bit */
 
-/* Get offset for a given FIFO from musb->pRegs */
+/* Get offset for a given FIFO from musb->mregs */
 #ifdef	CONFIG_USB_TUSB6010
 #define MUSB_FIFO_OFFSET(epnum)	(0x200 + ((epnum) * 0x20))
 #else
@@ -107,16 +107,16 @@
 #define MGC_O_HDRC_CONFIGDATA	MGC_O_HDRC_FIFOSIZE	/* re-used for EP0 */
 
 /* offsets to endpoint registers in indexed model (using INDEX register) */
-#define MGC_INDEXED_OFFSET(_bEnd, _bOffset)	\
+#define MGC_INDEXED_OFFSET(_epnum, _bOffset)	\
 	(0x10                   + (_bOffset))
 
 /* offsets to endpoint registers in flat models */
-#define MGC_FLAT_OFFSET(_bEnd, _bOffset)	\
-	(0x100 + (0x10*(_bEnd)) + (_bOffset))
+#define MGC_FLAT_OFFSET(_epnum, _bOffset)	\
+	(0x100 + (0x10*(_epnum)) + (_bOffset))
 
 #ifdef CONFIG_USB_TUSB6010
 /* TUSB6010 EP0 configuration register is special */
-#define MGC_TUSB_OFFSET(_bEnd, _bOffset)	\
+#define MGC_TUSB_OFFSET(_epnum, _bOffset)	\
 	(0x10 + _bOffset)
 #include "tusb6010.h"		/* needed "only" for TUSB_EP0_CONF */
 #endif
@@ -130,8 +130,8 @@
 #define MGC_O_HDRC_RXHUBADDR	0x06
 #define MGC_O_HDRC_RXHUBPORT	0x07
 
-#define MGC_BUSCTL_OFFSET(_bEnd, _bOffset) \
-	(0x80 + (8*(_bEnd)) + (_bOffset))
+#define MGC_BUSCTL_OFFSET(_epnum, _bOffset) \
+	(0x80 + (8*(_epnum)) + (_bOffset))
 
 /*
  *     MUSBHDRC Register bit masks

drivers/usb/musb/omap2430.c

@@ -59,7 +59,7 @@ static void omap_set_vbus(struct musb *musb, int is_on)
 	 * that must be ignored.
 	 */
 
-	devctl = musb_readb(musb->pRegs, MGC_O_HDRC_DEVCTL);
+	devctl = musb_readb(musb->mregs, MGC_O_HDRC_DEVCTL);
 
 	if (is_on) {
 		musb->is_active = 1;
@@ -81,12 +81,12 @@ static void omap_set_vbus(struct musb *musb, int is_on)
 
 		MUSB_DEV_MODE(musb);
 	}
-	musb_writeb(musb->pRegs, MGC_O_HDRC_DEVCTL, devctl);
+	musb_writeb(musb->mregs, MGC_O_HDRC_DEVCTL, devctl);
 
 	DBG(1, "VBUS %s, devctl %02x "
 		/* otg %3x conf %08x prcm %08x */ "\n",
 		otg_state_string(musb),
-		musb_readb(musb->pRegs, MGC_O_HDRC_DEVCTL));
+		musb_readb(musb->mregs, MGC_O_HDRC_DEVCTL));
 }
 static int omap_set_power(struct otg_transceiver *x, unsigned mA)
 {