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Commit 4ba64c1b authored by Alan Cox's avatar Alan Cox Committed by Greg Kroah-Hartman
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Staging: et131x: clean up the pkt_desc_stat_t types 

Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 8a66278c
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Showing with 70 additions and 119 deletions
drivers/staging/et131x/et1310_rx.c
View file @ 4ba64c1b
......@@ -193,7 +193,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
&rx_ring->Fbr1Realpa,
&rx_ring->Fbr1offset, 0x0FFF);
rx_ring->pFbr1RingVa = (void *)((uint8_t *) rx_ring->pFbr1RingVa +
rx_ring->pFbr1RingVa = (void *)((u8 *) rx_ring->pFbr1RingVa +
rx_ring->Fbr1offset);
#ifdef USE_FBR0
......@@ -222,7 +222,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
&rx_ring->Fbr0Realpa,
&rx_ring->Fbr0offset, 0x0FFF);
rx_ring->pFbr0RingVa = (void *)((uint8_t *) rx_ring->pFbr0RingVa +
rx_ring->pFbr0RingVa = (void *)((u8 *) rx_ring->pFbr0RingVa +
rx_ring->Fbr0offset);
#endif
......@@ -270,7 +270,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
* access later
*/
rx_ring->fbr[1]->virt[index] =
(uint8_t *) rx_ring->Fbr1MemVa[i] +
(u8 *) rx_ring->Fbr1MemVa[i] +
(j * rx_ring->Fbr1BufferSize) + Fbr1Offset;
/* now store the physical address in the descriptor
......@@ -319,7 +319,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
u32 index = (i * FBR_CHUNKS) + j;
rx_ring->fbr[0]->virt[index] =
(uint8_t *) rx_ring->Fbr0MemVa[i] +
(u8 *) rx_ring->Fbr0MemVa[i] +
(j * rx_ring->Fbr0BufferSize) + Fbr0Offset;
rx_ring->fbr[0]->bus_high[index] =
......@@ -338,7 +338,7 @@ int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter)
/* Allocate an area of memory for FIFO of Packet Status ring entries */
pktStatRingSize =
sizeof(PKT_STAT_DESC_t) * adapter->RxRing.PsrNumEntries;
sizeof(struct pkt_stat_desc) * adapter->RxRing.PsrNumEntries;
rx_ring->pPSRingVa = pci_alloc_consistent(adapter->pdev,
pktStatRingSize,
......@@ -446,7 +446,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
}
/* Now the FIFO itself */
rx_ring->pFbr1RingVa = (void *)((uint8_t *)
rx_ring->pFbr1RingVa = (void *)((u8 *)
rx_ring->pFbr1RingVa - rx_ring->Fbr1offset);
bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr1NumEntries)
......@@ -479,7 +479,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
}
/* Now the FIFO itself */
rx_ring->pFbr0RingVa = (void *)((uint8_t *)
rx_ring->pFbr0RingVa = (void *)((u8 *)
rx_ring->pFbr0RingVa - rx_ring->Fbr0offset);
bufsize = (sizeof(struct fbr_desc) * rx_ring->Fbr0NumEntries)
......@@ -496,7 +496,7 @@ void et131x_rx_dma_memory_free(struct et131x_adapter *adapter)
/* Free Packet Status Ring */
if (rx_ring->pPSRingVa) {
pktStatRingSize =
sizeof(PKT_STAT_DESC_t) * adapter->RxRing.PsrNumEntries;
sizeof(struct pkt_stat_desc) * adapter->RxRing.PsrNumEntries;
pci_free_consistent(adapter->pdev, pktStatRingSize,
rx_ring->pPSRingVa, rx_ring->pPSRingPa);
......@@ -785,16 +785,16 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev)
{
struct _rx_ring_t *rx_local = &etdev->RxRing;
struct rx_status_block *status;
PPKT_STAT_DESC_t psr;
struct pkt_stat_desc *psr;
PMP_RFD rfd;
u32 i;
uint8_t *buf;
u8 *buf;
unsigned long flags;
struct list_head *element;
uint8_t rindex;
uint16_t bindex;
u8 rindex;
u16 bindex;
u32 len;
PKT_STAT_DESC_WORD0_t Word0;
u32 word0;
u32 word1;
/* RX Status block is written by the DMA engine prior to every
......@@ -810,17 +810,17 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev)
return NULL;
/* The packet status ring indicates that data is available. */
psr = (PPKT_STAT_DESC_t) (rx_local->pPSRingVa) +
psr = (struct pkt_stat_desc *) (rx_local->pPSRingVa) +
(rx_local->local_psr_full & 0xFFF);
/* Grab any information that is required once the PSR is
* advanced, since we can no longer rely on the memory being
* accurate
*/
len = psr->word1.bits.length;
rindex = (uint8_t) psr->word1.bits.ri;
bindex = (uint16_t) psr->word1.bits.bi;
Word0 = psr->word0;
len = psr->word1 & 0xFFFF;
rindex = (psr->word1 >> 26) & 0x03;
bindex = (psr->word1 >> 16) & 0x3FF;
word0 = psr->word0;
/* Indicate that we have used this PSR entry. */
/* FIXME wrap 12 */
......@@ -835,9 +835,8 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev)
&etdev->regs->rxdma.psr_full_offset);
#ifndef USE_FBR0
if (rindex != 1) {
if (rindex != 1)
return NULL;
}
#endif
#ifdef USE_FBR0
......@@ -904,8 +903,8 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev)
}
/* Determine if this is a multicast packet coming in */
if ((Word0.value & ALCATEL_MULTICAST_PKT) &&
!(Word0.value & ALCATEL_BROADCAST_PKT)) {
if ((word0 & ALCATEL_MULTICAST_PKT) &&
!(word0 & ALCATEL_BROADCAST_PKT)) {
/* Promiscuous mode and Multicast mode are
* not mutually exclusive as was first
* thought. I guess Promiscuous is just
......@@ -956,7 +955,7 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev)
if (len > 0)
etdev->Stats.multircv++;
} else if (Word0.value & ALCATEL_BROADCAST_PKT)
} else if (word0 & ALCATEL_BROADCAST_PKT)
etdev->Stats.brdcstrcv++;
else
/* Not sure what this counter measures in
......@@ -1094,8 +1093,8 @@ void nic_return_rfd(struct et131x_adapter *etdev, PMP_RFD rfd)
{
struct _rx_ring_t *rx_local = &etdev->RxRing;
struct rxdma_regs __iomem *rx_dma = &etdev->regs->rxdma;
uint16_t bi = rfd->bufferindex;
uint8_t ri = rfd->ringindex;
u16 bi = rfd->bufferindex;
u8 ri = rfd->ringindex;
unsigned long flags;
/* We don't use any of the OOB data besides status. Otherwise, we
......
drivers/staging/et131x/et1310_rx.h
View file @ 4ba64c1b
......@@ -98,101 +98,53 @@ struct fbr_desc
u32 word2; /* Bits 10-31 reserved, 0-9 descriptor */
};
/* Typedefs for Packet Status Ring Descriptors */
typedef union _PKT_STAT_DESC_WORD0_t {
u32 value;
struct {
#ifdef _BIT_FIELDS_HTOL
/* top 16 bits are from the Alcatel Status Word as enumerated in */
/* PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2) */
#if 0
u32 asw_trunc:1; /* bit 31(Rx frame truncated) */
#endif
u32 asw_long_evt:1; /* bit 31(Rx long event) */
u32 asw_VLAN_tag:1; /* bit 30(VLAN tag detected) */
u32 asw_unsupported_op:1; /* bit 29(unsupported OP code) */
u32 asw_pause_frame:1; /* bit 28(is a pause frame) */
u32 asw_control_frame:1; /* bit 27(is a control frame) */
u32 asw_dribble_nibble:1; /* bit 26(spurious bits after EOP) */
u32 asw_broadcast:1; /* bit 25(has a broadcast address) */
u32 asw_multicast:1; /* bit 24(has a multicast address) */
u32 asw_OK:1; /* bit 23(valid CRC + no code error) */
u32 asw_too_long:1; /* bit 22(frame length > 1518 bytes) */
u32 asw_len_chk_err:1; /* bit 21(frame length field incorrect) */
u32 asw_CRC_err:1; /* bit 20(CRC error) */
u32 asw_code_err:1; /* bit 19(one or more nibbles signalled as errors) */
u32 asw_false_carrier_event:1; /* bit 18(bad carrier since last good packet) */
u32 asw_RX_DV_event:1; /* bit 17(short receive event detected) */
u32 asw_prev_pkt_dropped:1;/* bit 16(e.g. IFG too small on previous) */
u32 unused:5; /* bits 11-15 */
u32 vp:1; /* bit 10(VLAN Packet) */
u32 jp:1; /* bit 9(Jumbo Packet) */
u32 ft:1; /* bit 8(Frame Truncated) */
u32 drop:1; /* bit 7(Drop packet) */
u32 rxmac_error:1; /* bit 6(RXMAC Error Indicator) */
u32 wol:1; /* bit 5(WOL Event) */
u32 tcpp:1; /* bit 4(TCP checksum pass) */
u32 tcpa:1; /* bit 3(TCP checksum assist) */
u32 ipp:1; /* bit 2(IP checksum pass) */
u32 ipa:1; /* bit 1(IP checksum assist) */
u32 hp:1; /* bit 0(hash pass) */
#else
u32 hp:1; /* bit 0(hash pass) */
u32 ipa:1; /* bit 1(IP checksum assist) */
u32 ipp:1; /* bit 2(IP checksum pass) */
u32 tcpa:1; /* bit 3(TCP checksum assist) */
u32 tcpp:1; /* bit 4(TCP checksum pass) */
u32 wol:1; /* bit 5(WOL Event) */
u32 rxmac_error:1; /* bit 6(RXMAC Error Indicator) */
u32 drop:1; /* bit 7(Drop packet) */
u32 ft:1; /* bit 8(Frame Truncated) */
u32 jp:1; /* bit 9(Jumbo Packet) */
u32 vp:1; /* bit 10(VLAN Packet) */
u32 unused:5; /* bits 11-15 */
u32 asw_prev_pkt_dropped:1;/* bit 16(e.g. IFG too small on previous) */
u32 asw_RX_DV_event:1; /* bit 17(short receive event detected) */
u32 asw_false_carrier_event:1; /* bit 18(bad carrier since last good packet) */
u32 asw_code_err:1; /* bit 19(one or more nibbles signalled as errors) */
u32 asw_CRC_err:1; /* bit 20(CRC error) */
u32 asw_len_chk_err:1; /* bit 21(frame length field incorrect) */
u32 asw_too_long:1; /* bit 22(frame length > 1518 bytes) */
u32 asw_OK:1; /* bit 23(valid CRC + no code error) */
u32 asw_multicast:1; /* bit 24(has a multicast address) */
u32 asw_broadcast:1; /* bit 25(has a broadcast address) */
u32 asw_dribble_nibble:1; /* bit 26(spurious bits after EOP) */
u32 asw_control_frame:1; /* bit 27(is a control frame) */
u32 asw_pause_frame:1; /* bit 28(is a pause frame) */
u32 asw_unsupported_op:1; /* bit 29(unsupported OP code) */
u32 asw_VLAN_tag:1; /* bit 30(VLAN tag detected) */
u32 asw_long_evt:1; /* bit 31(Rx long event) */
#if 0
u32 asw_trunc:1; /* bit 31(Rx frame truncated) */
#endif
#endif
} bits;
} PKT_STAT_DESC_WORD0_t, *PPKT_STAT_WORD0_t;
typedef union _PKT_STAT_DESC_WORD1_t {
u32 value;
struct {
#ifdef _BIT_FIELDS_HTOL
u32 unused:4; /* bits 28-31 */
u32 ri:2; /* bits 26-27(Ring Index) */
u32 bi:10; /* bits 16-25(Buffer Index) */
u32 length:16; /* bit 0-15(length in bytes) */
#else
u32 length:16; /* bit 0-15(length in bytes) */
u32 bi:10; /* bits 16-25(Buffer Index) */
u32 ri:2; /* bits 26-27(Ring Index) */
u32 unused:4; /* bits 28-31 */
#endif
} bits;
} PKT_STAT_DESC_WORD1_t, *PPKT_STAT_WORD1_t;
/* Packet Status Ring Descriptors
*
* Word 0:
*
* top 16 bits are from the Alcatel Status Word as enumerated in
* PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2)
*
* 0: hp hash pass
* 1: ipa IP checksum assist
* 2: ipp IP checksum pass
* 3: tcpa TCP checksum assist
* 4: tcpp TCP checksum pass
* 5: wol WOL Event
* 6: rxmac_error RXMAC Error Indicator
* 7: drop Drop packet
* 8: ft Frame Truncated
* 9: jp Jumbo Packet
* 10: vp VLAN Packet
* 11-15: unused
* 16: asw_prev_pkt_dropped e.g. IFG too small on previous
* 17: asw_RX_DV_event short receive event detected
* 18: asw_false_carrier_event bad carrier since last good packet
* 19: asw_code_err one or more nibbles signalled as errors
* 20: asw_CRC_err CRC error
* 21: asw_len_chk_err frame length field incorrect
* 22: asw_too_long frame length > 1518 bytes
* 23: asw_OK valid CRC + no code error
* 24: asw_multicast has a multicast address
* 25: asw_broadcast has a broadcast address
* 26: asw_dribble_nibble spurious bits after EOP
* 27: asw_control_frame is a control frame
* 28: asw_pause_frame is a pause frame
* 29: asw_unsupported_op unsupported OP code
* 30: asw_VLAN_tag VLAN tag detected
* 31: asw_long_evt Rx long event
*
* Word 1:
* 0-15: length length in bytes
* 16-25: bi Buffer Index
* 26-27: ri Ring Index
* 28-31: reserved
*/
typedef struct _PKT_STAT_DESC_t {
PKT_STAT_DESC_WORD0_t word0;
PKT_STAT_DESC_WORD1_t word1;
} PKT_STAT_DESC_t, *PPKT_STAT_DESC_t;
struct pkt_stat_desc {
u32 word0;
u32 word1;
};
/* Typedefs for the RX DMA status word */
......
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