ARM: OMAP: mailbox restructure

Mailbox is restructured as below:

- OMAP1 and OMAP2 parts split out to mach-omap[1-2] respectively.
- struct mbx isolation
- Introduced device model
- Added class interface

Moved omap[1,2] specific parts in mach-omap[1,2]/
Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>

arch/arm/plat-omap/dsp/dsp_core.c

@@ -34,12 +34,13 @@
 #include "dsp_mbcmd.h"
 #include "dsp.h"
 #include "ipbuf.h"
+#include "dsp_common.h"
 
 MODULE_AUTHOR("Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>");
 MODULE_DESCRIPTION("OMAP DSP driver module");
 MODULE_LICENSE("GPL");
 
-struct mbox *mbox_dsp;
+struct omap_mbox *mbox_dsp;
 static struct sync_seq *mbseq;
 static u16 mbseq_expect_tmp;
 static u16 *mbseq_expect = &mbseq_expect_tmp;
@@ -204,7 +205,7 @@ int __dsp_mbcmd_send_exarg(struct mbcmd *mb, struct mb_exarg *arg,
 
 	mblog_add(mb, DIR_A2D);
 
-	ret = mbox_send(mbox_dsp, *(mbox_msg_t *)mb);
+	ret = omap_mbox_msg_send(mbox_dsp, *(mbox_msg_t *)mb);
 
 out:
 	mutex_unlock(&mbsend_lock);
@@ -261,7 +262,7 @@ static int mbsync_hold_mem_active;
 
 void dsp_mbox_start(void)
 {
-	mbox_init_seq(mbox_dsp);
+	omap_mbox_init_seq(mbox_dsp);
 	mbseq_expect_tmp = 0;
 }
 
@@ -301,34 +302,20 @@ int dsp_mbox_config(void *p)
 
 static int __init dsp_mbox_init(void)
 {
-	int i;
-	int ret;
-
-	for (i = 0; i < MBOX_CMD_MAX; i++) {
-		if (cmdinfo[i] != NULL) {
-			ret = register_mbox_receiver(mbox_dsp, i, mbcmd_receiver);
-			if (ret)
-				goto fail;
-		}
+	mbox_dsp->mbox = omap_mbox_get("dsp");
+	if (IS_ERR(mbox_dsp)) {
+		printk(KERN_ERR "failed to get mailbox handler for DSP.\n");
+		return -ENODEV;
 	}
 
-	return 0;
+	mbox_dsp->mbox->msg_receive_cb = mbcmd_receiver;
 
-fail:
-	for (i--; i; i--)
-		unregister_mbox_receiver(mbox_dsp, i, mbcmd_receiver);
-
-	return ret;
+	return 0;
 }
 
 static void dsp_mbox_exit(void)
 {
-	int i;
-
-	for (i = 0; i < MBOX_CMD_MAX; i++) {
-		if (cmdinfo[i] != NULL)
-			unregister_mbox_receiver(mbox_dsp, i, mbcmd_receiver);
-	}
+	mbox_dsp->mbox->msg_receive_cb = NULL;
 
 	if (mbsync_hold_mem_active) {
 		dsp_mem_disable((void *)daram_base);

arch/arm/plat-omap/dsp/dsp_mbcmd.h

@@ -21,6 +21,36 @@
  *
  */
 
+/*
+ * mailbox command: 0x00 - 0x7f
+ * when a driver wants to use mailbox, it must reserve mailbox commands here.
+ */
+#define MBOX_CMD_DSP_WDSND	0x10
+#define MBOX_CMD_DSP_WDREQ	0x11
+#define MBOX_CMD_DSP_BKSND	0x20
+#define MBOX_CMD_DSP_BKREQ	0x21
+#define MBOX_CMD_DSP_BKYLD	0x23
+#define MBOX_CMD_DSP_BKSNDP	0x24
+#define MBOX_CMD_DSP_BKREQP	0x25
+#define MBOX_CMD_DSP_TCTL	0x30
+#define MBOX_CMD_DSP_TCTLDATA	0x31
+#define MBOX_CMD_DSP_POLL	0x32
+#define MBOX_CMD_DSP_WDT	0x50
+#define MBOX_CMD_DSP_RUNLEVEL	0x51
+#define MBOX_CMD_DSP_PM		0x52
+#define MBOX_CMD_DSP_SUSPEND	0x53
+#define MBOX_CMD_DSP_KFUNC	0x54
+#define MBOX_CMD_DSP_TCFG	0x60
+#define MBOX_CMD_DSP_TADD	0x62
+#define MBOX_CMD_DSP_TDEL	0x63
+#define MBOX_CMD_DSP_TSTOP	0x65
+#define MBOX_CMD_DSP_DSPCFG	0x70
+#define MBOX_CMD_DSP_REGRW	0x72
+#define MBOX_CMD_DSP_GETVAR	0x74
+#define MBOX_CMD_DSP_SETVAR	0x75
+#define MBOX_CMD_DSP_ERR	0x78
+#define MBOX_CMD_DSP_DBG	0x79
+
 /*
  * DSP mailbox protocol definitions
  */

arch/arm/plat-omap/dsp/dsp_mem.c

@@ -44,7 +44,6 @@
 #include <asm/arch/dsp_common.h>
 #include "uaccess_dsp.h"
 #include "dsp_mbcmd.h"
-#include "../mailbox_hw.h"
 #include "dsp.h"
 #include "ioctl.h"
 #include "ipbuf.h"

arch/arm/plat-omap/mailbox.h

+/*
+ * Mailbox internal functions
+ *
+ * Copyright (C) 2006 Nokia Corporation
+ * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __ARCH_ARM_PLAT_MAILBOX_H
+#define __ARCH_ARM_PLAT_MAILBOX_H
+
+/*
+ * Mailbox queue handling API
+ */
+
+#define MBQ_DEPTH	16
+struct omap_mbq {
+	rwlock_t lock;
+	mbox_msg_t msg[MBQ_DEPTH];
+	mbox_msg_t *rp, *wp;
+};
+
+static inline int mbq_init(struct omap_mbq **addr)
+{
+	struct omap_mbq *m = kmalloc(sizeof(struct omap_mbq), GFP_KERNEL);
+	if (!m)
+		return -ENOMEM;
+
+	rwlock_init(&m->lock);
+
+	write_lock_irq(&m->lock);
+	m->rp = m->wp = &m->msg[0];
+	write_unlock_irq(&m->lock);
+
+	*addr = m;
+
+	return 0;
+}
+
+static inline int mbq_empty(struct omap_mbq *mbq)
+{
+	int ret;
+
+	read_lock_irq(&mbq->lock);
+	ret = (mbq->rp == mbq->wp);
+	read_unlock_irq(&mbq->lock);
+
+	return ret;
+}
+
+static inline int mbq_full(struct omap_mbq *mbq)
+{
+	int ret;
+	mbox_msg_t *p;
+
+	read_lock_irq(&mbq->lock);
+	p = mbq->wp;
+
+	if (++p == &mbq->msg[MBQ_DEPTH])
+		p = &mbq->msg[0];
+
+	ret = (p == mbq->rp);
+
+	read_unlock_irq(&mbq->lock);
+
+	return ret;
+}
+
+static inline int mbq_add(struct omap_mbq *mbq, mbox_msg_t msg)
+{
+	int ret = 0;
+
+	write_lock_irq(&mbq->lock);
+
+	*mbq->wp = msg;
+	if (++mbq->wp == &mbq->msg[MBQ_DEPTH])
+		mbq->wp = &mbq->msg[0];
+
+	if (mbq->wp == mbq->rp)	/* full */
+		ret = -1;;
+
+	write_unlock_irq(&mbq->lock);
+
+	return ret;
+}
+
+static inline mbox_msg_t mbq_get(struct omap_mbq *mbq)
+{
+	mbox_msg_t msg;
+
+	write_lock_irq(&mbq->lock);
+
+	msg = *mbq->rp;
+
+	if (++mbq->rp == &mbq->msg[MBQ_DEPTH])
+		mbq->rp = &mbq->msg[0];
+
+	write_unlock_irq(&mbq->lock);
+
+	return msg;
+}
+
+static inline void mbq_exit(struct omap_mbq **addr)
+{
+	if (*addr)
+		kfree(*addr);
+}
+
+/*
+ * Mailbox sequence bit API
+ */
+#if defined(CONFIG_ARCH_OMAP1)
+#  define MBOX_USE_SEQ_BIT
+#elif defined(CONFIG_ARCH_OMAP2)
+#  define MBOX_USE_SEQ_BIT
+#endif
+
+#ifdef MBOX_USE_SEQ_BIT
+/* seq_rcv should be initialized with any value other than
+ * 0 and 1 << 31, to allow either value for the first
+ * message.  */
+static inline void mbox_seq_init(struct omap_mbox *mbox)
+{
+	/* any value other than 0 and 1 << 31 */
+	mbox->seq_rcv = 0xffffffff;
+}
+
+static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
+{
+	/* add seq_snd to msg */
+	*msg = (*msg & 0x7fffffff) | mbox->seq_snd;
+	/* flip seq_snd */
+	mbox->seq_snd ^= 1 << 31;
+}
+
+static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
+{
+	mbox_msg_t seq = msg & (1 << 31);
+	if (seq == mbox->seq_rcv)
+		return -1;
+	mbox->seq_rcv = seq;
+	return 0;
+}
+#else
+static inline void mbox_seq_init(struct omap_mbox *mbox)
+{
+}
+static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
+{
+}
+static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
+{
+	return 0;
+}
+#endif
+
+/* Mailbox FIFO handle functions */
+static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
+{
+	return mbox->ops->fifo_read(mbox);
+}
+static inline void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
+{
+	mbox->ops->fifo_write(mbox, msg);
+}
+static inline int mbox_fifo_empty(struct omap_mbox *mbox)
+{
+	return mbox->ops->fifo_empty(mbox);
+}
+static inline int mbox_fifo_full(struct omap_mbox *mbox)
+{
+	return mbox->ops->fifo_full(mbox);
+}
+
+/* Mailbox IRQ handle functions */
+static inline void enable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+	mbox->ops->enable_irq(mbox, irq);
+}
+static inline void disable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+	mbox->ops->disable_irq(mbox, irq);
+}
+static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+	if (mbox->ops->ack_irq)
+		mbox->ops->ack_irq(mbox, irq);
+}
+static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+	return mbox->ops->is_irq(mbox, irq);
+}
+
+#endif				/* __ARCH_ARM_PLAT_MAILBOX_H */

arch/arm/plat-omap/mailbox_hw.h

-/*
- * Header for OMAP mailbox driver
- *
- * Copyright (C) 2006 Nokia Corporation. All rights reserved.
- *
- * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
- * 02110-1301 USA
- *
- */
-
-#include <asm/hardware.h>
-
-#if defined(CONFIG_ARCH_OMAP1)
-
-#define MAILBOX_BASE			(0xfffcf000)
-#define MAILBOX_ARM2DSP1		(MAILBOX_BASE + 0x00)
-#define MAILBOX_ARM2DSP1b		(MAILBOX_BASE + 0x04)
-#define MAILBOX_DSP2ARM1		(MAILBOX_BASE + 0x08)
-#define MAILBOX_DSP2ARM1b		(MAILBOX_BASE + 0x0c)
-#define MAILBOX_DSP2ARM2		(MAILBOX_BASE + 0x10)
-#define MAILBOX_DSP2ARM2b		(MAILBOX_BASE + 0x14)
-#define MAILBOX_ARM2DSP1_Flag		(MAILBOX_BASE + 0x18)
-#define MAILBOX_DSP2ARM1_Flag		(MAILBOX_BASE + 0x1c)
-#define MAILBOX_DSP2ARM2_Flag		(MAILBOX_BASE + 0x20)
-
-#elif defined(CONFIG_ARCH_OMAP2)
-
-/*
- * Mailbox: L4 peripheral -- use omap_readX(), omap_writeX()
- */
-#define OMAP24XX_MAILBOX_BASE		(L4_24XX_BASE + 0x94000)
-
-#define MAILBOX_REVISION		(OMAP24XX_MAILBOX_BASE + 0x00)
-#define MAILBOX_SYSCONFIG		(OMAP24XX_MAILBOX_BASE + 0x10)
-#define MAILBOX_SYSSTATUS		(OMAP24XX_MAILBOX_BASE + 0x14)
-#define MAILBOX_MESSAGE_0		(OMAP24XX_MAILBOX_BASE + 0x40)
-#define MAILBOX_MESSAGE_1		(OMAP24XX_MAILBOX_BASE + 0x44)
-#define MAILBOX_MESSAGE_2		(OMAP24XX_MAILBOX_BASE + 0x48)
-#define MAILBOX_MESSAGE_3		(OMAP24XX_MAILBOX_BASE + 0x4c)
-#define MAILBOX_MESSAGE_4		(OMAP24XX_MAILBOX_BASE + 0x50)
-#define MAILBOX_MESSAGE_5		(OMAP24XX_MAILBOX_BASE + 0x54)
-#define MAILBOX_FIFOSTATUS_0		(OMAP24XX_MAILBOX_BASE + 0x80)
-#define MAILBOX_FIFOSTATUS_1		(OMAP24XX_MAILBOX_BASE + 0x84)
-#define MAILBOX_FIFOSTATUS_2		(OMAP24XX_MAILBOX_BASE + 0x88)
-#define MAILBOX_FIFOSTATUS_3		(OMAP24XX_MAILBOX_BASE + 0x8c)
-#define MAILBOX_FIFOSTATUS_4		(OMAP24XX_MAILBOX_BASE + 0x90)
-#define MAILBOX_FIFOSTATUS_5		(OMAP24XX_MAILBOX_BASE + 0x94)
-#define MAILBOX_MSGSTATUS_0		(OMAP24XX_MAILBOX_BASE + 0xc0)
-#define MAILBOX_MSGSTATUS_1		(OMAP24XX_MAILBOX_BASE + 0xc4)
-#define MAILBOX_MSGSTATUS_2		(OMAP24XX_MAILBOX_BASE + 0xc8)
-#define MAILBOX_MSGSTATUS_3		(OMAP24XX_MAILBOX_BASE + 0xcc)
-#define MAILBOX_MSGSTATUS_4		(OMAP24XX_MAILBOX_BASE + 0xd0)
-#define MAILBOX_MSGSTATUS_5		(OMAP24XX_MAILBOX_BASE + 0xd4)
-#define MAILBOX_IRQSTATUS_0		(OMAP24XX_MAILBOX_BASE + 0x100)
-#define MAILBOX_IRQENABLE_0		(OMAP24XX_MAILBOX_BASE + 0x104)
-#define MAILBOX_IRQSTATUS_1		(OMAP24XX_MAILBOX_BASE + 0x108)
-#define MAILBOX_IRQENABLE_1		(OMAP24XX_MAILBOX_BASE + 0x10c)
-#define MAILBOX_IRQSTATUS_2		(OMAP24XX_MAILBOX_BASE + 0x110)
-#define MAILBOX_IRQENABLE_2		(OMAP24XX_MAILBOX_BASE + 0x114)
-#define MAILBOX_IRQSTATUS_3		(OMAP24XX_MAILBOX_BASE + 0x118)
-#define MAILBOX_IRQENABLE_3		(OMAP24XX_MAILBOX_BASE + 0x11c)
-
-#define MAILBOX_IRQ_NOTFULL(n)		(1<<(2*(n)+1))
-#define MAILBOX_IRQ_NEWMSG(n)		(1<<(2*(n)))
-
-#endif /* CONFIG_ARCH_OMAP2 */