Commit 42270035 authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm: (30 commits)
  [ARM] Acorn: move the i2c bus driver into drivers/i2c
  [ARM] ARM SCSI: Don't try to dma_map_sg too many scatterlist entries
  [ARM] ARM FAS216: don't modify scsi_cmnd request_bufflen
  [ARM] rtc-pcf8583: Final fixes for this RTC on RiscPC
  [ARM] rtc-pcf8583: correct month and year offsets
  [ARM] rtc-pcf8583: don't use BCD_TO_BIN/BIN_TO_BCD
  [ARM] EBSA110: Work around build errors
  [ARM] 4241/1: Define mb() as compiler barrier on a uniprocessor system
  [ARM] 4239/1: S3C24XX: Update kconfig entries for PM
  [ARM] 4238/1: S3C24XX: docs: update suspend and resume
  [ARM] 4237/2: oprofile: Always allow backtraces on ARM
  [ARM] Yet more asm/apm-emulation.h stuff
  ARM: OMAP: Add missing get_irqnr_preamble and arch_ret_to_user for omap2
  ARM: OMAP: Use linux/delay.h not asm/delay.h
  ARM: OMAP: Remove obsolete alsa typedefs
  ARM: OMAP: omap1510->15xx conversions needed for sx1
  ARM: OMAP: Add missing includes to board-nokia770
  ARM: OMAP: Workqueue changes for board-h4.c
  ARM: OMAP: dmtimer.c omap1 register fix
  ARM: OMAP: board-nokia770: correct lcd name
  ...
parents 2c89a8d0 8d91cbad
......@@ -5,10 +5,10 @@
Introduction
------------
The S3C2410 supports a low-power suspend mode, where the SDRAM is kept
The S3C24XX supports a low-power suspend mode, where the SDRAM is kept
in Self-Refresh mode, and all but the essential peripheral blocks are
powered down. For more information on how this works, please look
at the S3C2410 datasheets from Samsung.
at the relevant CPU datasheet from Samsung.
Requirements
......@@ -56,6 +56,27 @@ Machine Support
Note, the original method of adding an late_initcall() is wrong,
and will end up initialising all compiled machines' pm init!
The following is an example of code used for testing wakeup from
an falling edge on IRQ_EINT0:
static irqreturn_t button_irq(int irq, void *pw)
{
return IRQ_HANDLED;
}
statuc void __init machine_init(void)
{
...
request_irq(IRQ_EINT0, button_irq, IRQF_TRIGGER_FALLING,
"button-irq-eint0", NULL);
enable_irq_wake(IRQ_EINT0);
s3c2410_pm_init();
}
Debugging
---------
......@@ -70,6 +91,12 @@ Debugging
care should be taken that any external clock sources that the UARTs
rely on are still enabled at that point.
3) If any debugging is placed in the resume path, then it must have the
relevant clocks and peripherals setup before use (ie, bootloader).
For example, if you transmit a character from the UART, the baud
rate and uart controls must be setup beforehand.
Configuration
-------------
......@@ -89,6 +116,10 @@ Configuration
Allows the entire memory to be checksummed before and after the
suspend to see if there has been any corruption of the contents.
Note, the time to calculate the CRC is dependant on the CPU speed
and the size of memory. For an 64Mbyte RAM area on an 200MHz
S3C2410, this can take approximately 4 seconds to complete.
This support requires the CRC32 function to be enabled.
......
......@@ -190,6 +190,7 @@ config ARCH_CO285
config ARCH_EBSA110
bool "EBSA-110"
select ISA
select NO_IOPORT
help
This is an evaluation board for the StrongARM processor available
from Digital. It has limited hardware on-board, including an
......
......@@ -16,6 +16,8 @@
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/workqueue.h>
#include <linux/delay.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
......@@ -103,7 +105,7 @@ static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata =
static struct spi_board_info nokia770_spi_board_info[] __initdata = {
[0] = {
.modalias = "lcd_lph8923",
.modalias = "lcd_mipid",
.bus_num = 2,
.chip_select = 3,
.max_speed_hz = 12000000,
......
......@@ -432,8 +432,7 @@ static int omap1_clk_enable(struct clk *clk)
}
if (clk->flags & CLOCK_NO_IDLE_PARENT)
if (!cpu_is_omap24xx())
omap1_clk_deny_idle(clk->parent);
omap1_clk_deny_idle(clk->parent);
}
ret = clk->enable(clk);
......@@ -454,8 +453,7 @@ static void omap1_clk_disable(struct clk *clk)
if (likely(clk->parent)) {
omap1_clk_disable(clk->parent);
if (clk->flags & CLOCK_NO_IDLE_PARENT)
if (!cpu_is_omap24xx())
omap1_clk_allow_idle(clk->parent);
omap1_clk_allow_idle(clk->parent);
}
}
}
......@@ -471,7 +469,7 @@ static int omap1_clk_enable_generic(struct clk *clk)
if (unlikely(clk->enable_reg == 0)) {
printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
clk->name);
return 0;
return -EINVAL;
}
if (clk->flags & ENABLE_REG_32BIT) {
......@@ -651,10 +649,18 @@ int __init omap1_clk_init(void)
int crystal_type = 0; /* Default 12 MHz */
u32 reg;
#ifdef CONFIG_DEBUG_LL
/* Resets some clocks that may be left on from bootloader,
* but leaves serial clocks on.
*/
omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
#endif
/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
omap_writew(reg, SOFT_REQ_REG);
omap_writew(0, SOFT_REQ_REG2);
if (!cpu_is_omap15xx())
omap_writew(0, SOFT_REQ_REG2);
clk_init(&omap1_clk_functions);
......@@ -685,7 +691,7 @@ int __init omap1_clk_init(void)
info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
if (info != NULL) {
if (!cpu_is_omap1510())
if (!cpu_is_omap15xx())
crystal_type = info->system_clock_type;
}
......
......@@ -238,7 +238,7 @@ void __init omap_init_irq(void)
if (cpu_is_omap730())
omap_unmask_irq(INT_730_IH2_IRQ);
else if (cpu_is_omap1510())
else if (cpu_is_omap15xx())
omap_unmask_irq(INT_1510_IH2_IRQ);
else if (cpu_is_omap16xx())
omap_unmask_irq(INT_1610_IH2_IRQ);
......
......@@ -256,7 +256,8 @@ void omap_pm_suspend(void)
tps65010_set_led(LED1, OFF);
}
omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
if (!cpu_is_omap15xx())
omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
/*
* Step 1: turn off interrupts (FIXME: NOTE: already disabled)
......@@ -434,7 +435,8 @@ void omap_pm_suspend(void)
MPUI1610_RESTORE(OMAP_IH2_3_MIR);
}
omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG);
if (!cpu_is_omap15xx())
omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG);
/*
* Reenable interrupts
......@@ -704,6 +706,8 @@ static struct pm_ops omap_pm_ops ={
static int __init omap_pm_init(void)
{
int error;
printk("Power Management for TI OMAP.\n");
/*
......@@ -760,7 +764,9 @@ static int __init omap_pm_init(void)
omap_pm_init_proc();
#endif
subsys_create_file(&power_subsys, &sleep_while_idle_attr);
error = subsys_create_file(&power_subsys, &sleep_while_idle_attr);
if (error)
printk(KERN_ERR "subsys_create_file failed: %d\n", error);
if (cpu_is_omap16xx()) {
/* configure LOW_PWR pin */
......
/*
* linux/arch/arm/mach-omap1/serial.c
*
* OMAP1 CPU identification code
* OMAP1 serial support.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -59,7 +59,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
if (!cpu_is_omap1510()) {
if (!cpu_is_omap15xx()) {
omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
}
......@@ -121,7 +121,7 @@ void __init omap_serial_init(void)
serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
}
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
......@@ -147,10 +147,10 @@ void __init omap_serial_init(void)
printk("Could not get uart1_ck\n");
else {
clk_enable(uart1_ck);
if (cpu_is_omap1510())
if (cpu_is_omap15xx())
clk_set_rate(uart1_ck, 12000000);
}
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
if (machine_is_omap_innovator()) {
......@@ -167,12 +167,12 @@ void __init omap_serial_init(void)
printk("Could not get uart2_ck\n");
else {
clk_enable(uart2_ck);
if (cpu_is_omap1510())
if (cpu_is_omap15xx())
clk_set_rate(uart2_ck, 12000000);
else
clk_set_rate(uart2_ck, 48000000);
}
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
if (machine_is_omap_innovator()) {
......@@ -189,10 +189,10 @@ void __init omap_serial_init(void)
printk("Could not get uart3_ck\n");
else {
clk_enable(uart3_ck);
if (cpu_is_omap1510())
if (cpu_is_omap15xx())
clk_set_rate(uart3_ck, 12000000);
}
if (cpu_is_omap1510()) {
if (cpu_is_omap15xx()) {
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
}
......
......@@ -39,7 +39,6 @@
#include "prcm-regs.h"
#include <asm/io.h>
#include <asm/delay.h>
static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 };
static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 };
......@@ -179,9 +178,11 @@ static int h4_select_irda(struct device *dev, int state)
return err;
}
static void set_trans_mode(void *data)
static void set_trans_mode(struct work_struct *work)
{
int *mode = data;
struct omap_irda_config *irda_config =
container_of(work, struct omap_irda_config, gpio_expa.work);
int mode = irda_config->mode;
unsigned char expa;
int err = 0;
......@@ -191,7 +192,7 @@ static void set_trans_mode(void *data)
expa &= ~0x01;
if (!(*mode & IR_SIRMODE)) { /* MIR/FIR */
if (!(mode & IR_SIRMODE)) { /* MIR/FIR */
expa |= 0x01;
}
......@@ -204,9 +205,9 @@ static int h4_transceiver_mode(struct device *dev, int mode)
{
struct omap_irda_config *irda_config = dev->platform_data;
irda_config->mode = mode;
cancel_delayed_work(&irda_config->gpio_expa);
PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode);
#error this is not permitted - mode is an argument variable
PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
schedule_delayed_work(&irda_config->gpio_expa, 0);
return 0;
......
......@@ -24,6 +24,7 @@
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <asm/mach/time.h>
#include <asm/arch/dmtimer.h>
......@@ -64,7 +65,7 @@ static void __init omap2_gp_timer_init(void)
BUG_ON(gptimer == NULL);
omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / 100;
tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
tick_period -= 1;
setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
......
......@@ -16,7 +16,8 @@
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <asm/apm-emulation.h>
#include <linux/apm-emulation.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/hardware.h>
......
......@@ -16,7 +16,8 @@
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <asm/apm-emulation.h>
#include <linux/apm-emulation.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/hardware.h>
......
......@@ -131,6 +131,8 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
struct op_arm_model_spec *spec = NULL;
int ret = -ENODEV;
ops->backtrace = arm_backtrace;
#ifdef CONFIG_CPU_XSCALE
spec = &op_xscale_spec;
#endif
......@@ -161,7 +163,6 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
ops->start = op_arm_start;
ops->stop = op_arm_stop;
ops->cpu_type = op_arm_model->name;
ops->backtrace = arm_backtrace;
printk(KERN_INFO "oprofile: using %s\n", spec->name);
}
......
......@@ -557,7 +557,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
omap_enable_channel_irq(free_ch);
/* Clear the CSR register and IRQ status register */
OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK;
omap_writel(~0x0, OMAP_DMA4_IRQSTATUS_L0);
omap_writel(1 << free_ch, OMAP_DMA4_IRQSTATUS_L0);
}
*dma_ch_out = free_ch;
......@@ -597,10 +597,7 @@ void omap_free_dma(int lch)
/* Clear the CSR register and IRQ status register */
OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK;
val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
val |= 1 << lch;
omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
omap_writel(1 << lch, OMAP_DMA4_IRQSTATUS_L0);
/* Disable all DMA interrupts for the channel. */
OMAP_DMA_CICR_REG(lch) = 0;
......@@ -927,7 +924,6 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
static int omap2_dma_handle_ch(int ch)
{
u32 status = OMAP_DMA_CSR_REG(ch);
u32 val;
if (!status)
return 0;
......@@ -948,11 +944,7 @@ static int omap2_dma_handle_ch(int ch)
dma_chan[ch].dev_id);
OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK;
val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
/* ch in this function is from 0-31 while in register it is 1-32 */
val = 1 << (ch);
omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
omap_writel(1 << ch, OMAP_DMA4_IRQSTATUS_L0);
if (likely(dma_chan[ch].callback != NULL))
dma_chan[ch].callback(ch, status, dma_chan[ch].data);
......
......@@ -90,8 +90,8 @@ static struct omap_dm_timer dm_timers[] = {
{ .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 },
{ .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 },
{ .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 },
{ .phys_base = 0xfffb4400, .irq = INT_1610_GPTIMER7 },
{ .phys_base = 0xfffb4c00, .irq = INT_1610_GPTIMER8 },
{ .phys_base = 0xfffb7400, .irq = INT_1610_GPTIMER7 },
{ .phys_base = 0xfffbd400, .irq = INT_1610_GPTIMER8 },
};
#elif defined(CONFIG_ARCH_OMAP2)
......@@ -314,6 +314,8 @@ struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
{
BUG();
return 0;
}
#endif
......
......@@ -974,10 +974,11 @@ static struct irq_chip gpio_irq_chip = {
};
static struct irq_chip mpuio_irq_chip = {
.name = "MPUIO",
.ack = mpuio_ack_irq,
.mask = mpuio_mask_irq,
.unmask = mpuio_unmask_irq
.name = "MPUIO",
.ack = mpuio_ack_irq,
.mask = mpuio_mask_irq,
.unmask = mpuio_unmask_irq,
.set_type = gpio_irq_type,
};
static int initialized;
......
......@@ -20,8 +20,8 @@
#include <linux/interrupt.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <asm/delay.h>
#include <asm/io.h>
#include <asm/irq.h>
......
......@@ -116,7 +116,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
}
/* Check for pull up or pull down selection on 1610 */
if (!cpu_is_omap1510()) {
if (!cpu_is_omap15xx()) {
if (cfg->pu_pd_reg && cfg->pull_val) {
spin_lock_irqsave(&mux_spin_lock, flags);
pu_pd_orig = omap_readl(cfg->pu_pd_reg);
......@@ -172,7 +172,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
if (!cpu_is_omap1510()) {
if (!cpu_is_omap15xx()) {
if (cfg->pu_pd_reg && cfg->pull_val) {
printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
cfg->pu_pd_name, cfg->pu_pd_reg,
......
......@@ -58,6 +58,11 @@ config S3C2410_PM_CHECK
going to sleep. The blocks are then checked on resume for any
errors.
Note, this can take several seconds depending on memory size
and CPU speed.
See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
config S3C2410_PM_CHECK_CHUNKSIZE
int "S3C2410 PM Suspend CRC Chunksize (KiB)"
depends on ARCH_S3C2410 && PM && S3C2410_PM_CHECK
......@@ -68,6 +73,8 @@ config S3C2410_PM_CHECK_CHUNKSIZE
the CRC data block will take more memory, but wil identify any
faults with better precision.
See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
config S3C2410_LOWLEVEL_UART_PORT
int "S3C2410 UART to use for low-level messages"
default 0
......
......@@ -2,5 +2,4 @@
# Makefile for the acorn character device drivers.
#
obj-$(CONFIG_ARCH_ACORN) += i2c.o pcf8583.o
obj-$(CONFIG_L7200_KEYB) += defkeymap-l7200.o keyb_l7200.o
/*
* linux/drivers/acorn/char/i2c.c
*
* Copyright (C) 2000 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* ARM IOC/IOMD i2c driver.
*
* On Acorn machines, the following i2c devices are on the bus:
* - PCF8583 real time clock & static RAM
*/
#include <linux/capability.h>
#include <linux/init.h>
#include <linux/time.h>
#include <linux/miscdevice.h>
#include <linux/rtc.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <linux/fs.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/hardware/ioc.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include "pcf8583.h"
extern int (*set_rtc)(void);
static struct i2c_client *rtc_client;
static const unsigned char days_in_mon[] =
{ 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
#define CMOS_CHECKSUM (63)
/*
* Acorn machines store the year in the static RAM at
* location 128.
*/
#define CMOS_YEAR (64 + 128)
static inline int rtc_command(int cmd, void *data)
{
int ret = -EIO;
if (rtc_client)
ret = rtc_client->driver->command(rtc_client, cmd, data);
return ret;
}
/*
* Update the century + year bytes in the CMOS RAM, ensuring
* that the check byte is correctly adjusted for the change.
*/
static int rtc_update_year(unsigned int new_year)
{
unsigned char yr[2], chk;
struct mem cmos_year = { CMOS_YEAR, sizeof(yr), yr };
struct mem cmos_check = { CMOS_CHECKSUM, 1, &chk };
int ret;
ret = rtc_command(MEM_READ, &cmos_check);
if (ret)
goto out;
ret = rtc_command(MEM_READ, &cmos_year);
if (ret)
goto out;
chk -= yr[1] + yr[0];
yr[1] = new_year / 100;
yr[0] = new_year % 100;
chk += yr[1] + yr[0];
ret = rtc_command(MEM_WRITE, &cmos_year);
if (ret == 0)
ret = rtc_command(MEM_WRITE, &cmos_check);
out:
return ret;
}
/*
* Read the current RTC time and date, and update xtime.
*/
static void get_rtc_time(struct rtc_tm *rtctm, unsigned int *year)
{
unsigned char ctrl, yr[2];
struct mem rtcmem = { CMOS_YEAR, sizeof(yr), yr };
int real_year, year_offset;
/*
* Ensure that the RTC is running.
*/
rtc_command(RTC_GETCTRL, &ctrl);
if (ctrl & 0xc0) {
unsigned char new_ctrl = ctrl & ~0xc0;
printk(KERN_WARNING "RTC: resetting control %02x -> %02x\n",
ctrl, new_ctrl);
rtc_command(RTC_SETCTRL, &new_ctrl);
}
if (rtc_command(RTC_GETDATETIME, rtctm) ||
rtc_command(MEM_READ, &rtcmem))
return;
real_year = yr[0];
/*
* The RTC year holds the LSB two bits of the current
* year, which should reflect the LSB two bits of the
* CMOS copy of the year. Any difference indicates
* that we have to correct the CMOS version.
*/
year_offset = rtctm->year_off - (real_year & 3);
if (year_offset < 0)
/*
* RTC year wrapped. Adjust it appropriately.
*/
year_offset += 4;
*year = real_year + year_offset + yr[1] * 100;
}
static int set_rtc_time(struct rtc_tm *rtctm, unsigned int year)
{
unsigned char leap;
int ret;
leap = (!(year % 4) && (year % 100)) || !(year % 400);
if (rtctm->mon > 12 || rtctm->mon == 0 || rtctm->mday == 0)
return -EINVAL;
if (rtctm->mday > (days_in_mon[rtctm->mon] + (rtctm->mon == 2 && leap)))
return -EINVAL;
if (rtctm->hours >= 24 || rtctm->mins >= 60 || rtctm->secs >= 60)
return -EINVAL;
/*
* The RTC's own 2-bit year must reflect the least
* significant two bits of the CMOS year.
*/
rtctm->year_off = (year % 100) & 3;
ret = rtc_command(RTC_SETDATETIME, rtctm);
if (ret == 0)
ret = rtc_update_year(year);
return ret;
}
/*
* Set the RTC time only. Note that
* we do not touch the date.
*/
static int k_set_rtc_time(void)
{
struct rtc_tm new_rtctm, old_rtctm;
unsigned long nowtime = xtime.tv_sec;
if (rtc_command(RTC_GETDATETIME, &old_rtctm))
return 0;
new_rtctm.cs = xtime.tv_nsec / 10000000;
new_rtctm.secs = nowtime % 60; nowtime /= 60;
new_rtctm.mins = nowtime % 60; nowtime /= 60;
new_rtctm.hours = nowtime % 24;
/*
* avoid writing when we're going to change the day
* of the month. We will retry in the next minute.
* This basically means that if the RTC must not drift
* by more than 1 minute in 11 minutes.
*
* [ rtc: 1/1/2000 23:58:00, real 2/1/2000 00:01:00,
* rtc gets set to 1/1/2000 00:01:00 ]
*/
if ((old_rtctm.hours == 23 && old_rtctm.mins == 59) ||
(new_rtctm.hours == 23 && new_rtctm.mins == 59))
return 1;
return rtc_command(RTC_SETTIME, &new_rtctm);
}
static int rtc_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg)
{
unsigned int year;
struct rtc_time rtctm;
struct rtc_tm rtc_raw;
switch (cmd) {
case RTC_ALM_READ:
case RTC_ALM_SET:
break;
case RTC_RD_TIME:
memset(&rtctm, 0, sizeof(struct rtc_time));
get_rtc_time(&rtc_raw, &year);
rtctm.tm_sec = rtc_raw.secs;
rtctm.tm_min = rtc_raw.mins;
rtctm.tm_hour = rtc_raw.hours;
rtctm.tm_mday = rtc_raw.mday;
rtctm.tm_mon = rtc_raw.mon - 1; /* month starts at 0 */
rtctm.tm_year = year - 1900; /* starts at 1900 */
return copy_to_user((void *)arg, &rtctm, sizeof(rtctm))
? -EFAULT : 0;
case RTC_SET_TIME:
if (!capable(CAP_SYS_TIME))
return -EACCES;
if (copy_from_user(&rtctm, (void *)arg, sizeof(rtctm)))
return -EFAULT;
rtc_raw.secs = rtctm.tm_sec;
rtc_raw.mins = rtctm.tm_min;
rtc_raw.hours = rtctm.tm_hour;
rtc_raw.mday = rtctm.tm_mday;
rtc_raw.mon = rtctm.tm_mon + 1;
year = rtctm.tm_year + 1900;
return set_rtc_time(&rtc_raw, year);
break;
case RTC_EPOCH_READ:
return put_user(1900, (unsigned long *)arg);
}
return -EINVAL;
}
static const struct file_operations rtc_fops = {
.ioctl = rtc_ioctl,
};
static struct miscdevice rtc_dev = {
.minor = RTC_MINOR,
.name = "rtc",
.fops = &rtc_fops,
};
/* IOC / IOMD i2c driver */
#define FORCE_ONES 0xdc
#define SCL 0x02
#define SDA 0x01
/*
* We must preserve all non-i2c output bits in IOC_CONTROL.
* Note also that we need to preserve the value of SCL and
* SDA outputs as well (which may be different from the
* values read back from IOC_CONTROL).
*/
static u_int force_ones;
static void ioc_setscl(void *data, int state)
{
u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA);
u_int ones = force_ones;
if (state)
ones |= SCL;
else
ones &= ~SCL;
force_ones = ones;
ioc_writeb(ioc_control | ones, IOC_CONTROL);
}
static void ioc_setsda(void *data, int state)
{
u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA);
u_int ones = force_ones;
if (state)
ones |= SDA;
else
ones &= ~SDA;
force_ones = ones;
ioc_writeb(ioc_control | ones, IOC_CONTROL);
}
static int ioc_getscl(void *data)
{
return (ioc_readb(IOC_CONTROL) & SCL) != 0;
}
static int ioc_getsda(void *data)
{
return (ioc_readb(IOC_CONTROL) & SDA) != 0;
}
static struct i2c_algo_bit_data ioc_data = {
.setsda = ioc_setsda,
.setscl = ioc_setscl,
.getsda = ioc_getsda,
.getscl = ioc_getscl,
.udelay = 80,
.timeout = 100
};
static int ioc_client_reg(struct i2c_client *client)
{
if (client->driver->id == I2C_DRIVERID_PCF8583 &&
client->addr == 0x50) {
struct rtc_tm rtctm;
unsigned int year;
struct timespec tv;
rtc_client = client;
get_rtc_time(&rtctm, &year);
tv.tv_nsec = rtctm.cs * 10000000;
tv.tv_sec = mktime(year, rtctm.mon, rtctm.mday,
rtctm.hours, rtctm.mins, rtctm.secs);
do_settimeofday(&tv);
set_rtc = k_set_rtc_time;
}
return 0;
}
static int ioc_client_unreg(struct i2c_client *client)
{
if (client == rtc_client) {
set_rtc = NULL;
rtc_client = NULL;
}
return 0;
}
static struct i2c_adapter ioc_ops = {
.id = I2C_HW_B_IOC,
.algo_data = &ioc_data,
.client_register = ioc_client_reg,
.client_unregister = ioc_client_unreg,
};
static int __init i2c_ioc_init(void)
{
int ret;
force_ones = FORCE_ONES | SCL | SDA;
ret = i2c_bit_add_bus(&ioc_ops);
if (ret >= 0){
ret = misc_register(&rtc_dev);
if(ret < 0)
i2c_del_adapter(&ioc_ops);
}
return ret;
}
__initcall(i2c_ioc_init);
/*
* linux/drivers/acorn/char/pcf8583.c
*
* Copyright (C) 2000 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Driver for PCF8583 RTC & RAM chip
*/
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/mc146818rtc.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/bcd.h>
#include "pcf8583.h"
static struct i2c_driver pcf8583_driver;
static unsigned short ignore[] = { I2C_CLIENT_END };
static unsigned short normal_addr[] = { 0x50, I2C_CLIENT_END };
static unsigned short *forces[] = { NULL };
static struct i2c_client_address_data addr_data = {
.normal_i2c = normal_addr,
.probe = ignore,
.ignore = ignore,
.forces = forces,
};
#define set_ctrl(x, v) i2c_set_clientdata(x, (void *)(unsigned int)(v))
#define get_ctrl(x) ((unsigned int)i2c_get_clientdata(x))
static int
pcf8583_attach(struct i2c_adapter *adap, int addr, int kind)
{
struct i2c_client *c;
unsigned char buf[1], ad[1] = { 0 };
struct i2c_msg msgs[2] = {
{
.addr = addr,
.flags = 0,
.len = 1,
.buf = ad,
}, {
.addr = addr,
.flags = I2C_M_RD,
.len = 1,
.buf = buf,
}
};
c = kmalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return -ENOMEM;
memset(c, 0, sizeof(*c));
c->addr = addr;
c->adapter = adap;
c->driver = &pcf8583_driver;
if (i2c_transfer(c->adapter, msgs, 2) == 2)
set_ctrl(c, buf[0]);
return i2c_attach_client(c);
}
static int
pcf8583_probe(struct i2c_adapter *adap)
{
return i2c_probe(adap, &addr_data, pcf8583_attach);
}
static int
pcf8583_detach(struct i2c_client *client)
{
i2c_detach_client(client);
kfree(client);
return 0;
}
static int
pcf8583_get_datetime(struct i2c_client *client, struct rtc_tm *dt)
{
unsigned char buf[8], addr[1] = { 1 };
struct i2c_msg msgs[2] = {
{
.addr = client->addr,
.flags = 0,
.len = 1,
.buf = addr,
}, {
.addr = client->addr,
.flags = I2C_M_RD,
.len = 6,
.buf = buf,
}
};
int ret = -EIO;
memset(buf, 0, sizeof(buf));
ret = i2c_transfer(client->adapter, msgs, 2);
if (ret == 2) {
dt->year_off = buf[4] >> 6;
dt->wday = buf[5] >> 5;
buf[4] &= 0x3f;
buf[5] &= 0x1f;
dt->cs = BCD_TO_BIN(buf[0]);
dt->secs = BCD_TO_BIN(buf[1]);
dt->mins = BCD_TO_BIN(buf[2]);
dt->hours = BCD_TO_BIN(buf[3]);
dt->mday = BCD_TO_BIN(buf[4]);
dt->mon = BCD_TO_BIN(buf[5]);
ret = 0;
}
return ret;
}
static int
pcf8583_set_datetime(struct i2c_client *client, struct rtc_tm *dt, int datetoo)
{
unsigned char buf[8];
int ret, len = 6;
buf[0] = 0;
buf[1] = get_ctrl(client) | 0x80;
buf[2] = BIN_TO_BCD(dt->cs);
buf[3] = BIN_TO_BCD(dt->secs);
buf[4] = BIN_TO_BCD(dt->mins);
buf[5] = BIN_TO_BCD(dt->hours);
if (datetoo) {
len = 8;
buf[6] = BIN_TO_BCD(dt->mday) | (dt->year_off << 6);
buf[7] = BIN_TO_BCD(dt->mon) | (dt->wday << 5);
}
ret = i2c_master_send(client, (char *)buf, len);
if (ret == len)
ret = 0;
buf[1] = get_ctrl(client);
i2c_master_send(client, (char *)buf, 2);
return ret;
}
static int
pcf8583_get_ctrl(struct i2c_client *client, unsigned char *ctrl)
{
*ctrl = get_ctrl(client);
return 0;
}
static int
pcf8583_set_ctrl(struct i2c_client *client, unsigned char *ctrl)
{
unsigned char buf[2];
buf[0] = 0;
buf[1] = *ctrl;
set_ctrl(client, *ctrl);
return i2c_master_send(client, (char *)buf, 2);
}
static int
pcf8583_read_mem(struct i2c_client *client, struct mem *mem)
{
unsigned char addr[1];
struct i2c_msg msgs[2] = {
{
.addr = client->addr,
.flags = 0,
.len = 1,
.buf = addr,
}, {
.addr = client->addr,
.flags = I2C_M_RD,
.len = mem->nr,
.buf = mem->data,
}
};
if (mem->loc < 8)
return -EINVAL;
addr[0] = mem->loc;
return i2c_transfer(client->adapter, msgs, 2) == 2 ? 0 : -EIO;
}
static int
pcf8583_write_mem(struct i2c_client *client, struct mem *mem)
{
unsigned char addr[1];
struct i2c_msg msgs[2] = {
{
.addr = client->addr,
.flags = 0,
.len = 1,
.buf = addr,
}, {
.addr = client->addr,
.flags = I2C_M_NOSTART,
.len = mem->nr,
.buf = mem->data,
}
};
if (mem->loc < 8)
return -EINVAL;
addr[0] = mem->loc;
return i2c_transfer(client->adapter, msgs, 2) == 2 ? 0 : -EIO;
}
static int
pcf8583_command(struct i2c_client *client, unsigned int cmd, void *arg)
{
switch (cmd) {
case RTC_GETDATETIME:
return pcf8583_get_datetime(client, arg);
case RTC_SETTIME:
return pcf8583_set_datetime(client, arg, 0);
case RTC_SETDATETIME:
return pcf8583_set_datetime(client, arg, 1);
case RTC_GETCTRL:
return pcf8583_get_ctrl(client, arg);
case RTC_SETCTRL:
return pcf8583_set_ctrl(client, arg);
case MEM_READ:
return pcf8583_read_mem(client, arg);
case MEM_WRITE:
return pcf8583_write_mem(client, arg);
default:
return -EINVAL;
}
}
static struct i2c_driver pcf8583_driver = {
.driver = {
.name = "PCF8583",
},
.id = I2C_DRIVERID_PCF8583,
.attach_adapter = pcf8583_probe,
.detach_client = pcf8583_detach,
.command = pcf8583_command
};
static __init int pcf8583_init(void)
{
return i2c_add_driver(&pcf8583_driver);
}
static __exit void pcf8583_exit(void)
{
i2c_del_driver(&pcf8583_driver);
}
module_init(pcf8583_init);
module_exit(pcf8583_exit);
MODULE_AUTHOR("Russell King");
MODULE_DESCRIPTION("PCF8583 I2C RTC driver");
MODULE_LICENSE("GPL");
/*
* linux/drivers/acorn/char/pcf8583.h
*
* Copyright (C) 2000 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
struct rtc_tm {
unsigned char cs;
unsigned char secs;
unsigned char mins;
unsigned char hours;
unsigned char mday;
unsigned char mon;
unsigned char year_off;
unsigned char wday;
};
struct mem {
unsigned int loc;
unsigned int nr;
unsigned char *data;
};
#define RTC_GETDATETIME 0
#define RTC_SETTIME 1
#define RTC_SETDATETIME 2
#define RTC_GETCTRL 3
#define RTC_SETCTRL 4
#define MEM_READ 5
#define MEM_WRITE 6
#define CTRL_STOP 0x80
#define CTRL_HOLD 0x40
#define CTRL_32KHZ 0x00
#define CTRL_MASK 0x08
#define CTRL_ALARMEN 0x04
#define CTRL_ALARM 0x02
#define CTRL_TIMER 0x01
......@@ -495,6 +495,16 @@ config I2C_VERSATILE
This driver can also be built as a module. If so, the module
will be called i2c-versatile.
config I2C_ACORN
bool "Acorn IOC/IOMD I2C bus support"
depends on I2C && ARCH_ACORN
default y
select I2C_ALGOBIT
help
Say yes if you want to support the I2C bus on Acorn platforms.
If you don't know, say Y.
config I2C_VIA
tristate "VIA 82C586B"
depends on I2C && PCI && EXPERIMENTAL
......
......@@ -42,6 +42,7 @@ obj-$(CONFIG_I2C_SIS630) += i2c-sis630.o
obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o
obj-$(CONFIG_I2C_STUB) += i2c-stub.o
obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o
obj-$(CONFIG_I2C_VIA) += i2c-via.o
obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
......
/*
* linux/drivers/acorn/char/i2c.c
*
* Copyright (C) 2000 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* ARM IOC/IOMD i2c driver.
*
* On Acorn machines, the following i2c devices are on the bus:
* - PCF8583 real time clock & static RAM
*/
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/hardware/ioc.h>
#include <asm/system.h>
#define FORCE_ONES 0xdc
#define SCL 0x02
#define SDA 0x01
/*
* We must preserve all non-i2c output bits in IOC_CONTROL.
* Note also that we need to preserve the value of SCL and
* SDA outputs as well (which may be different from the
* values read back from IOC_CONTROL).
*/
static u_int force_ones;
static void ioc_setscl(void *data, int state)
{
u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA);
u_int ones = force_ones;
if (state)
ones |= SCL;
else
ones &= ~SCL;
force_ones = ones;
ioc_writeb(ioc_control | ones, IOC_CONTROL);
}
static void ioc_setsda(void *data, int state)
{
u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA);
u_int ones = force_ones;
if (state)
ones |= SDA;
else
ones &= ~SDA;
force_ones = ones;
ioc_writeb(ioc_control | ones, IOC_CONTROL);
}
static int ioc_getscl(void *data)
{
return (ioc_readb(IOC_CONTROL) & SCL) != 0;
}
static int ioc_getsda(void *data)
{
return (ioc_readb(IOC_CONTROL) & SDA) != 0;
}
static struct i2c_algo_bit_data ioc_data = {
.setsda = ioc_setsda,
.setscl = ioc_setscl,
.getsda = ioc_getsda,
.getscl = ioc_getscl,
.udelay = 80,
.timeout = 100
};
static struct i2c_adapter ioc_ops = {
.id = I2C_HW_B_IOC,
.algo_data = &ioc_data,
};
static int __init i2c_ioc_init(void)
{
force_ones = FORCE_ONES | SCL | SDA;
return i2c_bit_add_bus(&ioc_ops);
}
__initcall(i2c_ioc_init);
......@@ -207,10 +207,12 @@ config RTC_DRV_PCF8563
config RTC_DRV_PCF8583
tristate "Philips PCF8583"
depends on RTC_CLASS && I2C
depends on RTC_CLASS && I2C && ARCH_RPC
help
If you say yes here you get support for the
Philips PCF8583 RTC chip.
If you say yes here you get support for the Philips PCF8583
RTC chip found on Acorn RiscPCs. This driver supports the
platform specific method of retrieving the current year from
the RTC's SRAM.
This driver can also be built as a module. If so, the module
will be called rtc-pcf8583.
......
......@@ -40,7 +40,7 @@ struct pcf8583 {
#define CTRL_ALARM 0x02
#define CTRL_TIMER 0x01
static unsigned short normal_i2c[] = { I2C_CLIENT_END };
static unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END };
/* Module parameters */
I2C_CLIENT_INSMOD;
......@@ -81,11 +81,11 @@ static int pcf8583_get_datetime(struct i2c_client *client, struct rtc_time *dt)
buf[4] &= 0x3f;
buf[5] &= 0x1f;
dt->tm_sec = BCD_TO_BIN(buf[1]);
dt->tm_min = BCD_TO_BIN(buf[2]);
dt->tm_hour = BCD_TO_BIN(buf[3]);
dt->tm_mday = BCD_TO_BIN(buf[4]);
dt->tm_mon = BCD_TO_BIN(buf[5]);
dt->tm_sec = BCD2BIN(buf[1]);
dt->tm_min = BCD2BIN(buf[2]);
dt->tm_hour = BCD2BIN(buf[3]);
dt->tm_mday = BCD2BIN(buf[4]);
dt->tm_mon = BCD2BIN(buf[5]) - 1;
}
return ret == 2 ? 0 : -EIO;
......@@ -99,14 +99,14 @@ static int pcf8583_set_datetime(struct i2c_client *client, struct rtc_time *dt,
buf[0] = 0;
buf[1] = get_ctrl(client) | 0x80;
buf[2] = 0;
buf[3] = BIN_TO_BCD(dt->tm_sec);
buf[4] = BIN_TO_BCD(dt->tm_min);
buf[5] = BIN_TO_BCD(dt->tm_hour);
buf[3] = BIN2BCD(dt->tm_sec);
buf[4] = BIN2BCD(dt->tm_min);
buf[5] = BIN2BCD(dt->tm_hour);
if (datetoo) {
len = 8;
buf[6] = BIN_TO_BCD(dt->tm_mday) | (dt->tm_year << 6);
buf[7] = BIN_TO_BCD(dt->tm_mon) | (dt->tm_wday << 5);
buf[6] = BIN2BCD(dt->tm_mday) | (dt->tm_year << 6);
buf[7] = BIN2BCD(dt->tm_mon + 1) | (dt->tm_wday << 5);
}
ret = i2c_master_send(client, (char *)buf, len);
......@@ -226,7 +226,7 @@ static int pcf8583_rtc_read_time(struct device *dev, struct rtc_time *tm)
*/
year_offset += 4;
tm->tm_year = real_year + year_offset + year[1] * 100;
tm->tm_year = (real_year + year_offset + year[1] * 100) - 1900;
return 0;
}
......@@ -237,6 +237,7 @@ static int pcf8583_rtc_set_time(struct device *dev, struct rtc_time *tm)
unsigned char year[2], chk;
struct rtc_mem cmos_year = { CMOS_YEAR, sizeof(year), year };
struct rtc_mem cmos_check = { CMOS_CHECKSUM, 1, &chk };
unsigned int proper_year = tm->tm_year + 1900;
int ret;
/*
......@@ -258,8 +259,8 @@ static int pcf8583_rtc_set_time(struct device *dev, struct rtc_time *tm)
chk -= year[1] + year[0];
year[1] = tm->tm_year / 100;
year[0] = tm->tm_year % 100;
year[1] = proper_year / 100;
year[0] = proper_year % 100;
chk += year[1] + year[0];
......
......@@ -178,10 +178,10 @@ cumanascsi_2_dma_setup(struct Scsi_Host *host, struct scsi_pointer *SCp,
dma_dir = DMA_MODE_READ,
alatch_dir = ALATCH_DMA_IN;
dma_map_sg(dev, info->sg, bufs + 1, map_dir);
dma_map_sg(dev, info->sg, bufs, map_dir);
disable_dma(dmach);
set_dma_sg(dmach, info->sg, bufs + 1);
set_dma_sg(dmach, info->sg, bufs);
writeb(alatch_dir, info->base + CUMANASCSI2_ALATCH);
set_dma_mode(dmach, dma_dir);
enable_dma(dmach);
......
......@@ -175,10 +175,10 @@ eesoxscsi_dma_setup(struct Scsi_Host *host, struct scsi_pointer *SCp,
map_dir = DMA_FROM_DEVICE,
dma_dir = DMA_MODE_READ;
dma_map_sg(dev, info->sg, bufs + 1, map_dir);
dma_map_sg(dev, info->sg, bufs, map_dir);
disable_dma(dmach);
set_dma_sg(dmach, info->sg, bufs + 1);
set_dma_sg(dmach, info->sg, bufs);
set_dma_mode(dmach, dma_dir);
enable_dma(dmach);
return fasdma_real_all;
......
......@@ -633,7 +633,7 @@ static void fas216_updateptrs(FAS216_Info *info, int bytes_transferred)
BUG_ON(bytes_transferred < 0);
info->SCpnt->request_bufflen -= bytes_transferred;
SCp->phase -= bytes_transferred;
while (bytes_transferred != 0) {
if (SCp->this_residual > bytes_transferred)
......@@ -715,7 +715,7 @@ static void fas216_cleanuptransfer(FAS216_Info *info)
return;
if (dmatype == fasdma_real_all)
total = info->SCpnt->request_bufflen;
total = info->scsi.SCp.phase;
else
total = info->scsi.SCp.this_residual;
......@@ -753,7 +753,7 @@ static void fas216_transfer(FAS216_Info *info)
fas216_log(info, LOG_BUFFER,
"starttransfer: buffer %p length 0x%06x reqlen 0x%06x",
info->scsi.SCp.ptr, info->scsi.SCp.this_residual,
info->SCpnt->request_bufflen);
info->scsi.SCp.phase);
if (!info->scsi.SCp.ptr) {
fas216_log(info, LOG_ERROR, "null buffer passed to "
......@@ -784,7 +784,7 @@ static void fas216_transfer(FAS216_Info *info)
info->dma.transfer_type = dmatype;
if (dmatype == fasdma_real_all)
fas216_set_stc(info, info->SCpnt->request_bufflen);
fas216_set_stc(info, info->scsi.SCp.phase);
else
fas216_set_stc(info, info->scsi.SCp.this_residual);
......@@ -2114,6 +2114,7 @@ request_sense:
SCpnt->SCp.buffers_residual = 0;
SCpnt->SCp.ptr = (char *)SCpnt->sense_buffer;
SCpnt->SCp.this_residual = sizeof(SCpnt->sense_buffer);
SCpnt->SCp.phase = sizeof(SCpnt->sense_buffer);
SCpnt->SCp.Message = 0;
SCpnt->SCp.Status = 0;
SCpnt->request_bufflen = sizeof(SCpnt->sense_buffer);
......
......@@ -148,10 +148,10 @@ powertecscsi_dma_setup(struct Scsi_Host *host, struct scsi_pointer *SCp,
map_dir = DMA_FROM_DEVICE,
dma_dir = DMA_MODE_READ;
dma_map_sg(dev, info->sg, bufs + 1, map_dir);
dma_map_sg(dev, info->sg, bufs, map_dir);
disable_dma(dmach);
set_dma_sg(dmach, info->sg, bufs + 1);
set_dma_sg(dmach, info->sg, bufs);
set_dma_mode(dmach, dma_dir);
enable_dma(dmach);
return fasdma_real_all;
......@@ -342,6 +342,7 @@ powertecscsi_probe(struct expansion_card *ec, const struct ecard_id *id)
info->base = base;
powertecscsi_terminator_ctl(host, term[ec->slot_no]);
info->ec = ec;
info->info.scsi.io_base = base + POWERTEC_FAS216_OFFSET;
info->info.scsi.io_shift = POWERTEC_FAS216_SHIFT;
info->info.scsi.irq = ec->irq;
......
......@@ -80,6 +80,7 @@ static inline void init_SCp(struct scsi_cmnd *SCpnt)
(page_address(SCpnt->SCp.buffer->page) +
SCpnt->SCp.buffer->offset);
SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length;
SCpnt->SCp.phase = SCpnt->request_bufflen;
#ifdef BELT_AND_BRACES
/*
......@@ -98,6 +99,7 @@ static inline void init_SCp(struct scsi_cmnd *SCpnt)
} else {
SCpnt->SCp.ptr = (unsigned char *)SCpnt->request_buffer;
SCpnt->SCp.this_residual = SCpnt->request_bufflen;
SCpnt->SCp.phase = SCpnt->request_bufflen;
}
/*
......
......@@ -61,6 +61,12 @@
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =VA_IC_BASE
ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
......
......@@ -70,7 +70,7 @@
#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
#define is_lbus_device(dev) (cpu_is_omap1510() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0))
#define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0))
#define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \
(dma_addr_t)virt_to_lbus(page_address(page)) : \
......
......@@ -65,7 +65,7 @@ struct audio_stream {
int period; /* current transfer period */
int periods; /* current count of periods registerd in the DMA engine */
spinlock_t dma_lock; /* for locking in DMA operations */
snd_pcm_substream_t *stream; /* the pcm stream */
struct snd_pcm_substream *stream; /* the pcm stream */
unsigned linked:1; /* dma channels linked */
int offset; /* store start position of the last period in the alsa buffer */
int (*hw_start)(void); /* interface to start HW interface, e.g. McBSP */
......@@ -76,8 +76,8 @@ struct audio_stream {
* Alsa card structure for aic23
*/
struct snd_card_omap_codec {
snd_card_t *card;
snd_pcm_t *pcm;
struct snd_card *card;
struct snd_pcm *pcm;
long samplerate;
struct audio_stream s[2]; /* playback & capture */
};
......@@ -89,9 +89,9 @@ struct snd_card_omap_codec {
struct omap_alsa_codec_config {
char *name;
struct omap_mcbsp_reg_cfg *mcbsp_regs_alsa;
snd_pcm_hw_constraint_list_t *hw_constraints_rates;
snd_pcm_hardware_t *snd_omap_alsa_playback;
snd_pcm_hardware_t *snd_omap_alsa_capture;
struct snd_pcm_hw_constraint_list *hw_constraints_rates;
struct snd_pcm_hardware *snd_omap_alsa_playback;
struct snd_pcm_hardware *snd_omap_alsa_capture;
void (*codec_configure_dev)(void);
void (*codec_set_samplerate)(long);
void (*codec_clock_setup)(void);
......
......@@ -167,11 +167,25 @@ extern unsigned int user_debug;
: : "r" (0) : "memory")
#define dmb() __asm__ __volatile__ ("" : : : "memory")
#endif
#define mb() dmb()
#define rmb() mb()
#define wmb() mb()
#define read_barrier_depends() do { } while(0)
#define set_mb(var, value) do { var = value; mb(); } while (0)
#define mb() barrier()
#define rmb() barrier()
#define wmb() barrier()
#define read_barrier_depends() do { } while(0)
#ifdef CONFIG_SMP
#define smp_mb() dmb()
#define smp_rmb() dmb()
#define smp_wmb() dmb()
#define smp_read_barrier_depends() read_barrier_depends()
#else
#define smp_mb() barrier()
#define smp_rmb() barrier()
#define smp_wmb() barrier()
#define smp_read_barrier_depends() read_barrier_depends()
#endif /* CONFIG_SMP */
#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
......@@ -243,22 +257,6 @@ static inline void sched_cacheflush(void)
{
}
#ifdef CONFIG_SMP
#define smp_mb() mb()
#define smp_rmb() rmb()
#define smp_wmb() wmb()
#define smp_read_barrier_depends() read_barrier_depends()
#else
#define smp_mb() barrier()
#define smp_rmb() barrier()
#define smp_wmb() barrier()
#define smp_read_barrier_depends() do { } while(0)
#endif /* CONFIG_SMP */
#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
/*
* On the StrongARM, "swp" is terminally broken since it bypasses the
......
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