Commit 421d4675 authored by Tony Lindgren's avatar Tony Lindgren

ARM: OMAP: Move omap2 IO defines

Move omap2 IO defines
parent 0ac5bc1d
......@@ -21,10 +21,6 @@
#ifndef __ASM_ARM_ARCH_DPM_PRCM_H
#define __ASM_ARM_ARCH_DPM_PRCM_H
#define OMAP24XX_32KSYNCT_BASE (L4_24XX_PHYS + 0x4000)
#define OMAP24XX_PRCM_BASE (L4_24XX_PHYS + 0x8000)
#define OMAP24XX_SDRC_BASE (L3_24XX_PHYS + 0x9000)
/* SET_PERFORMANCE_LEVEL PARAMETERS */
#define PRCM_HALF_SPEED 1
#define PRCM_FULL_SPEED 2
......
......@@ -26,7 +26,8 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/arch/io.h>
#include <asm/hardware.h>
#include "prcm.h"
#define TIMER_32KSYNCT_CR_V IO_ADDRESS(OMAP24XX_32KSYNCT_BASE + 0x010)
......
......@@ -267,8 +267,6 @@
#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00)
#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04)
#ifndef __ASSEMBLER__
/*
* ---------------------------------------------------------------------------
* Processor specific defines
......@@ -277,13 +275,11 @@
#include "omap730.h"
#include "omap1510.h"
#ifdef CONFIG_ARCH_OMAP24XX
#include "omap24xx.h"
#endif
#include "omap16xx.h"
#ifndef __ASSEMBLER__
/*
* ---------------------------------------------------------------------------
* Board specific defines
......
......@@ -65,10 +65,10 @@
#elif defined(CONFIG_ARCH_OMAP2)
/* We map both L3 and L4 on OMAP2 */
#define L3_24XX_PHYS 0x68000000
#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */
#define L3_24XX_VIRT 0xf8000000
#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
#define L4_24XX_PHYS 0x48000000
#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */
#define L4_24XX_VIRT 0xd8000000
#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
#define IO_OFFSET 0x90000000
......
#ifndef __ASM_ARCH_OMAP24XX_H
#define __ASM_ARCH_OMAP24XX_H
/*
* Please place only base defines here and put the rest in device
* specific headers. Note also that some of these defines are needed
* for omap1 to compile without adding ifdefs.
*/
#define L4_24XX_BASE 0x48000000
#define L3_24XX_BASE 0x68000000
/* interrupt controller */
#define OMAP24XX_IC_BASE (L4_24XX_PHYS + 0xfe000)
#define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
#define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE)
#define OMAP24XX_IVA_INTC_BASE 0x40000000
#define IRQ_SIR_IRQ 0x0040
#define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
#define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000)
#define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000)
#endif /* __ASM_ARCH_OMAP24XX_H */
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