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Commit 401c0aab authored by Jay Cliburn's avatar Jay Cliburn Committed by Jeff Garzik
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atl1: simplify tx packet descriptor 

The transmit packet descriptor consists of four 32-bit words, with word 3
upper bits overloaded depending upon the condition of its bits 3 and 4.
The driver currently duplicates all word 2 and some word 3 register bit
definitions unnecessarily and also uses a set of nested structures in its
definition of the TPD without good cause. This patch adds a lengthy
comment describing the TPD, eliminates duplicate TPD bit definitions,
and simplifies the TPD structure itself. It also expands the TSO check
to correctly handle custom checksum versus TSO processing using the revised
TPD definitions. Finally, shorten some variable names in the transmit
processing path to reduce line lengths, rename some variables to better
describe their purpose (e.g., nseg versus m), and add a comment or two
to better describe what the code is doing.
Signed-off-by: default avatarJay Cliburn <jacliburn@bellsouth.net>
Acked-by: default avatarChris Snook <csnook@redhat.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent c67c9a2f
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Showing with 246 additions and 220 deletions
drivers/net/atlx/atl1.c
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drivers/net/atlx/atl1.h
View file @ 401c0aab
...@@ -452,106 +452,115 @@ struct rx_free_desc { ...@@ -452,106 +452,115 @@ struct rx_free_desc {
/* __attribute__ ((packed)) is required */ /* __attribute__ ((packed)) is required */
} __attribute__ ((packed)); } __attribute__ ((packed));
/* tsopu defines */ /*
#define TSO_PARAM_BUFLEN_MASK 0x3FFF * The L1 transmit packet descriptor is comprised of four 32-bit words.
#define TSO_PARAM_BUFLEN_SHIFT 0 *
#define TSO_PARAM_DMAINT_MASK 0x0001 * 31 0
#define TSO_PARAM_DMAINT_SHIFT 14 * +---------------------------------------+
#define TSO_PARAM_PKTNT_MASK 0x0001 * | Word 0: Buffer addr lo |
#define TSO_PARAM_PKTINT_SHIFT 15 * +---------------------------------------+
#define TSO_PARAM_VLANTAG_MASK 0xFFFF * | Word 1: Buffer addr hi |
#define TSO_PARAM_VLAN_SHIFT 16 * +---------------------------------------+
* | Word 2 |
/* tsopl defines */ * +---------------------------------------+
#define TSO_PARAM_EOP_MASK 0x0001 * | Word 3 |
#define TSO_PARAM_EOP_SHIFT 0 * +---------------------------------------+
#define TSO_PARAM_COALESCE_MASK 0x0001 *
#define TSO_PARAM_COALESCE_SHIFT 1 * Words 0 and 1 combine to form a 64-bit buffer address.
#define TSO_PARAM_INSVLAG_MASK 0x0001 *
#define TSO_PARAM_INSVLAG_SHIFT 2 * Word 2 is self explanatory in the #define block below.
#define TSO_PARAM_CUSTOMCKSUM_MASK 0x0001 *
#define TSO_PARAM_CUSTOMCKSUM_SHIFT 3 * Word 3 has two forms, depending upon the state of bits 3 and 4.
#define TSO_PARAM_SEGMENT_MASK 0x0001 * If bits 3 and 4 are both zero, then bits 14:31 are unused by the
#define TSO_PARAM_SEGMENT_SHIFT 4 * hardware. Otherwise, if either bit 3 or 4 is set, the definition
#define TSO_PARAM_IPCKSUM_MASK 0x0001 * of bits 14:31 vary according to the following depiction.
#define TSO_PARAM_IPCKSUM_SHIFT 5 *
#define TSO_PARAM_TCPCKSUM_MASK 0x0001 * 0 End of packet 0 End of packet
#define TSO_PARAM_TCPCKSUM_SHIFT 6 * 1 Coalesce 1 Coalesce
#define TSO_PARAM_UDPCKSUM_MASK 0x0001 * 2 Insert VLAN tag 2 Insert VLAN tag
#define TSO_PARAM_UDPCKSUM_SHIFT 7 * 3 Custom csum enable = 0 3 Custom csum enable = 1
#define TSO_PARAM_VLANTAGGED_MASK 0x0001 * 4 Segment enable = 1 4 Segment enable = 0
#define TSO_PARAM_VLANTAGGED_SHIFT 8 * 5 Generate IP checksum 5 Generate IP checksum
#define TSO_PARAM_ETHTYPE_MASK 0x0001 * 6 Generate TCP checksum 6 Generate TCP checksum
#define TSO_PARAM_ETHTYPE_SHIFT 9 * 7 Generate UDP checksum 7 Generate UDP checksum
#define TSO_PARAM_IPHL_MASK 0x000F * 8 VLAN tagged 8 VLAN tagged
#define TSO_PARAM_IPHL_SHIFT 10 * 9 Ethernet frame type 9 Ethernet frame type
#define TSO_PARAM_TCPHDRLEN_MASK 0x000F * 10-+ 10-+
#define TSO_PARAM_TCPHDRLEN_SHIFT 14 * 11 | IP hdr length (10:13) 11 | IP hdr length (10:13)
#define TSO_PARAM_HDRFLAG_MASK 0x0001 * 12 | (num 32-bit words) 12 | (num 32-bit words)
#define TSO_PARAM_HDRFLAG_SHIFT 18 * 13-+ 13-+
#define TSO_PARAM_MSS_MASK 0x1FFF * 14-+ 14 Unused
#define TSO_PARAM_MSS_SHIFT 19 * 15 | TCP hdr length (14:17) 15 Unused
* 16 | (num 32-bit words) 16-+
/* csumpu defines */ * 17-+ 17 |
#define CSUM_PARAM_BUFLEN_MASK 0x3FFF * 18 Header TPD flag 18 |
#define CSUM_PARAM_BUFLEN_SHIFT 0 * 19-+ 19 | Payload offset
#define CSUM_PARAM_DMAINT_MASK 0x0001 * 20 | 20 | (16:23)
#define CSUM_PARAM_DMAINT_SHIFT 14 * 21 | 21 |
#define CSUM_PARAM_PKTINT_MASK 0x0001 * 22 | 22 |
#define CSUM_PARAM_PKTINT_SHIFT 15 * 23 | 23-+
#define CSUM_PARAM_VALANTAG_MASK 0xFFFF * 24 | 24-+
#define CSUM_PARAM_VALAN_SHIFT 16 * 25 | MSS (19:31) 25 |
* 26 | 26 |
/* csumpl defines*/ * 27 | 27 | Custom csum offset
#define CSUM_PARAM_EOP_MASK 0x0001 * 28 | 28 | (24:31)
#define CSUM_PARAM_EOP_SHIFT 0 * 29 | 29 |
#define CSUM_PARAM_COALESCE_MASK 0x0001 * 30 | 30 |
#define CSUM_PARAM_COALESCE_SHIFT 1 * 31-+ 31-+
#define CSUM_PARAM_INSVLAG_MASK 0x0001 */
#define CSUM_PARAM_INSVLAG_SHIFT 2
#define CSUM_PARAM_CUSTOMCKSUM_MASK 0x0001
#define CSUM_PARAM_CUSTOMCKSUM_SHIFT 3
#define CSUM_PARAM_SEGMENT_MASK 0x0001
#define CSUM_PARAM_SEGMENT_SHIFT 4
#define CSUM_PARAM_IPCKSUM_MASK 0x0001
#define CSUM_PARAM_IPCKSUM_SHIFT 5
#define CSUM_PARAM_TCPCKSUM_MASK 0x0001
#define CSUM_PARAM_TCPCKSUM_SHIFT 6
#define CSUM_PARAM_UDPCKSUM_MASK 0x0001
#define CSUM_PARAM_UDPCKSUM_SHIFT 7
#define CSUM_PARAM_VLANTAGGED_MASK 0x0001
#define CSUM_PARAM_VLANTAGGED_SHIFT 8
#define CSUM_PARAM_ETHTYPE_MASK 0x0001
#define CSUM_PARAM_ETHTYPE_SHIFT 9
#define CSUM_PARAM_IPHL_MASK 0x000F
#define CSUM_PARAM_IPHL_SHIFT 10
#define CSUM_PARAM_PLOADOFFSET_MASK 0x00FF
#define CSUM_PARAM_PLOADOFFSET_SHIFT 16
#define CSUM_PARAM_XSUMOFFSET_MASK 0x00FF
#define CSUM_PARAM_XSUMOFFSET_SHIFT 24
/* TPD descriptor */
struct tso_param {
/* The order of these declarations is important -- don't change it */
u32 tsopu; /* tso_param upper word */
u32 tsopl; /* tso_param lower word */
};
struct csum_param {
/* The order of these declarations is important -- don't change it */
u32 csumpu; /* csum_param upper word */
u32 csumpl; /* csum_param lower word */
};
union tpd_descr { /* tpd word 2 */
u64 data; #define TPD_BUFLEN_MASK 0x3FFF
struct csum_param csum; #define TPD_BUFLEN_SHIFT 0
struct tso_param tso; #define TPD_DMAINT_MASK 0x0001
}; #define TPD_DMAINT_SHIFT 14
#define TPD_PKTNT_MASK 0x0001
#define TPD_PKTINT_SHIFT 15
#define TPD_VLANTAG_MASK 0xFFFF
#define TPD_VLAN_SHIFT 16
/* tpd word 3 bits 0:13 */
#define TPD_EOP_MASK 0x0001
#define TPD_EOP_SHIFT 0
#define TPD_COALESCE_MASK 0x0001
#define TPD_COALESCE_SHIFT 1
#define TPD_INS_VL_TAG_MASK 0x0001
#define TPD_INS_VL_TAG_SHIFT 2
#define TPD_CUST_CSUM_EN_MASK 0x0001
#define TPD_CUST_CSUM_EN_SHIFT 3
#define TPD_SEGMENT_EN_MASK 0x0001
#define TPD_SEGMENT_EN_SHIFT 4
#define TPD_IP_CSUM_MASK 0x0001
#define TPD_IP_CSUM_SHIFT 5
#define TPD_TCP_CSUM_MASK 0x0001
#define TPD_TCP_CSUM_SHIFT 6
#define TPD_UDP_CSUM_MASK 0x0001
#define TPD_UDP_CSUM_SHIFT 7
#define TPD_VL_TAGGED_MASK 0x0001
#define TPD_VL_TAGGED_SHIFT 8
#define TPD_ETHTYPE_MASK 0x0001
#define TPD_ETHTYPE_SHIFT 9
#define TPD_IPHL_MASK 0x000F
#define TPD_IPHL_SHIFT 10
/* tpd word 3 bits 14:31 if segment enabled */
#define TPD_TCPHDRLEN_MASK 0x000F
#define TPD_TCPHDRLEN_SHIFT 14
#define TPD_HDRFLAG_MASK 0x0001
#define TPD_HDRFLAG_SHIFT 18
#define TPD_MSS_MASK 0x1FFF
#define TPD_MSS_SHIFT 19
/* tpd word 3 bits 16:31 if custom csum enabled */
#define TPD_PLOADOFFSET_MASK 0x00FF
#define TPD_PLOADOFFSET_SHIFT 16
#define TPD_CCSUMOFFSET_MASK 0x00FF
#define TPD_CCSUMOFFSET_SHIFT 24
struct tx_packet_desc { struct tx_packet_desc {
__le64 buffer_addr; __le64 buffer_addr;
union tpd_descr desc; __le32 word2;
__le32 word3;
}; };
/* DMA Order Settings */ /* DMA Order Settings */
......
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