ARM: OMAP: Sync with mainline

Sync with mainline

arch/arm/mm/flush.c

@@ -10,7 +10,6 @@
 #include <linux/module.h>
 #include <linux/mm.h>
 #include <linux/pagemap.h>
-#include <linux/shm.h>
 
 #include <asm/cacheflush.h>
 #include <asm/system.h>
@@ -170,54 +169,3 @@ void flush_dcache_page(struct page *page)
 	}
 }
 EXPORT_SYMBOL(flush_dcache_page);
-
-void flush_cache_mm(struct mm_struct *mm)
-{
-	if (cache_is_vivt()) {
-		if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask))
-			__cpuc_flush_user_all();
-		return;
-	}
-
-	if (cache_is_vipt_aliasing()) {
-		asm(	"mcr	p15, 0, %0, c7, c14, 0\n"
-		"	mcr	p15, 0, %0, c7, c5, 0\n"
-		"	mcr	p15, 0, %0, c7, c10, 4"
-		    :
-		    : "r" (0)
-		    : "cc");
-	}
-}
-
-void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
-{
-	if (cache_is_vivt()) {
-		if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask))
-			__cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end),
-						vma->vm_flags);
-		return;
-	}
-
-	if (cache_is_vipt_aliasing()) {
-		asm(	"mcr	p15, 0, %0, c7, c14, 0\n"
-		"	mcr	p15, 0, %0, c7, c5, 0\n"
-		"	mcr	p15, 0, %0, c7, c10, 4"
-		    :
-		    : "r" (0)
-		    : "cc");
-	}
-}
-
-void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
-{
-	if (cache_is_vivt()) {
-		if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
-			unsigned long addr = user_addr & PAGE_MASK;
-			__cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
-		}
-		return;
-	}
-
-	if (cache_is_vipt_aliasing())
-		flush_pfn_alias(pfn, user_addr);
-}

arch/arm/plat-omap/sram-fn.S

@@ -35,7 +35,7 @@ ENTRY(sram_reprogram_clock)
 	bic	r0, r0, #1 << 4			@ else clear lock bit
 	strh	r0, [r2]			@ set dpll into bypass mode
 	orr	r0, r0, #1 << 4			@ set lock bit again
-	
+
 newck:
 	strh	r1, [r3]			@ write new ckctl value
 	strh	r0, [r2]			@ write new dpll value
@@ -48,11 +48,11 @@ delay:	sub	r4, r4, #1
 
 lock:	ldrh	r4, [r2], #0			@ read back dpll value
 	tst	r0, #1 << 4			@ want lock mode?
-	beq	out				@ nope	
+	beq	out				@ nope
 	tst	r4, #1 << 0			@ dpll rate locked?
 	beq	lock				@ try again
 
 out:
-	ldmfd	sp!, {r0 - r12, pc}		@ restore regs and return	
+	ldmfd	sp!, {r0 - r12, pc}		@ restore regs and return
 ENTRY(sram_reprogram_clock_sz)
 	.word	. - sram_reprogram_clock