Commit 39ca4453 authored by Sonic Zhang's avatar Sonic Zhang Committed by Bryan Wu

Blackfin arch: Make bfin_mac built for bf51x

Signed-off-by: default avatarSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
parent 6a01f230
...@@ -18,13 +18,13 @@ ...@@ -18,13 +18,13 @@
#define P_MII0_ERxD0 (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(0)) #define P_MII0_ERxD0 (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(0))
#define P_MII0_ETxD1 (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(0)) #define P_MII0_ETxD1 (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(0))
#define P_MII0_ERxD1 (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0)) #define P_MII0_ERxD1 (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0))
#define P_MII0_ETxEn (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0)) #define P_MII0_ETxEN (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0))
#define P_MII0_PHYINT (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0)) #define P_MII0_PHYINT (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0))
#define P_MII0_CRS (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0)) #define P_MII0_CRS (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))
#define P_MII0_ERxER (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) #define P_MII0_ERxER (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
#define P_MII0_ETxCLK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(0)) #define P_MII0_TxCLK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(0))
#define P_MII {\ #define P_MII0 {\
P_MII0_ETxD0, \ P_MII0_ETxD0, \
P_MII0_ETxD1, \ P_MII0_ETxD1, \
P_MII0_ETxD2, \ P_MII0_ETxD2, \
...@@ -44,7 +44,7 @@ ...@@ -44,7 +44,7 @@
P_MII0_MDC, \ P_MII0_MDC, \
P_MII0_MDIO, 0} P_MII0_MDIO, 0}
#define P_RMII {\ #define P_RMII0 {\
P_MII0_ETxD0, \ P_MII0_ETxD0, \
P_MII0_ETxD1, \ P_MII0_ETxD1, \
P_MII0_ETxEN, \ P_MII0_ETxEN, \
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment