Commit 347df59f authored by Paul Walmsley's avatar Paul Walmsley Committed by Tony Lindgren

fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code

Fix sparse & checkpatch warnings in OMAP2/3 PRCM & PM code.  This mostly
consists of:

- converting pointer comparisons to integers in form similar to
  (ptr == 0) to the standard idiom (!ptr)

- labeling a few non-static private functions as static

- tagging appropriate integer<->pointer casts with __force

- adding prototypes for *_init() functions in the appropriate header
  files, and getting rid of the corresponding open-coded extern
  prototypes in other C files

- renaming the variable 'sclk' in mach-omap2/clock.c:omap2_get_apll_clkin
  to avoid shadowing an earlier declaration

Clean up checkpatch issues.  This mostly involves:

- converting some asm/ includes to linux/ includes

- cleaning up some whitespace

- getting rid of braces for conditionals with single following statements

Also take care of a few odds and ends, including:

- getting rid of unlikely() and likely() - none of this code is particularly
  fast-path code, so the performance impact seems slim; and some of those
  likely() and unlikely() indicators are probably not as accurate as the
  ARM's branch predictor

- removing some superfluous casts
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 5de869d6
This diff is collapsed.
......@@ -21,12 +21,13 @@
/* The maximum error between a target DPLL rate and the rounded rate in Hz */
#define DEFAULT_DPLL_RATE_TOLERANCE 50000
int omap2_clk_init(void);
int omap2_clk_enable(struct clk *clk);
void omap2_clk_disable(struct clk *clk);
long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
int omap2_clk_set_rate(struct clk *clk, unsigned long rate);
int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent);
int omap2_dpll_rate_tolerance_set(struct clk *clk, unsigned int tolerance);
int omap2_dpll_set_rate_tolerance(struct clk *clk, unsigned int tolerance);
long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate);
#ifdef CONFIG_OMAP_RESET_CLOCKS
......@@ -48,6 +49,7 @@ long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
u32 omap2_get_dpll_rate(struct clk *clk);
int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);
void omap2_clk_prepare_for_reboot(void);
extern u8 cpu_mask;
......
......@@ -24,14 +24,13 @@
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/bitops.h>
#include <linux/io.h>
#include <linux/cpufreq.h>
#include <asm/arch/clock.h>
#include <asm/arch/sram.h>
#include <asm/div64.h>
#include <asm/bitops.h>
#include "memory.h"
#include "clock.h"
......@@ -135,7 +134,7 @@ static void omap2_clk_fixed_disable(struct clk *clk)
* Uses the current prcm set to tell if a rate is valid.
* You can go slower, but not faster within a given rate set.
*/
long omap2_dpllcore_round_rate(unsigned long target_rate)
static long omap2_dpllcore_round_rate(unsigned long target_rate)
{
u32 high, low, core_clk_src;
......@@ -348,7 +347,9 @@ static int omap2_select_table_rate(struct clk *clk, unsigned long rate)
/* Major subsystem dividers */
tmp = cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & OMAP24XX_CLKSEL_DSS2_MASK;
cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD, CM_CLKSEL1);
cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD,
CM_CLKSEL1);
if (cpu_is_omap2430())
cm_write_mod_reg(prcm->cm_clksel_mdm,
OMAP2430_MDM_MOD, CM_CLKSEL);
......@@ -396,8 +397,8 @@ void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
}
if (i == 0) {
printk(KERN_WARNING "%s: failed to initialize frequency table\n",
__FUNCTION__);
printk(KERN_WARNING "%s: failed to initialize frequency "
"table\n", __func__);
return;
}
......@@ -422,20 +423,20 @@ static struct clk_functions omap2_clk_functions = {
static u32 omap2_get_apll_clkin(void)
{
u32 aplls, sclk = 0;
u32 aplls, srate = 0;
aplls = cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
aplls &= OMAP24XX_APLLS_CLKIN_MASK;
aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT;
if (aplls == APLLS_CLKIN_19_2MHZ)
sclk = 19200000;
srate = 19200000;
else if (aplls == APLLS_CLKIN_13MHZ)
sclk = 13000000;
srate = 13000000;
else if (aplls == APLLS_CLKIN_12MHZ)
sclk = 12000000;
srate = 12000000;
return sclk;
return srate;
}
static u32 omap2_get_sysclkdiv(void)
......
......@@ -134,7 +134,7 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm)
}
struct clockdomain *_clkdm_lookup(const char *name)
static struct clockdomain *_clkdm_lookup(const char *name)
{
struct clockdomain *clkdm, *temp_clkdm;
......@@ -167,7 +167,8 @@ struct clockdomain *_clkdm_lookup(const char *name)
* pointer to an array of clockdomain-powerdomain autodependencies was
* provided, register those. No return value.
*/
void clkdm_init(struct clockdomain **clkdms, struct clkdm_pwrdm_autodep *init_autodeps)
void clkdm_init(struct clockdomain **clkdms,
struct clkdm_pwrdm_autodep *init_autodeps)
{
struct clockdomain **c = NULL;
struct clkdm_pwrdm_autodep *autodep = NULL;
......
......@@ -14,13 +14,13 @@
* published by the Free Software Foundation.
*/
#include <asm/io.h>
#include <linux/io.h>
#include "prcm-common.h"
#ifndef __ASSEMBLER__
#define OMAP_CM_REGADDR(module, reg) \
(void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg))
(__force void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg))
#else
#define OMAP2420_CM_REGADDR(module, reg) \
IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
......
......@@ -28,9 +28,9 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/atomic.h>
#include <asm/mach/time.h>
#include <asm/mach/irq.h>
......@@ -62,7 +62,7 @@ static void (*saved_idle)(void);
static u32 omap2_read_32k_sync_counter(void)
{
return omap_readl(OMAP2_32KSYNCT_BASE + 0x0010);
return omap_readl(OMAP2_32KSYNCT_BASE + 0x0010);
}
#ifdef CONFIG_PM_DEBUG
......@@ -121,7 +121,8 @@ static void serial_console_sleep(int enable)
BUG_ON(serial_console_clock_disabled);
if (clk_get_usecount(console_fclk) == 0)
return;
if ((int) serial_console_next_disable - (int) omap2_read_32k_sync_counter() >= 0)
if ((int) serial_console_next_disable -
(int) omap2_read_32k_sync_counter() >= 0)
return;
serial_wait_tx();
clk_disable(console_iclk);
......@@ -190,7 +191,8 @@ static void pm_init_serial_console(void)
prm_set_mod_reg_bits(OMAP24XX_ST_UART2, CORE_MOD, PM_WKEN1);
break;
case 3:
prm_set_mod_reg_bits(OMAP24XX_ST_UART3, CORE_MOD, OMAP24XX_PM_WKEN2);
prm_set_mod_reg_bits(OMAP24XX_ST_UART3, CORE_MOD,
OMAP24XX_PM_WKEN2);
break;
}
}
......@@ -290,16 +292,19 @@ static void omap2_pm_dump(int mode, int resume, unsigned int us)
if (!resume)
#if defined(CONFIG_NO_IDLE_HZ) || defined(CONFIG_NO_HZ)
printk("--- Going to %s %s (next timer after %u ms)\n", s1, s2,
jiffies_to_msecs(get_next_timer_interrupt(jiffies) -
jiffies));
pr_debug("--- Going to %s %s (next timer after %u ms)\n", s1,
s2,
jiffies_to_msecs(get_next_timer_interrupt(jiffies) -
jiffies));
#else
printk("--- Going to %s %s\n", s1, s2);
pr_debug("--- Going to %s %s\n", s1, s2);
#endif
else
printk("--- Woke up (slept for %u.%03u ms)\n", us / 1000, us % 1000);
pr_debug("--- Woke up (slept for %u.%03u ms)\n", us / 1000,
us % 1000);
for (i = 0; i < reg_count; i++)
printk("%-20s: 0x%08x\n", regs[i].name, regs[i].val);
pr_debug("%-20s: 0x%08x\n", regs[i].name, regs[i].val);
}
#else
......@@ -321,7 +326,7 @@ static ssize_t idle_show(struct kobject *kobj, struct kobj_attribute *attr,
}
static ssize_t idle_store(struct kobject *kobj, struct kobj_attribute *attr,
const char * buf, size_t n)
const char *buf, size_t n)
{
unsigned short value;
if (sscanf(buf, "%hu", &value) != 1 ||
......@@ -352,11 +357,11 @@ static int omap2_fclks_active(void)
static int omap2_irq_pending(void)
{
u32 pending_reg = IO_ADDRESS(0x480fe098);
u32 pending_reg = 0x480fe098;
int i;
for (i = 0; i < 4; i++) {
if (__raw_readl(pending_reg))
if (omap_readl(pending_reg))
return 1;
pending_reg += 0x20;
}
......@@ -498,7 +503,7 @@ static void omap2_enter_mpu_retention(void)
/* The peripherals seem not to be able to wake up the MPU when
* it is in retention mode. */
if (omap2_allow_mpu_retention()) {
/* REVISIT: These write to reserved bits? */
/* REVISIT: These write to reserved bits? */
prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
......@@ -770,7 +775,7 @@ static void __init prcm_setup_regs(void)
WKUP_MOD, PM_WKEN);
}
int __init omap2_pm_init(void)
static int __init omap2_pm_init(void)
{
u32 l;
int error;
......
......@@ -53,7 +53,7 @@ static u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
return v;
}
struct powerdomain *_pwrdm_lookup(const char *name)
static struct powerdomain *_pwrdm_lookup(const char *name)
{
struct powerdomain *pwrdm, *temp_pwrdm;
......
......@@ -18,11 +18,12 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <asm/arch/prcm.h>
#include "clock.h"
#include "prm.h"
#include "prm-regbits-24xx.h"
extern void omap2_clk_prepare_for_reboot(void);
u32 omap_prcm_get_reset_sources(void)
{
/* XXX This presumably needs modification for 34XX */
......@@ -36,13 +37,12 @@ void omap_prcm_arch_reset(char mode)
s16 prcm_offs;
omap2_clk_prepare_for_reboot();
if (cpu_is_omap24xx()) {
if (cpu_is_omap24xx())
prcm_offs = WKUP_MOD;
} else if (cpu_is_omap34xx()) {
else if (cpu_is_omap34xx())
prcm_offs = OMAP3430_GR_MOD;
} else {
else
WARN_ON(1);
}
prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs, RM_RSTCTRL);
}
......@@ -14,14 +14,14 @@
* published by the Free Software Foundation.
*/
#include <asm/io.h>
#include <asm/bitops.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include "prcm-common.h"
#ifndef __ASSEMBLER__
#define OMAP_PRM_REGADDR(module, reg) \
(void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg))
(__force void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg))
#else
#define OMAP2420_PRM_REGADDR(module, reg) \
IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
......
......@@ -15,10 +15,9 @@
#ifndef __ARCH_ARM_OMAP_CLOCK_H
#define __ARCH_ARM_OMAP_CLOCK_H
#include <asm/arch/clockdomain.h>
struct module;
struct clk;
struct clockdomain;
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
......@@ -112,12 +111,12 @@ struct clk_functions {
extern unsigned int mpurate;
extern int clk_init(struct clk_functions * custom_clocks);
extern int clk_init(struct clk_functions *custom_clocks);
extern int clk_register(struct clk *clk);
extern void clk_unregister(struct clk *clk);
extern void propagate_rate(struct clk *clk);
extern void recalculate_root_clocks(void);
extern void followparent_recalc(struct clk * clk);
extern void followparent_recalc(struct clk *clk);
extern void clk_allow_idle(struct clk *clk);
extern void clk_deny_idle(struct clk *clk);
extern int clk_get_usecount(struct clk *clk);
......
......@@ -136,6 +136,7 @@ int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
int pwrdm_read_pwrst(struct powerdomain *pwrdm);
int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
......
......@@ -20,10 +20,11 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_DPM_PRCM_H
#define __ASM_ARM_ARCH_DPM_PRCM_H
#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
#define __ASM_ARM_ARCH_OMAP_PRCM_H
u32 omap_prcm_get_reset_sources(void);
void omap_prcm_arch_reset(char mode);
#endif
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment