Commit 25ad00bb authored by Alan Cox's avatar Alan Cox Committed by Greg Kroah-Hartman

Staging: et1310: kill pAdapter in favour of a sane name

Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 106a47ba
......@@ -143,7 +143,7 @@
/**
* EepromWriteByte - Write a byte to the ET1310's EEPROM
* @pAdapter: pointer to our private adapter structure
* @etdev: pointer to our private adapter structure
* @unAddress: the address to write
* @bData: the value to write
* @unEepronId: the ID of the EEPROM
......@@ -151,11 +151,11 @@
*
* Returns SUCCESS or FAILURE
*/
int32_t EepromWriteByte(struct et131x_adapter *pAdapter, uint32_t unAddress,
int32_t EepromWriteByte(struct et131x_adapter *etdev, uint32_t unAddress,
uint8_t bData, uint32_t unEepromId,
uint32_t unAddressingMode)
{
struct pci_dev *pdev = pAdapter->pdev;
struct pci_dev *pdev = etdev->pdev;
int32_t nIndex;
int32_t nRetries;
int32_t nError = false;
......@@ -292,7 +292,7 @@ int32_t EepromWriteByte(struct et131x_adapter *pAdapter, uint32_t unAddress,
* so we do a blind write for load bug.
*/
if (bStatus & LBCIF_STATUS_GENERAL_ERROR
&& pAdapter->RevisionID == 0) {
&& etdev->RevisionID == 0) {
break;
}
......@@ -349,7 +349,7 @@ int32_t EepromWriteByte(struct et131x_adapter *pAdapter, uint32_t unAddress,
/**
* EepromReadByte - Read a byte from the ET1310's EEPROM
* @pAdapter: pointer to our private adapter structure
* @etdev: pointer to our private adapter structure
* @unAddress: the address from which to read
* @pbData: a pointer to a byte in which to store the value of the read
* @unEepronId: the ID of the EEPROM
......@@ -357,11 +357,11 @@ int32_t EepromWriteByte(struct et131x_adapter *pAdapter, uint32_t unAddress,
*
* Returns SUCCESS or FAILURE
*/
int32_t EepromReadByte(struct et131x_adapter *pAdapter, uint32_t unAddress,
int32_t EepromReadByte(struct et131x_adapter *etdev, uint32_t unAddress,
uint8_t *pbData, uint32_t unEepromId,
uint32_t unAddressingMode)
{
struct pci_dev *pdev = pAdapter->pdev;
struct pci_dev *pdev = etdev->pdev;
int32_t nIndex;
int32_t nError = 0;
uint8_t bControl;
......
......@@ -99,27 +99,27 @@ extern dbg_info_t *et131x_dbginfo;
* ConfigGlobalRegs - Used to configure the global registers on the JAGCore
* @pAdpater: pointer to our adapter structure
*/
void ConfigGlobalRegs(struct et131x_adapter *pAdapter)
void ConfigGlobalRegs(struct et131x_adapter *etdev)
{
struct _GLOBAL_t __iomem *pGbl = &pAdapter->CSRAddress->global;
struct _GLOBAL_t __iomem *pGbl = &etdev->CSRAddress->global;
DBG_ENTER(et131x_dbginfo);
if (pAdapter->RegistryPhyLoopbk == false) {
if (pAdapter->RegistryJumboPacket < 2048) {
if (etdev->RegistryPhyLoopbk == false) {
if (etdev->RegistryJumboPacket < 2048) {
/* Tx / RxDMA and Tx/Rx MAC interfaces have a 1k word
* block of RAM that the driver can split between Tx
* and Rx as it desires. Our default is to split it
* 50/50:
*/
writel(0, &pGbl->rxq_start_addr.value);
writel(pAdapter->RegistryRxMemEnd,
writel(etdev->RegistryRxMemEnd,
&pGbl->rxq_end_addr.value);
writel(pAdapter->RegistryRxMemEnd + 1,
writel(etdev->RegistryRxMemEnd + 1,
&pGbl->txq_start_addr.value);
writel(INTERNAL_MEM_SIZE - 1,
&pGbl->txq_end_addr.value);
} else if (pAdapter->RegistryJumboPacket < 8192) {
} else if (etdev->RegistryJumboPacket < 8192) {
/* For jumbo packets > 2k but < 8k, split 50-50. */
writel(0, &pGbl->rxq_start_addr.value);
writel(INTERNAL_MEM_RX_OFFSET,
......@@ -171,9 +171,9 @@ void ConfigGlobalRegs(struct et131x_adapter *pAdapter)
/**
* ConfigMMCRegs - Used to configure the main memory registers in the JAGCore
* @pAdapter: pointer to our adapter structure
* @etdev: pointer to our adapter structure
*/
void ConfigMMCRegs(struct et131x_adapter *pAdapter)
void ConfigMMCRegs(struct et131x_adapter *etdev)
{
MMC_CTRL_t mmc_ctrl = { 0 };
......@@ -188,7 +188,7 @@ void ConfigMMCRegs(struct et131x_adapter *pAdapter)
mmc_ctrl.bits.arb_disable = 0x0;
mmc_ctrl.bits.mmc_enable = 0x1;
writel(mmc_ctrl.value, &pAdapter->CSRAddress->mmc.mmc_ctrl.value);
writel(mmc_ctrl.value, &etdev->CSRAddress->mmc.mmc_ctrl.value);
DBG_LEAVE(et131x_dbginfo);
}
......
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This diff is collapsed.
......@@ -99,7 +99,7 @@ extern dbg_info_t *et131x_dbginfo;
/**
* EnablePhyComa - called when network cable is unplugged
* @pAdapter: pointer to our adapter structure
* @etdev: pointer to our adapter structure
*
* driver receive an phy status change interrupt while in D0 and check that
* phy_status is down.
......@@ -117,7 +117,7 @@ extern dbg_info_t *et131x_dbginfo;
* indicating linkup status, call the MPDisablePhyComa routine to
* restore JAGCore and gigE PHY
*/
void EnablePhyComa(struct et131x_adapter *pAdapter)
void EnablePhyComa(struct et131x_adapter *etdev)
{
unsigned long lockflags;
PM_CSR_t GlobalPmCSR;
......@@ -125,81 +125,81 @@ void EnablePhyComa(struct et131x_adapter *pAdapter)
DBG_ENTER(et131x_dbginfo);
GlobalPmCSR.value = readl(&pAdapter->CSRAddress->global.pm_csr.value);
GlobalPmCSR.value = readl(&etdev->CSRAddress->global.pm_csr.value);
/* Save the GbE PHY speed and duplex modes. Need to restore this
* when cable is plugged back in
*/
pAdapter->PoMgmt.PowerDownSpeed = pAdapter->AiForceSpeed;
pAdapter->PoMgmt.PowerDownDuplex = pAdapter->AiForceDpx;
etdev->PoMgmt.PowerDownSpeed = etdev->AiForceSpeed;
etdev->PoMgmt.PowerDownDuplex = etdev->AiForceDpx;
/* Stop sending packets. */
spin_lock_irqsave(&pAdapter->SendHWLock, lockflags);
MP_SET_FLAG(pAdapter, fMP_ADAPTER_LOWER_POWER);
spin_unlock_irqrestore(&pAdapter->SendHWLock, lockflags);
spin_lock_irqsave(&etdev->SendHWLock, lockflags);
MP_SET_FLAG(etdev, fMP_ADAPTER_LOWER_POWER);
spin_unlock_irqrestore(&etdev->SendHWLock, lockflags);
/* Wait for outstanding Receive packets */
while ((MP_GET_RCV_REF(pAdapter) != 0) && (LoopCounter-- > 0))
while ((MP_GET_RCV_REF(etdev) != 0) && (LoopCounter-- > 0))
mdelay(2);
/* Gate off JAGCore 3 clock domains */
GlobalPmCSR.bits.pm_sysclk_gate = 0;
GlobalPmCSR.bits.pm_txclk_gate = 0;
GlobalPmCSR.bits.pm_rxclk_gate = 0;
writel(GlobalPmCSR.value, &pAdapter->CSRAddress->global.pm_csr.value);
writel(GlobalPmCSR.value, &etdev->CSRAddress->global.pm_csr.value);
/* Program gigE PHY in to Coma mode */
GlobalPmCSR.bits.pm_phy_sw_coma = 1;
writel(GlobalPmCSR.value, &pAdapter->CSRAddress->global.pm_csr.value);
writel(GlobalPmCSR.value, &etdev->CSRAddress->global.pm_csr.value);
DBG_LEAVE(et131x_dbginfo);
}
/**
* DisablePhyComa - Disable the Phy Coma Mode
* @pAdapter: pointer to our adapter structure
* @etdev: pointer to our adapter structure
*/
void DisablePhyComa(struct et131x_adapter *pAdapter)
void DisablePhyComa(struct et131x_adapter *etdev)
{
PM_CSR_t GlobalPmCSR;
DBG_ENTER(et131x_dbginfo);
GlobalPmCSR.value = readl(&pAdapter->CSRAddress->global.pm_csr.value);
GlobalPmCSR.value = readl(&etdev->CSRAddress->global.pm_csr.value);
/* Disable phy_sw_coma register and re-enable JAGCore clocks */
GlobalPmCSR.bits.pm_sysclk_gate = 1;
GlobalPmCSR.bits.pm_txclk_gate = 1;
GlobalPmCSR.bits.pm_rxclk_gate = 1;
GlobalPmCSR.bits.pm_phy_sw_coma = 0;
writel(GlobalPmCSR.value, &pAdapter->CSRAddress->global.pm_csr.value);
writel(GlobalPmCSR.value, &etdev->CSRAddress->global.pm_csr.value);
/* Restore the GbE PHY speed and duplex modes;
* Reset JAGCore; re-configure and initialize JAGCore and gigE PHY
*/
pAdapter->AiForceSpeed = pAdapter->PoMgmt.PowerDownSpeed;
pAdapter->AiForceDpx = pAdapter->PoMgmt.PowerDownDuplex;
etdev->AiForceSpeed = etdev->PoMgmt.PowerDownSpeed;
etdev->AiForceDpx = etdev->PoMgmt.PowerDownDuplex;
/* Re-initialize the send structures */
et131x_init_send(pAdapter);
et131x_init_send(etdev);
/* Reset the RFD list and re-start RU */
et131x_reset_recv(pAdapter);
et131x_reset_recv(etdev);
/* Bring the device back to the state it was during init prior to
* autonegotiation being complete. This way, when we get the auto-neg
* complete interrupt, we can complete init by calling ConfigMacREGS2.
*/
et131x_soft_reset(pAdapter);
et131x_soft_reset(etdev);
/* setup et1310 as per the documentation ?? */
et131x_adapter_setup(pAdapter);
et131x_adapter_setup(etdev);
/* Allow Tx to restart */
MP_CLEAR_FLAG(pAdapter, fMP_ADAPTER_LOWER_POWER);
MP_CLEAR_FLAG(etdev, fMP_ADAPTER_LOWER_POWER);
/* Need to re-enable Rx. */
et131x_rx_dma_enable(pAdapter);
et131x_rx_dma_enable(etdev);
DBG_LEAVE(et131x_dbginfo);
}
......
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This diff is collapsed.
......@@ -202,12 +202,12 @@ MODULE_PARM_DESC(et131x_speed_set,
/**
* et131x_config_parse
* @pAdapter: pointer to the private adapter struct
* @etdev: pointer to the private adapter struct
*
* Parses a configuration from some location (module parameters, for example)
* into the private adapter struct
*/
void et131x_config_parse(struct et131x_adapter *pAdapter)
void et131x_config_parse(struct et131x_adapter *etdev)
{
uint8_t macAddrDef[] = PARM_MAC_ADDRESS_DEF;
......@@ -237,85 +237,85 @@ void et131x_config_parse(struct et131x_adapter *pAdapter)
if (et131x_speed_set != PARM_SPEED_DUPLEX_DEF) {
DBG_VERBOSE(et131x_dbginfo, "Speed set manually to : %d \n",
et131x_speed_set);
pAdapter->SpeedDuplex = et131x_speed_set;
etdev->SpeedDuplex = et131x_speed_set;
} else {
pAdapter->SpeedDuplex = PARM_SPEED_DUPLEX_DEF;
etdev->SpeedDuplex = PARM_SPEED_DUPLEX_DEF;
}
/* pAdapter->SpeedDuplex = PARM_SPEED_DUPLEX_DEF; */
pAdapter->RegistryVlanTag = PARM_VLAN_TAG_DEF;
pAdapter->RegistryFlowControl = PARM_FLOW_CTL_DEF;
pAdapter->RegistryWOLLink = PARM_WOL_LINK_DEF;
pAdapter->RegistryWOLMatch = PARM_WOL_MATCH_DEF;
pAdapter->RegistryJumboPacket = PARM_JUMBO_PKT_DEF;
pAdapter->RegistryPhyComa = PARM_PHY_COMA_DEF;
pAdapter->RegistryRxNumBuffers = PARM_RX_NUM_BUFS_DEF;
pAdapter->RegistryRxTimeInterval = PARM_RX_TIME_INT_DEF;
pAdapter->RegistryTxNumBuffers = PARM_TX_NUM_BUFS_DEF;
pAdapter->RegistryTxTimeInterval = PARM_TX_TIME_INT_DEF;
pAdapter->RegistryRxMemEnd = PARM_RX_MEM_END_DEF;
pAdapter->RegistryMACStat = PARM_MAC_STAT_DEF;
pAdapter->RegistrySCGain = PARM_SC_GAIN_DEF;
pAdapter->RegistryPMWOL = PARM_PM_WOL_DEF;
/* etdev->SpeedDuplex = PARM_SPEED_DUPLEX_DEF; */
etdev->RegistryVlanTag = PARM_VLAN_TAG_DEF;
etdev->RegistryFlowControl = PARM_FLOW_CTL_DEF;
etdev->RegistryWOLLink = PARM_WOL_LINK_DEF;
etdev->RegistryWOLMatch = PARM_WOL_MATCH_DEF;
etdev->RegistryJumboPacket = PARM_JUMBO_PKT_DEF;
etdev->RegistryPhyComa = PARM_PHY_COMA_DEF;
etdev->RegistryRxNumBuffers = PARM_RX_NUM_BUFS_DEF;
etdev->RegistryRxTimeInterval = PARM_RX_TIME_INT_DEF;
etdev->RegistryTxNumBuffers = PARM_TX_NUM_BUFS_DEF;
etdev->RegistryTxTimeInterval = PARM_TX_TIME_INT_DEF;
etdev->RegistryRxMemEnd = PARM_RX_MEM_END_DEF;
etdev->RegistryMACStat = PARM_MAC_STAT_DEF;
etdev->RegistrySCGain = PARM_SC_GAIN_DEF;
etdev->RegistryPMWOL = PARM_PM_WOL_DEF;
if (et131x_nmi_disable != PARM_NMI_DISABLE_DEF)
pAdapter->RegistryNMIDisable = et131x_nmi_disable;
etdev->RegistryNMIDisable = et131x_nmi_disable;
else
pAdapter->RegistryNMIDisable = PARM_NMI_DISABLE_DEF;
etdev->RegistryNMIDisable = PARM_NMI_DISABLE_DEF;
pAdapter->RegistryDMACache = PARM_DMA_CACHE_DEF;
pAdapter->RegistryPhyLoopbk = PARM_PHY_LOOPBK_DEF;
etdev->RegistryDMACache = PARM_DMA_CACHE_DEF;
etdev->RegistryPhyLoopbk = PARM_PHY_LOOPBK_DEF;
/* Set the MAC address to a default */
memcpy(pAdapter->CurrentAddress, macAddrDef, ETH_ALEN);
pAdapter->bOverrideAddress = false;
memcpy(etdev->CurrentAddress, macAddrDef, ETH_ALEN);
etdev->bOverrideAddress = false;
DBG_TRACE(et131x_dbginfo,
"Default MAC Address : %02x:%02x:%02x:%02x:%02x:%02x\n",
pAdapter->CurrentAddress[0], pAdapter->CurrentAddress[1],
pAdapter->CurrentAddress[2], pAdapter->CurrentAddress[3],
pAdapter->CurrentAddress[4], pAdapter->CurrentAddress[5]);
etdev->CurrentAddress[0], etdev->CurrentAddress[1],
etdev->CurrentAddress[2], etdev->CurrentAddress[3],
etdev->CurrentAddress[4], etdev->CurrentAddress[5]);
/* Decode SpeedDuplex
*
* Set up as if we are auto negotiating always and then change if we
* go into force mode
*/
pAdapter->AiForceSpeed = 0; /* Auto speed */
pAdapter->AiForceDpx = 0; /* Auto FDX */
etdev->AiForceSpeed = 0; /* Auto speed */
etdev->AiForceDpx = 0; /* Auto FDX */
/* If we are the 10/100 device, and gigabit is somehow requested then
* knock it down to 100 full.
*/
if (pAdapter->DeviceID == ET131X_PCI_DEVICE_ID_FAST &&
pAdapter->SpeedDuplex == 5)
pAdapter->SpeedDuplex = 4;
if (etdev->DeviceID == ET131X_PCI_DEVICE_ID_FAST &&
etdev->SpeedDuplex == 5)
etdev->SpeedDuplex = 4;
switch (pAdapter->SpeedDuplex) {
switch (etdev->SpeedDuplex) {
case 1: /* 10Mb Half-Duplex */
pAdapter->AiForceSpeed = 10;
pAdapter->AiForceDpx = 1;
etdev->AiForceSpeed = 10;
etdev->AiForceDpx = 1;
break;
case 2: /* 10Mb Full-Duplex */
pAdapter->AiForceSpeed = 10;
pAdapter->AiForceDpx = 2;
etdev->AiForceSpeed = 10;
etdev->AiForceDpx = 2;
break;
case 3: /* 100Mb Half-Duplex */
pAdapter->AiForceSpeed = 100;
pAdapter->AiForceDpx = 1;
etdev->AiForceSpeed = 100;
etdev->AiForceDpx = 1;
break;
case 4: /* 100Mb Full-Duplex */
pAdapter->AiForceSpeed = 100;
pAdapter->AiForceDpx = 2;
etdev->AiForceSpeed = 100;
etdev->AiForceDpx = 2;
break;
case 5: /* 1000Mb Full-Duplex */
pAdapter->AiForceSpeed = 1000;
pAdapter->AiForceDpx = 2;
etdev->AiForceSpeed = 1000;
etdev->AiForceDpx = 2;
break;
}
......
......@@ -106,11 +106,11 @@ extern dbg_info_t *et131x_dbginfo;
/**
* DumpTxQueueContents - Dump out the tx queue and the shadow pointers
* @pAdapter: pointer to our adapter structure
* @etdev: pointer to our adapter structure
*/
void DumpTxQueueContents(int dbgLvl, struct et131x_adapter *pAdapter)
void DumpTxQueueContents(int dbgLvl, struct et131x_adapter *etdev)
{
MMC_t __iomem *mmc = &pAdapter->CSRAddress->mmc;
MMC_t __iomem *mmc = &etdev->CSRAddress->mmc;
uint32_t TxQueueAddr;
if (DBG_FLAGS(et131x_dbginfo) & dbgLvl) {
......@@ -134,24 +134,24 @@ void DumpTxQueueContents(int dbgLvl, struct et131x_adapter *pAdapter)
}
DBG_PRINT("Shadow Pointers 0x%08x\n",
readl(&pAdapter->CSRAddress->txmac.shadow_ptr.value));
readl(&etdev->CSRAddress->txmac.shadow_ptr.value));
}
}
/**
* DumpDeviceBlock
* @pAdapter: pointer to our adapter
* @etdev: pointer to our adapter
*
* Dumps the first 64 regs of each block of the et-1310 (each block is
* mapped to a new page, each page is 4096 bytes).
*/
#define NUM_BLOCKS 8
void DumpDeviceBlock(int dbgLvl, struct et131x_adapter *pAdapter,
void DumpDeviceBlock(int dbgLvl, struct et131x_adapter *etdev,
uint32_t Block)
{
uint32_t Address1, Address2;
uint32_t __iomem *BigDevicePointer =
(uint32_t __iomem *) pAdapter->CSRAddress;
(uint32_t __iomem *) etdev->CSRAddress;
const char *BlockNames[NUM_BLOCKS] = {
"Global", "Tx DMA", "Rx DMA", "Tx MAC",
"Rx MAC", "MAC", "MAC Stat", "MMC"
......@@ -179,17 +179,17 @@ void DumpDeviceBlock(int dbgLvl, struct et131x_adapter *pAdapter,
/**
* DumpDeviceReg
* @pAdapter: pointer to our adapter
* @etdev: pointer to our adapter
*
* Dumps the first 64 regs of each block of the et-1310 (each block is
* mapped to a new page, each page is 4096 bytes).
*/
void DumpDeviceReg(int dbgLvl, struct et131x_adapter *pAdapter)
void DumpDeviceReg(int dbgLvl, struct et131x_adapter *etdev)
{
uint32_t Address1, Address2;
uint32_t Block;
uint32_t __iomem *BigDevicePointer =
(uint32_t __iomem *) pAdapter->CSRAddress;
(uint32_t __iomem *) etdev->CSRAddress;
uint32_t __iomem *Pointer;
const char *BlockNames[NUM_BLOCKS] = {
"Global", "Tx DMA", "Rx DMA", "Tx MAC",
......
......@@ -447,40 +447,40 @@ int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
*/
void et131x_error_timer_handler(unsigned long data)
{
struct et131x_adapter *pAdapter = (struct et131x_adapter *) data;
struct et131x_adapter *etdev = (struct et131x_adapter *) data;
PM_CSR_t pm_csr;
pm_csr.value = readl(&pAdapter->CSRAddress->global.pm_csr.value);
pm_csr.value = readl(&etdev->CSRAddress->global.pm_csr.value);
if (pm_csr.bits.pm_phy_sw_coma == 0) {
if (pAdapter->RegistryMACStat)
UpdateMacStatHostCounters(pAdapter);
if (etdev->RegistryMACStat)
UpdateMacStatHostCounters(etdev);
} else
DBG_VERBOSE(et131x_dbginfo,
"No interrupts, in PHY coma, pm_csr = 0x%x\n",
pm_csr.value);
if (!pAdapter->Bmsr.bits.link_status &&
pAdapter->RegistryPhyComa &&
pAdapter->PoMgmt.TransPhyComaModeOnBoot < 11) {
pAdapter->PoMgmt.TransPhyComaModeOnBoot++;
if (!etdev->Bmsr.bits.link_status &&
etdev->RegistryPhyComa &&
etdev->PoMgmt.TransPhyComaModeOnBoot < 11) {
etdev->PoMgmt.TransPhyComaModeOnBoot++;
}
if (pAdapter->PoMgmt.TransPhyComaModeOnBoot == 10) {
if (!pAdapter->Bmsr.bits.link_status
&& pAdapter->RegistryPhyComa) {
if (etdev->PoMgmt.TransPhyComaModeOnBoot == 10) {
if (!etdev->Bmsr.bits.link_status
&& etdev->RegistryPhyComa) {
if (pm_csr.bits.pm_phy_sw_coma == 0) {
/* NOTE - This was originally a 'sync with
* interrupt'. How to do that under Linux?
*/
et131x_enable_interrupts(pAdapter);
EnablePhyComa(pAdapter);
et131x_enable_interrupts(etdev);
EnablePhyComa(etdev);
}
}
}
/* This is a periodic timer, so reschedule */
mod_timer(&pAdapter->ErrorTimer, jiffies +
mod_timer(&etdev->ErrorTimer, jiffies +
TX_ERROR_PERIOD * HZ / 1000);
}
......@@ -491,23 +491,23 @@ void et131x_error_timer_handler(unsigned long data)
*/
void et131x_link_detection_handler(unsigned long data)
{
struct et131x_adapter *pAdapter = (struct et131x_adapter *) data;
struct et131x_adapter *etdev = (struct et131x_adapter *) data;
unsigned long lockflags;
/* Let everyone know that we have run */
pAdapter->bLinkTimerActive = false;
etdev->bLinkTimerActive = false;
if (pAdapter->MediaState == 0) {
spin_lock_irqsave(&pAdapter->Lock, lockflags);
if (etdev->MediaState == 0) {
spin_lock_irqsave(&etdev->Lock, lockflags);
pAdapter->MediaState = NETIF_STATUS_MEDIA_DISCONNECT;
MP_CLEAR_FLAG(pAdapter, fMP_ADAPTER_LINK_DETECTION);
etdev->MediaState = NETIF_STATUS_MEDIA_DISCONNECT;
MP_CLEAR_FLAG(etdev, fMP_ADAPTER_LINK_DETECTION);
spin_unlock_irqrestore(&pAdapter->Lock, lockflags);
spin_unlock_irqrestore(&etdev->Lock, lockflags);
netif_carrier_off(pAdapter->netdev);
netif_carrier_off(etdev->netdev);
pAdapter->bSetPending = false;
etdev->bSetPending = false;
}
}
......@@ -517,54 +517,54 @@ void et131x_link_detection_handler(unsigned long data)
*
* Returns 0 on success, errno on failure (as defined in errno.h)
*/
int et131x_adapter_setup(struct et131x_adapter *pAdapter)
int et131x_adapter_setup(struct et131x_adapter *etdev)
{
int status = 0;
DBG_ENTER(et131x_dbginfo);
/* Configure the JAGCore */
ConfigGlobalRegs(pAdapter);
ConfigGlobalRegs(etdev);
ConfigMACRegs1(pAdapter);
ConfigMMCRegs(pAdapter);
ConfigMACRegs1(etdev);
ConfigMMCRegs(etdev);
ConfigRxMacRegs(pAdapter);
ConfigTxMacRegs(pAdapter);
ConfigRxMacRegs(etdev);
ConfigTxMacRegs(etdev);
ConfigRxDmaRegs(pAdapter);
ConfigTxDmaRegs(pAdapter);
ConfigRxDmaRegs(etdev);
ConfigTxDmaRegs(etdev);
ConfigMacStatRegs(pAdapter);
ConfigMacStatRegs(etdev);
/* Move the following code to Timer function?? */
status = et131x_xcvr_find(pAdapter);
status = et131x_xcvr_find(etdev);
if (status != 0)
DBG_WARNING(et131x_dbginfo, "Could not find the xcvr\n");
/* Prepare the TRUEPHY library. */
ET1310_PhyInit(pAdapter);
ET1310_PhyInit(etdev);
/* Reset the phy now so changes take place */
ET1310_PhyReset(pAdapter);
ET1310_PhyReset(etdev);
/* Power down PHY */
ET1310_PhyPowerDown(pAdapter, 1);
ET1310_PhyPowerDown(etdev, 1);
/*
* We need to turn off 1000 base half dulplex, the mac does not
* support it. For the 10/100 part, turn off all gig advertisement
*/
if (pAdapter->DeviceID != ET131X_PCI_DEVICE_ID_FAST)
ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL);
if (etdev->DeviceID != ET131X_PCI_DEVICE_ID_FAST)
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_FULL);
else
ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE);
ET1310_PhyAdvertise1000BaseT(etdev, TRUEPHY_ADV_DUPLEX_NONE);
/* Power up PHY */
ET1310_PhyPowerDown(pAdapter, 0);
ET1310_PhyPowerDown(etdev, 0);
et131x_setphy_normal(pAdapter);
et131x_setphy_normal(etdev);
DBG_LEAVE(et131x_dbginfo);
return status;
......
......@@ -211,10 +211,10 @@ out:
*/
void et131x_isr_handler(struct work_struct *work)
{
struct et131x_adapter *pAdapter =
struct et131x_adapter *etdev =
container_of(work, struct et131x_adapter, task);
INTERRUPT_t GlobStatus = pAdapter->Stats.InterruptStatus;
ADDRESS_MAP_t __iomem *iomem = pAdapter->CSRAddress;
INTERRUPT_t GlobStatus = etdev->Stats.InterruptStatus;
ADDRESS_MAP_t __iomem *iomem = etdev->CSRAddress;
/*
* These first two are by far the most common. Once handled, we clear
......@@ -224,13 +224,13 @@ void et131x_isr_handler(struct work_struct *work)
/* Handle all the completed Transmit interrupts */
if (GlobStatus.bits.txdma_isr) {
DBG_TX(et131x_dbginfo, "TXDMA_ISR interrupt\n");
et131x_handle_send_interrupt(pAdapter);
et131x_handle_send_interrupt(etdev);
}
/* Handle all the completed Receives interrupts */
if (GlobStatus.bits.rxdma_xfr_done) {
DBG_RX(et131x_dbginfo, "RXDMA_XFR_DONE interrupt\n");
et131x_handle_recv_interrupt(pAdapter);
et131x_handle_recv_interrupt(etdev);
}
GlobStatus.value &= 0xffffffd7;
......@@ -272,8 +272,8 @@ void et131x_isr_handler(struct work_struct *work)
/* If the user has flow control on, then we will
* send a pause packet, otherwise just exit
*/
if (pAdapter->FlowControl == TxOnly ||
pAdapter->FlowControl == Both) {
if (etdev->FlowControl == TxOnly ||
etdev->FlowControl == Both) {
PM_CSR_t pm_csr;
/* Tell the device to send a pause packet via
......@@ -330,11 +330,11 @@ void et131x_isr_handler(struct work_struct *work)
*/
/* TRAP();*/
pAdapter->TxMacTest.value =
etdev->TxMacTest.value =
readl(&iomem->txmac.tx_test.value);
DBG_WARNING(et131x_dbginfo,
"RxDMA_ERR interrupt, error %x\n",
pAdapter->TxMacTest.value);
etdev->TxMacTest.value);
}
/* Handle the Wake on LAN Event */
......@@ -370,23 +370,23 @@ void et131x_isr_handler(struct work_struct *work)
DBG_VERBOSE(et131x_dbginfo,
"Device is in COMA mode, "
"need to wake up\n");
DisablePhyComa(pAdapter);
DisablePhyComa(etdev);
}
/* Read the PHY ISR to clear the reason for the
* interrupt.
*/
MiRead(pAdapter, (uint8_t) offsetof(MI_REGS_t, isr),
MiRead(etdev, (uint8_t) offsetof(MI_REGS_t, isr),
&myIsr.value);
if (!pAdapter->ReplicaPhyLoopbk) {
MiRead(pAdapter,
if (!etdev->ReplicaPhyLoopbk) {
MiRead(etdev,
(uint8_t) offsetof(MI_REGS_t, bmsr),
&BmsrData.value);
BmsrInts.value =
pAdapter->Bmsr.value ^ BmsrData.value;
pAdapter->Bmsr.value = BmsrData.value;
etdev->Bmsr.value ^ BmsrData.value;
etdev->Bmsr.value = BmsrData.value;
DBG_VERBOSE(et131x_dbginfo,
"Bmsr.value = 0x%04x,"
......@@ -394,13 +394,13 @@ void et131x_isr_handler(struct work_struct *work)
BmsrData.value, BmsrInts.value);
/* Do all the cable in / cable out stuff */
et131x_Mii_check(pAdapter, BmsrData, BmsrInts);
et131x_Mii_check(etdev, BmsrData, BmsrInts);
}
}
/* Let's move on to the TxMac */
if (GlobStatus.bits.txmac_interrupt) {
pAdapter->TxRing.TxMacErr.value =
etdev->TxRing.TxMacErr.value =
readl(&iomem->txmac.err.value);
/*
......@@ -415,7 +415,7 @@ void et131x_isr_handler(struct work_struct *work)
*/
DBG_WARNING(et131x_dbginfo,
"TXMAC interrupt, error 0x%08x\n",
pAdapter->TxRing.TxMacErr.value);
etdev->TxRing.TxMacErr.value);
/* If we are debugging, we want to see this error,
* otherwise we just want the device to be reset and
......@@ -432,7 +432,7 @@ void et131x_isr_handler(struct work_struct *work)
* set the flag to cause us to reset so we can solve
* this issue.
*/
/* MP_SET_FLAG( pAdapter,
/* MP_SET_FLAG( etdev,
fMP_ADAPTER_HARDWARE_ERROR); */
DBG_WARNING(et131x_dbginfo,
......@@ -461,7 +461,7 @@ void et131x_isr_handler(struct work_struct *work)
* counter(s).
*/
DBG_VERBOSE(et131x_dbginfo, "MAC_STAT interrupt\n");
HandleMacStatInterrupt(pAdapter);
HandleMacStatInterrupt(etdev);
}
/* Handle SLV Timeout Interrupt */
......@@ -479,6 +479,6 @@ void et131x_isr_handler(struct work_struct *work)
}
}
if (pAdapter->PoMgmt.PowerState == NdisDeviceStateD0)
et131x_enable_interrupts(pAdapter);
if (etdev->PoMgmt.PowerState == NdisDeviceStateD0)
et131x_enable_interrupts(etdev);
}
......@@ -308,7 +308,7 @@ int et131x_close(struct net_device *netdev)
int et131x_ioctl_mii(struct net_device *netdev, struct ifreq *reqbuf, int cmd)
{
int status = 0;
struct et131x_adapter *pAdapter = netdev_priv(netdev);
struct et131x_adapter *etdev = netdev_priv(netdev);
struct mii_ioctl_data *data = if_mii(reqbuf);
DBG_ENTER(et131x_dbginfo);
......@@ -316,7 +316,7 @@ int et131x_ioctl_mii(struct net_device *netdev, struct ifreq *reqbuf, int cmd)
switch (cmd) {
case SIOCGMIIPHY:
DBG_VERBOSE(et131x_dbginfo, "SIOCGMIIPHY\n");
data->phy_id = pAdapter->Stats.xcvr_addr;
data->phy_id = etdev->Stats.xcvr_addr;
break;
case SIOCGMIIREG:
......@@ -324,7 +324,7 @@ int et131x_ioctl_mii(struct net_device *netdev, struct ifreq *reqbuf, int cmd)
if (!capable(CAP_NET_ADMIN)) {
status = -EPERM;
} else {
status = MiRead(pAdapter,
status = MiRead(etdev,
data->reg_num, &data->val_out);
}
break;
......@@ -334,7 +334,7 @@ int et131x_ioctl_mii(struct net_device *netdev, struct ifreq *reqbuf, int cmd)
if (!capable(CAP_NET_ADMIN)) {
status = -EPERM;
} else {
status = MiWrite(pAdapter, data->reg_num,
status = MiWrite(etdev, data->reg_num,
data->val_in);
}
break;
......@@ -608,14 +608,14 @@ int et131x_tx(struct sk_buff *skb, struct net_device *netdev)
*/
void et131x_tx_timeout(struct net_device *netdev)
{
struct et131x_adapter *pAdapter = netdev_priv(netdev);
struct et131x_adapter *etdev = netdev_priv(netdev);
PMP_TCB pMpTcb;
unsigned long lockflags;
DBG_WARNING(et131x_dbginfo, "TX TIMEOUT\n");
/* Just skip this part if the adapter is doing link detection */
if (MP_TEST_FLAG(pAdapter, fMP_ADAPTER_LINK_DETECTION)) {
if (MP_TEST_FLAG(etdev, fMP_ADAPTER_LINK_DETECTION)) {
DBG_ERROR(et131x_dbginfo, "Still doing link detection\n");
return;
}
......@@ -623,21 +623,21 @@ void et131x_tx_timeout(struct net_device *netdev)
/* Any nonrecoverable hardware error?
* Checks adapter->flags for any failure in phy reading
*/
if (MP_TEST_FLAG(pAdapter, fMP_ADAPTER_NON_RECOVER_ERROR)) {
if (MP_TEST_FLAG(etdev, fMP_ADAPTER_NON_RECOVER_ERROR)) {
DBG_WARNING(et131x_dbginfo, "Non recoverable error - remove\n");
return;
}
/* Hardware failure? */
if (MP_TEST_FLAG(pAdapter, fMP_ADAPTER_HARDWARE_ERROR)) {
if (MP_TEST_FLAG(etdev, fMP_ADAPTER_HARDWARE_ERROR)) {
DBG_WARNING(et131x_dbginfo, "hardware error - reset\n");
return;
}
/* Is send stuck? */
spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags);
spin_lock_irqsave(&etdev->TCBSendQLock, lockflags);
pMpTcb = pAdapter->TxRing.CurrSendHead;
pMpTcb = etdev->TxRing.CurrSendHead;
if (pMpTcb != NULL) {
pMpTcb->Count++;
......@@ -645,21 +645,21 @@ void et131x_tx_timeout(struct net_device *netdev)
if (pMpTcb->Count > NIC_SEND_HANG_THRESHOLD) {
#ifdef CONFIG_ET131X_DEBUG
TX_STATUS_BLOCK_t txDmaComplete =
*(pAdapter->TxRing.pTxStatusVa);
*(etdev->TxRing.pTxStatusVa);
PTX_DESC_ENTRY_t pDesc =
pAdapter->TxRing.pTxDescRingVa +
etdev->TxRing.pTxDescRingVa +
pMpTcb->WrIndex.bits.val;
#endif
TX_DESC_ENTRY_t StuckDescriptors[10];
if (pMpTcb->WrIndex.bits.val > 7) {
memcpy(StuckDescriptors,
pAdapter->TxRing.pTxDescRingVa +
etdev->TxRing.pTxDescRingVa +
pMpTcb->WrIndex.bits.val - 6,
sizeof(TX_DESC_ENTRY_t) * 10);
}
spin_unlock_irqrestore(&pAdapter->TCBSendQLock,
spin_unlock_irqrestore(&etdev->TCBSendQLock,
lockflags);
DBG_WARNING(et131x_dbginfo,
......@@ -677,10 +677,10 @@ void et131x_tx_timeout(struct net_device *netdev)
"WbStatus 0x%08x\n", txDmaComplete.value);
#ifdef CONFIG_ET131X_DEBUG
DumpDeviceBlock(DBG_WARNING_ON, pAdapter, 0);
DumpDeviceBlock(DBG_WARNING_ON, pAdapter, 1);
DumpDeviceBlock(DBG_WARNING_ON, pAdapter, 3);
DumpDeviceBlock(DBG_WARNING_ON, pAdapter, 5);
DumpDeviceBlock(DBG_WARNING_ON, etdev, 0);
DumpDeviceBlock(DBG_WARNING_ON, etdev, 1);
DumpDeviceBlock(DBG_WARNING_ON, etdev, 3);
DumpDeviceBlock(DBG_WARNING_ON, etdev, 5);
#endif
et131x_close(netdev);
et131x_open(netdev);
......@@ -689,7 +689,7 @@ void et131x_tx_timeout(struct net_device *netdev)
}
}
spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags);
spin_unlock_irqrestore(&etdev->TCBSendQLock, lockflags);
}
/**
......
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