Commit 20cfb41b authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Kumar Gala

powerpc/83xx: Fix few build errors with CONFIG_QUICC_ENGINE=n

Some 83xx boards were not ready for the optional QUICC Engine support.

This patch fixes following build errors:

arch/powerpc/platforms/built-in.o: In function `flush_disable_caches':
(.text+0xb308): undefined reference to `par_io_data_set'
arch/powerpc/platforms/built-in.o: In function `flush_disable_caches':
(.text+0xb334): undefined reference to `par_io_data_set'
arch/powerpc/platforms/built-in.o: In function `flush_disable_caches':
(.text+0xb408): undefined reference to `qe_ic_get_high_irq'
arch/powerpc/platforms/built-in.o: In function `flush_disable_caches':
(.text+0xb478): undefined reference to `qe_ic_get_low_irq'
arch/powerpc/platforms/built-in.o: In function `mpc832x_spi_init':
mpc832x_rdb.c:(.init.text+0x574c): undefined reference to `par_io_config_pin'
mpc832x_rdb.c:(.init.text+0x5768): undefined reference to `par_io_config_pin'
mpc832x_rdb.c:(.init.text+0x5784): undefined reference to `par_io_config_pin'
mpc832x_rdb.c:(.init.text+0x57a0): undefined reference to `par_io_config_pin'
mpc832x_rdb.c:(.init.text+0x57bc): undefined reference to `par_io_config_pin'
arch/powerpc/platforms/built-in.o:mpc832x_rdb.c:(.init.text+0x57d8): more undefined references to `par_io_config_pin' follow
arch/powerpc/platforms/built-in.o: In function `mpc836x_rdk_init_IRQ':
mpc836x_rdk.c:(.init.text+0x5e84): undefined reference to `qe_ic_init'
arch/powerpc/platforms/built-in.o: In function `mpc836x_rdk_setup_arch':
mpc836x_rdk.c:(.init.text+0x5f10): undefined reference to `qe_reset'
make: *** [.tmp_vmlinux1] Error 1
Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent c9dadffb
...@@ -38,6 +38,7 @@ ...@@ -38,6 +38,7 @@
#define DBG(fmt...) #define DBG(fmt...)
#endif #endif
#ifdef CONFIG_QUICC_ENGINE
static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity) static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity)
{ {
pr_debug("%s %d %d\n", __func__, cs, polarity); pr_debug("%s %d %d\n", __func__, cs, polarity);
...@@ -77,8 +78,8 @@ static int __init mpc832x_spi_init(void) ...@@ -77,8 +78,8 @@ static int __init mpc832x_spi_init(void)
mpc83xx_spi_activate_cs, mpc83xx_spi_activate_cs,
mpc83xx_spi_deactivate_cs); mpc83xx_spi_deactivate_cs);
} }
machine_device_initcall(mpc832x_rdb, mpc832x_spi_init); machine_device_initcall(mpc832x_rdb, mpc832x_spi_init);
#endif /* CONFIG_QUICC_ENGINE */
/* ************************************************************************ /* ************************************************************************
* *
......
...@@ -51,8 +51,9 @@ static void __init mpc836x_rdk_setup_arch(void) ...@@ -51,8 +51,9 @@ static void __init mpc836x_rdk_setup_arch(void)
for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
mpc83xx_add_bridge(np); mpc83xx_add_bridge(np);
#endif #endif
#ifdef CONFIG_QUICC_ENGINE
qe_reset(); qe_reset();
#endif
} }
static void __init mpc836x_rdk_init_IRQ(void) static void __init mpc836x_rdk_init_IRQ(void)
...@@ -71,13 +72,14 @@ static void __init mpc836x_rdk_init_IRQ(void) ...@@ -71,13 +72,14 @@ static void __init mpc836x_rdk_init_IRQ(void)
*/ */
ipic_set_default_priority(); ipic_set_default_priority();
of_node_put(np); of_node_put(np);
#ifdef CONFIG_QUICC_ENGINE
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
if (!np) if (!np)
return; return;
qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic); qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
of_node_put(np); of_node_put(np);
#endif
} }
/* /*
......
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