Commit 1d3c36ad authored by Andrew Lutomirski's avatar Andrew Lutomirski Committed by Eric Anholt

drm/i915: Fix RC6 suspend/resume

We restored RC6 twice on resume, even with modesetting off.  Instead,
only restore it once and skip RC6 initialization entirely in non-KMS mode.
Signed-off-by: default avatarAndy Lutomirski <luto@mit.edu>
Tested-by: default avatarJeff Chua <jeff.chua.linux@gmail.com>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent 76446cac
......@@ -307,8 +307,6 @@ typedef struct drm_i915_private {
u32 saveDSPACNTR;
u32 saveDSPBCNTR;
u32 saveDSPARB;
u32 saveRENDERSTANDBY;
u32 savePWRCTXA;
u32 saveHWS;
u32 savePIPEACONF;
u32 savePIPEBCONF;
......
......@@ -732,12 +732,6 @@ int i915_save_state(struct drm_device *dev)
pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
/* Render Standby */
if (I915_HAS_RC6(dev)) {
dev_priv->saveRENDERSTANDBY = I915_READ(MCHBAR_RENDER_STANDBY);
dev_priv->savePWRCTXA = I915_READ(PWRCTXA);
}
/* Hardware status page */
dev_priv->saveHWS = I915_READ(HWS_PGA);
......@@ -793,12 +787,6 @@ int i915_restore_state(struct drm_device *dev)
pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
/* Render Standby */
if (I915_HAS_RC6(dev)) {
I915_WRITE(MCHBAR_RENDER_STANDBY, dev_priv->saveRENDERSTANDBY);
I915_WRITE(PWRCTXA, dev_priv->savePWRCTXA);
}
/* Hardware status page */
I915_WRITE(HWS_PGA, dev_priv->saveHWS);
......
......@@ -4593,7 +4593,7 @@ void intel_init_clock_gating(struct drm_device *dev)
* GPU can automatically power down the render unit if given a page
* to save state.
*/
if (I915_HAS_RC6(dev)) {
if (I915_HAS_RC6(dev) && drm_core_check_feature(dev, DRIVER_MODESET)) {
struct drm_gem_object *pwrctx;
struct drm_i915_gem_object *obj_priv;
int ret;
......
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