Commit 19b8cba2 authored by David S. Miller's avatar David S. Miller
parents 263e69cb adef199c
...@@ -743,6 +743,8 @@ P: Nick Kossifidis ...@@ -743,6 +743,8 @@ P: Nick Kossifidis
M: mickflemm@gmail.com M: mickflemm@gmail.com
P: Luis R. Rodriguez P: Luis R. Rodriguez
M: mcgrof@gmail.com M: mcgrof@gmail.com
P: Bob Copeland
M: me@bobcopeland.com
L: linux-wireless@vger.kernel.org L: linux-wireless@vger.kernel.org
L: ath5k-devel@lists.ath5k.org L: ath5k-devel@lists.ath5k.org
S: Maintained S: Maintained
......
...@@ -2942,10 +2942,8 @@ static void ath5k_configure_filter(struct ieee80211_hw *hw, ...@@ -2942,10 +2942,8 @@ static void ath5k_configure_filter(struct ieee80211_hw *hw,
sc->opmode != NL80211_IFTYPE_MESH_POINT && sc->opmode != NL80211_IFTYPE_MESH_POINT &&
test_bit(ATH_STAT_PROMISC, sc->status)) test_bit(ATH_STAT_PROMISC, sc->status))
rfilt |= AR5K_RX_FILTER_PROM; rfilt |= AR5K_RX_FILTER_PROM;
if (sc->opmode == NL80211_IFTYPE_STATION || if (sc->opmode == NL80211_IFTYPE_ADHOC)
sc->opmode == NL80211_IFTYPE_ADHOC) {
rfilt |= AR5K_RX_FILTER_BEACON; rfilt |= AR5K_RX_FILTER_BEACON;
}
/* Set filters */ /* Set filters */
ath5k_hw_set_rx_filter(ah,rfilt); ath5k_hw_set_rx_filter(ah,rfilt);
......
...@@ -339,7 +339,7 @@ static struct { ...@@ -339,7 +339,7 @@ static struct {
{ ATH5K_DEBUG_BEACON, "beacon", "beacon handling" }, { ATH5K_DEBUG_BEACON, "beacon", "beacon handling" },
{ ATH5K_DEBUG_CALIBRATE, "calib", "periodic calibration" }, { ATH5K_DEBUG_CALIBRATE, "calib", "periodic calibration" },
{ ATH5K_DEBUG_TXPOWER, "txpower", "transmit power setting" }, { ATH5K_DEBUG_TXPOWER, "txpower", "transmit power setting" },
{ ATH5K_DEBUG_LED, "led", "LED mamagement" }, { ATH5K_DEBUG_LED, "led", "LED management" },
{ ATH5K_DEBUG_DUMP_RX, "dumprx", "print received skb content" }, { ATH5K_DEBUG_DUMP_RX, "dumprx", "print received skb content" },
{ ATH5K_DEBUG_DUMP_TX, "dumptx", "print transmit skb content" }, { ATH5K_DEBUG_DUMP_TX, "dumptx", "print transmit skb content" },
{ ATH5K_DEBUG_DUMPBANDS, "dumpbands", "dump bands" }, { ATH5K_DEBUG_DUMPBANDS, "dumpbands", "dump bands" },
......
...@@ -806,6 +806,8 @@ static const struct ath5k_ini_mode ar5212_rf5111_ini_mode_end[] = { ...@@ -806,6 +806,8 @@ static const struct ath5k_ini_mode ar5212_rf5111_ini_mode_end[] = {
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
{ AR5K_PHY(642), { AR5K_PHY(642),
{ 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } }, { 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } },
{ 0xa228,
{ 0x000001b5, 0x000001b5, 0x000001b5, 0x000001b5, 0x000001b5 } },
{ 0xa23c, { 0xa23c,
{ 0x13c889af, 0x13c889af, 0x13c889af, 0x13c889af, 0x13c889af } }, { 0x13c889af, 0x13c889af, 0x13c889af, 0x13c889af, 0x13c889af } },
}; };
......
...@@ -537,9 +537,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, ...@@ -537,9 +537,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
mdelay(1); mdelay(1);
/* /*
* Write some more initial register settings * Write some more initial register settings for revised chips
*/ */
if (ah->ah_version == AR5K_AR5212) { if (ah->ah_version == AR5K_AR5212 &&
ah->ah_phy_revision > 0x41) {
ath5k_hw_reg_write(ah, 0x0002a002, 0x982c); ath5k_hw_reg_write(ah, 0x0002a002, 0x982c);
if (channel->hw_value == CHANNEL_G) if (channel->hw_value == CHANNEL_G)
...@@ -558,19 +559,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, ...@@ -558,19 +559,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
else else
ath5k_hw_reg_write(ah, 0x00000000, 0x994c); ath5k_hw_reg_write(ah, 0x00000000, 0x994c);
/* Some bits are disabled here, we know nothing about /* Got this from legacy-hal */
* register 0xa228 yet, most of the times this ends up AR5K_REG_DISABLE_BITS(ah, 0xa228, 0x200);
* with a value 0x9b5 -haven't seen any dump with
* a different value- */ AR5K_REG_MASKED_BITS(ah, 0xa228, 0x800, 0xfffe03ff);
/* Got this from decompiling binary HAL */
data = ath5k_hw_reg_read(ah, 0xa228);
data &= 0xfffffdff;
ath5k_hw_reg_write(ah, data, 0xa228);
data = ath5k_hw_reg_read(ah, 0xa228);
data &= 0xfffe03ff;
ath5k_hw_reg_write(ah, data, 0xa228);
data = 0;
/* Just write 0x9b5 ? */ /* Just write 0x9b5 ? */
/* ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); */ /* ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); */
......
...@@ -2090,7 +2090,6 @@ static void iwl_alive_start(struct iwl_priv *priv) ...@@ -2090,7 +2090,6 @@ static void iwl_alive_start(struct iwl_priv *priv)
iwl4965_error_recovery(priv); iwl4965_error_recovery(priv);
iwl_power_update_mode(priv, 1); iwl_power_update_mode(priv, 1);
ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status)) if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
iwl4965_set_mode(priv, priv->iw_mode); iwl4965_set_mode(priv, priv->iw_mode);
...@@ -2342,6 +2341,7 @@ static void iwl_bg_alive_start(struct work_struct *data) ...@@ -2342,6 +2341,7 @@ static void iwl_bg_alive_start(struct work_struct *data)
mutex_lock(&priv->mutex); mutex_lock(&priv->mutex);
iwl_alive_start(priv); iwl_alive_start(priv);
mutex_unlock(&priv->mutex); mutex_unlock(&priv->mutex);
ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
} }
static void iwl4965_bg_rf_kill(struct work_struct *work) static void iwl4965_bg_rf_kill(struct work_struct *work)
......
...@@ -605,9 +605,9 @@ int lbs_get_tx_power(struct lbs_private *priv, s16 *curlevel, s16 *minlevel, ...@@ -605,9 +605,9 @@ int lbs_get_tx_power(struct lbs_private *priv, s16 *curlevel, s16 *minlevel,
if (ret == 0) { if (ret == 0) {
*curlevel = le16_to_cpu(cmd.curlevel); *curlevel = le16_to_cpu(cmd.curlevel);
if (minlevel) if (minlevel)
*minlevel = le16_to_cpu(cmd.minlevel); *minlevel = cmd.minlevel;
if (maxlevel) if (maxlevel)
*maxlevel = le16_to_cpu(cmd.maxlevel); *maxlevel = cmd.maxlevel;
} }
lbs_deb_leave(LBS_DEB_CMD); lbs_deb_leave(LBS_DEB_CMD);
......
...@@ -598,8 +598,8 @@ static int lbs_process_bss(struct bss_descriptor *bss, ...@@ -598,8 +598,8 @@ static int lbs_process_bss(struct bss_descriptor *bss,
switch (elem->id) { switch (elem->id) {
case MFIE_TYPE_SSID: case MFIE_TYPE_SSID:
bss->ssid_len = elem->len; bss->ssid_len = min_t(int, 32, elem->len);
memcpy(bss->ssid, elem->data, elem->len); memcpy(bss->ssid, elem->data, bss->ssid_len);
lbs_deb_scan("got SSID IE: '%s', len %u\n", lbs_deb_scan("got SSID IE: '%s', len %u\n",
escape_essid(bss->ssid, bss->ssid_len), escape_essid(bss->ssid, bss->ssid_len),
bss->ssid_len); bss->ssid_len);
......
menuconfig RT2X00 menuconfig RT2X00
bool "Ralink driver support" tristate "Ralink driver support"
depends on MAC80211 && WLAN_80211 && EXPERIMENTAL depends on MAC80211 && WLAN_80211 && EXPERIMENTAL
---help--- ---help---
This will enable the experimental support for the Ralink drivers, This will enable the experimental support for the Ralink drivers,
......
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