Commit 17a722ca authored by Paul Walmsley's avatar Paul Walmsley Committed by Tony Lindgren

ARM: OMAP3: SDRC: add timing data for Qimonda HYB18M512160AF-6

Add timing data for the Qimonda HYB18M512160AF-6 SDRAM chip, used on
the OMAP3430SDP boards.

Thanks to Rajendra Nayak <rnayak@ti.com> for his help identifying
the chip used on 3430SDP.
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 2e12bd7e
...@@ -41,6 +41,7 @@ ...@@ -41,6 +41,7 @@
#include <mach/keypad.h> #include <mach/keypad.h>
#include <mach/gpmc-smc91x.h> #include <mach/gpmc-smc91x.h>
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "mmc-twl4030.h" #include "mmc-twl4030.h"
#define CONFIG_DISABLE_HFCLK 1 #define CONFIG_DISABLE_HFCLK 1
...@@ -168,7 +169,7 @@ static struct platform_device *sdp3430_devices[] __initdata = { ...@@ -168,7 +169,7 @@ static struct platform_device *sdp3430_devices[] __initdata = {
static void __init omap_3430sdp_init_irq(void) static void __init omap_3430sdp_init_irq(void)
{ {
omap2_init_common_hw(NULL); omap2_init_common_hw(hyb18m512160af6_sdrc_params);
omap_init_irq(); omap_init_irq();
omap_gpio_init(); omap_gpio_init();
} }
......
/*
* SDRC register values for the Qimonda HYB18M512160AF-6
*
* Copyright (C) 2008-2009 Texas Instruments, Inc.
* Copyright (C) 2008-2009 Nokia Corporation
*
* Paul Walmsley
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
#define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
#include <mach/sdrc.h>
/* Qimonda HYB18M512160AF-6 */
static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
[0] = {
.rate = 166000000,
.actim_ctrla = 0x629db4c6,
.actim_ctrlb = 0x00012214,
.rfr_ctrl = 0x0004dc01,
.mr = 0x00000032,
},
[1] = {
.rate = 165941176,
.actim_ctrla = 0x629db4c6,
.actim_ctrlb = 0x00012214,
.rfr_ctrl = 0x0004dc01,
.mr = 0x00000032,
},
[2] = {
.rate = 83000000,
.actim_ctrla = 0x31512283,
.actim_ctrlb = 0x0001220a,
.rfr_ctrl = 0x00025501,
.mr = 0x00000022,
},
[3] = {
.rate = 82970588,
.actim_ctrla = 0x31512283,
.actim_ctrlb = 0x0001220a,
.rfr_ctrl = 0x00025501,
.mr = 0x00000022,
},
[4] = {
.rate = 0
},
};
#endif
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