Commit 15700039 authored by Alan Cox's avatar Alan Cox Committed by Greg Kroah-Hartman

Staging: et131x: prune all the debug code

We don't need it, we have a perfectly good set of debug tools. For this pass
keep a few debug printks around which are "should not happen" items
Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent bc7f9c59
......@@ -10,7 +10,6 @@ et131x-objs := et1310_eeprom.o \
et1310_pm.o \
et1310_rx.o \
et1310_tx.o \
et131x_debug.o \
et131x_initpci.o \
et131x_isr.o \
et131x_netdev.o
......@@ -56,7 +56,6 @@
*/
#include "et131x_version.h"
#include "et131x_debug.h"
#include "et131x_defs.h"
#include <linux/pci.h>
......
......@@ -56,7 +56,6 @@
*/
#include "et131x_version.h"
#include "et131x_debug.h"
#include "et131x_defs.h"
#include <linux/init.h>
......@@ -75,6 +74,7 @@
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <linux/pci.h>
#include <asm/system.h>
#include <linux/netdevice.h>
......@@ -92,11 +92,6 @@
#include "et131x_adapter.h"
#include "et131x_initpci.h"
/* Data for debugging facilities */
#ifdef CONFIG_ET131X_DEBUG
extern dbg_info_t *et131x_dbginfo;
#endif /* CONFIG_ET131X_DEBUG */
/**
* ConfigMacRegs1 - Initialize the first part of MAC regs
* @pAdpater: pointer to our adapter structure
......@@ -110,8 +105,6 @@ void ConfigMACRegs1(struct et131x_adapter *etdev)
MAC_HFDP_t hfdp;
MII_MGMT_CFG_t mii_mgmt_cfg;
DBG_ENTER(et131x_dbginfo);
/* First we need to reset everything. Write to MAC configuration
* register 1 to perform reset.
*/
......@@ -171,8 +164,6 @@ void ConfigMACRegs1(struct et131x_adapter *etdev)
/* clear out MAC config reset */
writel(0, &pMac->cfg1.value);
DBG_LEAVE(et131x_dbginfo);
}
/**
......@@ -188,8 +179,6 @@ void ConfigMACRegs2(struct et131x_adapter *etdev)
MAC_IF_CTRL_t ifctrl;
TXMAC_CTL_t ctl;
DBG_ENTER(et131x_dbginfo);
ctl.value = readl(&etdev->regs->txmac.ctl.value);
cfg1.value = readl(&pMac->cfg1.value);
cfg2.value = readl(&pMac->cfg2.value);
......@@ -255,17 +244,11 @@ void ConfigMACRegs2(struct et131x_adapter *etdev)
delay < 100);
if (delay == 100) {
DBG_ERROR(et131x_dbginfo,
dev_warn(&etdev->pdev->dev,
"Syncd bits did not respond correctly cfg1 word 0x%08x\n",
cfg1.value);
}
DBG_TRACE(et131x_dbginfo,
"Speed %d, Dup %d, CFG1 0x%08x, CFG2 0x%08x, if_ctrl 0x%08x\n",
etdev->linkspeed, etdev->duplex_mode,
readl(&pMac->cfg1.value), readl(&pMac->cfg2.value),
readl(&pMac->if_ctrl.value));
/* Enable TXMAC */
ctl.bits.txmac_en = 0x1;
ctl.bits.fc_disable = 0x1;
......@@ -275,12 +258,7 @@ void ConfigMACRegs2(struct et131x_adapter *etdev)
if (etdev->Flags & fMP_ADAPTER_LOWER_POWER) {
et131x_rx_dma_enable(etdev);
et131x_tx_dma_enable(etdev);
} else {
DBG_WARNING(et131x_dbginfo,
"Didn't enable Rx/Tx due to low-power mode\n");
}
DBG_LEAVE(et131x_dbginfo);
}
void ConfigRxMacRegs(struct et131x_adapter *etdev)
......@@ -290,8 +268,6 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev)
RXMAC_WOL_SA_HI_t sa_hi;
RXMAC_PF_CTRL_t pf_ctrl = { 0 };
DBG_ENTER(et131x_dbginfo);
/* Disable the MAC while it is being configured (also disable WOL) */
writel(0x8, &pRxMac->ctrl.value);
......@@ -421,8 +397,6 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev)
*/
writel(pf_ctrl.value, &pRxMac->pf_ctrl.value);
writel(0x9, &pRxMac->ctrl.value);
DBG_LEAVE(et131x_dbginfo);
}
void ConfigTxMacRegs(struct et131x_adapter *etdev)
......@@ -430,8 +404,6 @@ void ConfigTxMacRegs(struct et131x_adapter *etdev)
struct _TXMAC_t __iomem *pTxMac = &etdev->regs->txmac;
TXMAC_CF_PARAM_t Local;
DBG_ENTER(et131x_dbginfo);
/* We need to update the Control Frame Parameters
* cfpt - control frame pause timer set to 64 (0x40)
* cfep - control frame extended pause timer set to 0x0
......@@ -443,8 +415,6 @@ void ConfigTxMacRegs(struct et131x_adapter *etdev)
Local.bits.cfep = 0x0;
writel(Local.value, &pTxMac->cf_param.value);
}
DBG_LEAVE(et131x_dbginfo);
}
void ConfigMacStatRegs(struct et131x_adapter *etdev)
......@@ -452,8 +422,6 @@ void ConfigMacStatRegs(struct et131x_adapter *etdev)
struct _MAC_STAT_t __iomem *pDevMacStat =
&etdev->regs->macStat;
DBG_ENTER(et131x_dbginfo);
/* Next we need to initialize all the MAC_STAT registers to zero on
* the device.
*/
......@@ -534,8 +502,6 @@ void ConfigMacStatRegs(struct et131x_adapter *etdev)
writel(Carry2M.value, &pDevMacStat->Carry2M.value);
}
DBG_LEAVE(et131x_dbginfo);
}
void ConfigFlowControl(struct et131x_adapter *etdev)
......@@ -614,8 +580,6 @@ void HandleMacStatInterrupt(struct et131x_adapter *etdev)
MAC_STAT_REG_1_t Carry1;
MAC_STAT_REG_2_t Carry2;
DBG_ENTER(et131x_dbginfo);
/* Read the interrupt bits from the register(s). These are Clear On
* Write.
*/
......@@ -659,8 +623,6 @@ void HandleMacStatInterrupt(struct et131x_adapter *etdev)
etdev->Stats.late_collisions += COUNTER_WRAP_12_BIT;
if (Carry2.bits.tncl)
etdev->Stats.collisions += COUNTER_WRAP_12_BIT;
DBG_LEAVE(et131x_dbginfo);
}
void SetupDeviceForMulticast(struct et131x_adapter *etdev)
......@@ -674,30 +636,14 @@ void SetupDeviceForMulticast(struct et131x_adapter *etdev)
uint32_t hash4 = 0;
u32 pm_csr;
DBG_ENTER(et131x_dbginfo);
/* If ET131X_PACKET_TYPE_MULTICAST is specified, then we provision
* the multi-cast LIST. If it is NOT specified, (and "ALL" is not
* specified) then we should pass NO multi-cast addresses to the
* driver.
*/
if (etdev->PacketFilter & ET131X_PACKET_TYPE_MULTICAST) {
DBG_VERBOSE(et131x_dbginfo,
"MULTICAST flag is set, MCCount: %d\n",
etdev->MCAddressCount);
/* Loop through our multicast array and set up the device */
for (nIndex = 0; nIndex < etdev->MCAddressCount; nIndex++) {
DBG_VERBOSE(et131x_dbginfo,
"MCList[%d]: %02x:%02x:%02x:%02x:%02x:%02x\n",
nIndex,
etdev->MCList[nIndex][0],
etdev->MCList[nIndex][1],
etdev->MCList[nIndex][2],
etdev->MCList[nIndex][3],
etdev->MCList[nIndex][4],
etdev->MCList[nIndex][5]);
result = ether_crc(6, etdev->MCList[nIndex]);
result = (result & 0x3F800000) >> 23;
......@@ -725,8 +671,6 @@ void SetupDeviceForMulticast(struct et131x_adapter *etdev)
writel(hash3, &rxmac->multi_hash3);
writel(hash4, &rxmac->multi_hash4);
}
DBG_LEAVE(et131x_dbginfo);
}
void SetupDeviceForUnicast(struct et131x_adapter *etdev)
......@@ -737,8 +681,6 @@ void SetupDeviceForUnicast(struct et131x_adapter *etdev)
RXMAC_UNI_PF_ADDR3_t uni_pf3;
u32 pm_csr;
DBG_ENTER(et131x_dbginfo);
/* Set up unicast packet filter reg 3 to be the first two octets of
* the MAC address for both address
*
......@@ -769,6 +711,4 @@ void SetupDeviceForUnicast(struct et131x_adapter *etdev)
writel(uni_pf2.value, &rxmac->uni_pf_addr2.value);
writel(uni_pf3.value, &rxmac->uni_pf_addr3.value);
}
DBG_LEAVE(et131x_dbginfo);
}
......@@ -56,7 +56,6 @@
*/
#include "et131x_version.h"
#include "et131x_debug.h"
#include "et131x_defs.h"
#include <linux/pci.h>
......@@ -98,11 +97,6 @@
#include "et1310_rx.h"
#include "et1310_mac.h"
/* Data for debugging facilities */
#ifdef CONFIG_ET131X_DEBUG
extern dbg_info_t *et131x_dbginfo;
#endif /* CONFIG_ET131X_DEBUG */
/* Prototypes for functions with local scope */
static int et131x_xcvr_init(struct et131x_adapter *adapter);
......@@ -157,9 +151,9 @@ int PhyMiRead(struct et131x_adapter *adapter, uint8_t xcvrAddr,
/* If we hit the max delay, we could not read the register */
if (delay >= 50) {
DBG_WARNING(et131x_dbginfo,
dev_warn(&adapter->pdev->dev,
"xcvrReg 0x%08x could not be read\n", xcvrReg);
DBG_WARNING(et131x_dbginfo, "status is 0x%08x\n",
dev_warn(&adapter->pdev->dev, "status is 0x%08x\n",
miiIndicator.value);
status = -EIO;
......@@ -179,10 +173,6 @@ int PhyMiRead(struct et131x_adapter *adapter, uint8_t xcvrAddr,
/* Stop the read operation */
writel(0, &mac->mii_mgmt_cmd.value);
DBG_VERBOSE(et131x_dbginfo, " xcvr_addr = 0x%02x, "
"xcvr_reg = 0x%02x, "
"value = 0x%04x.\n", xcvrAddr, xcvrReg, *value);
/* set the registers we touched back to the state at which we entered
* this function
*/
......@@ -242,11 +232,11 @@ int MiWrite(struct et131x_adapter *adapter, uint8_t xcvrReg, uint16_t value)
if (delay == 100) {
uint16_t TempValue;
DBG_WARNING(et131x_dbginfo,
"xcvrReg 0x%08x could not be written", xcvrReg);
DBG_WARNING(et131x_dbginfo, "status is 0x%08x\n",
dev_warn(&adapter->pdev->dev,
"xcvrReg 0x%08x could not be written", xcvrReg);
dev_warn(&adapter->pdev->dev, "status is 0x%08x\n",
miiIndicator.value);
DBG_WARNING(et131x_dbginfo, "command is 0x%08x\n",
dev_warn(&adapter->pdev->dev, "command is 0x%08x\n",
readl(&mac->mii_mgmt_cmd.value));
MiRead(adapter, xcvrReg, &TempValue);
......@@ -263,10 +253,6 @@ int MiWrite(struct et131x_adapter *adapter, uint8_t xcvrReg, uint16_t value)
writel(miiAddr.value, &mac->mii_mgmt_addr.value);
writel(miiCmd.value, &mac->mii_mgmt_cmd.value);
DBG_VERBOSE(et131x_dbginfo, " xcvr_addr = 0x%02x, "
"xcvr_reg = 0x%02x, "
"value = 0x%04x.\n", xcvrAddr, xcvrReg, value);
return status;
}
......@@ -284,8 +270,6 @@ int et131x_xcvr_find(struct et131x_adapter *adapter)
MI_IDR2_t idr2;
uint32_t xcvr_id;
DBG_ENTER(et131x_dbginfo);
/* We need to get xcvr id and address we just get the first one */
for (xcvr_addr = 0; xcvr_addr < 32; xcvr_addr++) {
/* Read the ID from the PHY */
......@@ -299,10 +283,6 @@ int et131x_xcvr_find(struct et131x_adapter *adapter)
xcvr_id = (uint32_t) ((idr1.value << 16) | idr2.value);
if ((idr1.value != 0) && (idr1.value != 0xffff)) {
DBG_TRACE(et131x_dbginfo,
"Xcvr addr: 0x%02x\tXcvr_id: 0x%08x\n",
xcvr_addr, xcvr_id);
adapter->Stats.xcvr_id = xcvr_id;
adapter->Stats.xcvr_addr = xcvr_addr;
......@@ -310,8 +290,6 @@ int et131x_xcvr_find(struct et131x_adapter *adapter)
break;
}
}
DBG_LEAVE(et131x_dbginfo);
return status;
}
......@@ -327,13 +305,9 @@ int et131x_setphy_normal(struct et131x_adapter *adapter)
{
int status;
DBG_ENTER(et131x_dbginfo);
/* Make sure the PHY is powered up */
ET1310_PhyPowerDown(adapter, 0);
status = et131x_xcvr_init(adapter);
DBG_LEAVE(et131x_dbginfo);
return status;
}
......@@ -350,8 +324,6 @@ static int et131x_xcvr_init(struct et131x_adapter *adapter)
MI_ISR_t isr;
MI_LCR2_t lcr2;
DBG_ENTER(et131x_dbginfo);
/* Zero out the adapter structure variable representing BMSR */
adapter->Bmsr.value = 0;
......@@ -412,8 +384,6 @@ static int et131x_xcvr_init(struct et131x_adapter *adapter)
/* NOTE - Do we need this? */
ET1310_PhyAccessMiBit(adapter, TRUEPHY_BIT_SET, 0, 9, NULL);
DBG_LEAVE(et131x_dbginfo);
return status;
} else {
ET1310_PhyAutoNeg(adapter, false);
......@@ -469,7 +439,6 @@ static int et131x_xcvr_init(struct et131x_adapter *adapter)
break;
}
DBG_LEAVE(et131x_dbginfo);
return status;
}
}
......@@ -486,8 +455,6 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
uint32_t polarity;
unsigned long flags;
DBG_ENTER(et131x_dbginfo);
if (bmsr_ints.bits.link_status) {
if (bmsr.bits.link_status) {
etdev->PoMgmt.TransPhyComaModeOnBoot = 20;
......@@ -506,8 +473,8 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
if (etdev->RegistryPhyLoopbk == false)
netif_carrier_on(etdev->netdev);
} else {
DBG_WARNING(et131x_dbginfo,
"Link down cable problem\n");
dev_warn(&etdev->pdev->dev,
"Link down - cable problem ?\n");
if (etdev->linkspeed == TRUEPHY_SPEED_10MBPS) {
/* NOTE - Is there a way to query this without
......@@ -586,11 +553,6 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
etdev->linkspeed = speed;
etdev->duplex_mode = duplex;
DBG_TRACE(et131x_dbginfo,
"etdev->linkspeed 0x%04x, etdev->duplex_mode 0x%08x\n",
etdev->linkspeed,
etdev->duplex_mode);
etdev->PoMgmt.TransPhyComaModeOnBoot = 20;
if (etdev->linkspeed == TRUEPHY_SPEED_10MBPS) {
......@@ -619,8 +581,6 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
ConfigMACRegs2(etdev);
}
}
DBG_LEAVE(et131x_dbginfo);
}
/**
......@@ -631,8 +591,6 @@ void et131x_Mii_check(struct et131x_adapter *etdev,
*/
void TPAL_SetPhy10HalfDuplex(struct et131x_adapter *etdev)
{
DBG_ENTER(et131x_dbginfo);
/* Power down PHY */
ET1310_PhyPowerDown(etdev, 1);
......@@ -646,8 +604,6 @@ void TPAL_SetPhy10HalfDuplex(struct et131x_adapter *etdev)
/* Power up PHY */
ET1310_PhyPowerDown(etdev, 0);
DBG_LEAVE(et131x_dbginfo);
}
/**
......@@ -658,8 +614,6 @@ void TPAL_SetPhy10HalfDuplex(struct et131x_adapter *etdev)
*/
void TPAL_SetPhy10FullDuplex(struct et131x_adapter *etdev)
{
DBG_ENTER(et131x_dbginfo);
/* Power down PHY */
ET1310_PhyPowerDown(etdev, 1);
......@@ -673,8 +627,6 @@ void TPAL_SetPhy10FullDuplex(struct et131x_adapter *etdev)
/* Power up PHY */
ET1310_PhyPowerDown(etdev, 0);
DBG_LEAVE(et131x_dbginfo);
}
/**
......@@ -683,8 +635,6 @@ void TPAL_SetPhy10FullDuplex(struct et131x_adapter *etdev)
*/
void TPAL_SetPhy10Force(struct et131x_adapter *etdev)
{
DBG_ENTER(et131x_dbginfo);
/* Power down PHY */
ET1310_PhyPowerDown(etdev, 1);
......@@ -704,8 +654,6 @@ void TPAL_SetPhy10Force(struct et131x_adapter *etdev)
/* Power up PHY */
ET1310_PhyPowerDown(etdev, 0);
DBG_LEAVE(et131x_dbginfo);
}
/**
......@@ -716,8 +664,6 @@ void TPAL_SetPhy10Force(struct et131x_adapter *etdev)
*/
void TPAL_SetPhy100HalfDuplex(struct et131x_adapter *etdev)
{
DBG_ENTER(et131x_dbginfo);
/* Power down PHY */
ET1310_PhyPowerDown(etdev, 1);
......@@ -734,8 +680,6 @@ void TPAL_SetPhy100HalfDuplex(struct et131x_adapter *etdev)
/* Power up PHY */
ET1310_PhyPowerDown(etdev, 0);
DBG_LEAVE(et131x_dbginfo);
}
/**
......@@ -746,8 +690,6 @@ void TPAL_SetPhy100HalfDuplex(struct et131x_adapter *etdev)
*/
void TPAL_SetPhy100FullDuplex(struct et131x_adapter *etdev)
{
DBG_ENTER(et131x_dbginfo);
/* Power down PHY */
ET1310_PhyPowerDown(etdev, 1);
......@@ -761,8 +703,6 @@ void TPAL_SetPhy100FullDuplex(struct et131x_adapter *etdev)
/* Power up PHY */
ET1310_PhyPowerDown(etdev, 0);
DBG_LEAVE(et131x_dbginfo);
}
/**
......@@ -771,8 +711,6 @@ void TPAL_SetPhy100FullDuplex(struct et131x_adapter *etdev)
*/
void TPAL_SetPhy100Force(struct et131x_adapter *etdev)
{
DBG_ENTER(et131x_dbginfo);
/* Power down PHY */
ET1310_PhyPowerDown(etdev, 1);
......@@ -792,8 +730,6 @@ void TPAL_SetPhy100Force(struct et131x_adapter *etdev)
/* Power up PHY */
ET1310_PhyPowerDown(etdev, 0);
DBG_LEAVE(et131x_dbginfo);
}
/**
......@@ -804,8 +740,6 @@ void TPAL_SetPhy100Force(struct et131x_adapter *etdev)
*/
void TPAL_SetPhy1000FullDuplex(struct et131x_adapter *etdev)
{
DBG_ENTER(et131x_dbginfo);
/* Power down PHY */
ET1310_PhyPowerDown(etdev, 1);
......@@ -819,8 +753,6 @@ void TPAL_SetPhy1000FullDuplex(struct et131x_adapter *etdev)
/* power up PHY */
ET1310_PhyPowerDown(etdev, 0);
DBG_LEAVE(et131x_dbginfo);
}
/**
......@@ -829,8 +761,6 @@ void TPAL_SetPhy1000FullDuplex(struct et131x_adapter *etdev)
*/
void TPAL_SetPhyAutoNeg(struct et131x_adapter *etdev)
{
DBG_ENTER(et131x_dbginfo);
/* Power down PHY */
ET1310_PhyPowerDown(etdev, 1);
......@@ -849,8 +779,6 @@ void TPAL_SetPhyAutoNeg(struct et131x_adapter *etdev)
/* Power up PHY */
ET1310_PhyPowerDown(etdev, 0);
DBG_LEAVE(et131x_dbginfo);
}
......
......@@ -56,7 +56,6 @@
*/
#include "et131x_version.h"
#include "et131x_debug.h"
#include "et131x_defs.h"
#include <linux/init.h>
......@@ -92,11 +91,6 @@
#include "et131x_adapter.h"
#include "et131x_initpci.h"
/* Data for debugging facilities */
#ifdef CONFIG_ET131X_DEBUG
extern dbg_info_t *et131x_dbginfo;
#endif /* CONFIG_ET131X_DEBUG */
/**
* EnablePhyComa - called when network cable is unplugged
* @etdev: pointer to our adapter structure
......@@ -122,8 +116,6 @@ void EnablePhyComa(struct et131x_adapter *etdev)
unsigned long flags;
u32 GlobalPmCSR;
DBG_ENTER(et131x_dbginfo);
GlobalPmCSR = readl(&etdev->regs->global.pm_csr);
/* Save the GbE PHY speed and duplex modes. Need to restore this
......@@ -146,8 +138,6 @@ void EnablePhyComa(struct et131x_adapter *etdev)
/* Program gigE PHY in to Coma mode */
GlobalPmCSR |= ET_PM_PHY_SW_COMA;
writel(GlobalPmCSR, &etdev->regs->global.pm_csr);
DBG_LEAVE(et131x_dbginfo);
}
/**
......@@ -158,8 +148,6 @@ void DisablePhyComa(struct et131x_adapter *etdev)
{
u32 GlobalPmCSR;
DBG_ENTER(et131x_dbginfo);
GlobalPmCSR = readl(&etdev->regs->global.pm_csr);
/* Disable phy_sw_coma register and re-enable JAGCore clocks */
......@@ -193,7 +181,5 @@ void DisablePhyComa(struct et131x_adapter *etdev)
/* Need to re-enable Rx. */
et131x_rx_dma_enable(etdev);
DBG_LEAVE(et131x_dbginfo);
}
This diff is collapsed.
This diff is collapsed.
......@@ -176,13 +176,6 @@ typedef struct _ce_stats_t {
u32 code_violations;
u32 other_errors;
#ifdef CONFIG_ET131X_DEBUG
u32 UnhandledInterruptsPerSec;
u32 RxDmaInterruptsPerSec;
u32 TxDmaInterruptsPerSec;
u32 WatchDogInterruptsPerSec;
#endif /* CONFIG_ET131X_DEBUG */
u32 SynchrounousIterations;
u32 InterruptStatus;
} CE_STATS_t, *PCE_STATS_t;
......
/*
* Agere Systems Inc.
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
*
* Copyright © 2005 Agere Systems Inc.
* All rights reserved.
* http://www.agere.com
*
*------------------------------------------------------------------------------
*
* et131x_debug.c - Routines used for debugging.
*
*------------------------------------------------------------------------------
*
* SOFTWARE LICENSE
*
* This software is provided subject to the following terms and conditions,
* which you should read carefully before using the software. Using this
* software indicates your acceptance of these terms and conditions. If you do
* not agree with these terms and conditions, do not use the software.
*
* Copyright © 2005 Agere Systems Inc.
* All rights reserved.
*
* Redistribution and use in source or binary forms, with or without
* modifications, are permitted provided that the following conditions are met:
*
* . Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following Disclaimer as comments in the code as
* well as in the documentation and/or other materials provided with the
* distribution.
*
* . Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following Disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* . Neither the name of Agere Systems Inc. nor the names of the contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* Disclaimer
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
* RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*
*/
#ifdef CONFIG_ET131X_DEBUG
#include "et131x_version.h"
#include "et131x_debug.h"
#include "et131x_defs.h"
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/ctype.h>
#include <linux/string.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/in.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <asm/system.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/if_arp.h>
#include <linux/ioport.h>
#include <linux/random.h>
#include "et1310_phy.h"
#include "et1310_pm.h"
#include "et1310_jagcore.h"
#include "et131x_adapter.h"
#include "et131x_netdev.h"
#include "et131x_config.h"
#include "et131x_isr.h"
#include "et1310_address_map.h"
#include "et1310_tx.h"
#include "et1310_rx.h"
#include "et1310_mac.h"
/* Data for debugging facilities */
extern dbg_info_t *et131x_dbginfo;
/**
* DumpTxQueueContents - Dump out the tx queue and the shadow pointers
* @etdev: pointer to our adapter structure
*/
void DumpTxQueueContents(int debug, struct et131x_adapter *etdev)
{
MMC_t __iomem *mmc = &etdev->regs->mmc;
u32 txq_addr;
if (DBG_FLAGS(et131x_dbginfo) & debug) {
for (txq_addr = 0x200; txq_addr < 0x3ff; txq_addr++) {
u32 sram_access = readl(&mmc->sram_access);
sram_access &= 0xFFFF;
sram_access |= (txq_addr << 16) | ET_SRAM_REQ_ACCESS;
writel(sram_access, &mmc->sram_access);
DBG_PRINT("Addr 0x%x, Access 0x%08x\t"
"Value 1 0x%08x, Value 2 0x%08x, "
"Value 3 0x%08x, Value 4 0x%08x, \n",
txq_addr,
readl(&mmc->sram_access),
readl(&mmc->sram_word1),
readl(&mmc->sram_word2),
readl(&mmc->sram_word3),
readl(&mmc->sram_word4));
}
DBG_PRINT("Shadow Pointers 0x%08x\n",
readl(&etdev->regs->txmac.shadow_ptr.value));
}
}
#define NUM_BLOCKS 8
static const char *BlockNames[NUM_BLOCKS] = {
"Global", "Tx DMA", "Rx DMA", "Tx MAC",
"Rx MAC", "MAC", "MAC Stat", "MMC"
};
/**
* DumpDeviceBlock
* @etdev: pointer to our adapter
*
* Dumps the first 64 regs of each block of the et-1310 (each block is
* mapped to a new page, each page is 4096 bytes).
*/
void DumpDeviceBlock(int debug, struct et131x_adapter *etdev,
u32 block)
{
u32 addr1, addr2;
u32 __iomem *regs = (u32 __iomem *) etdev->regs;
/* Output the debug counters to the debug terminal */
if (DBG_FLAGS(et131x_dbginfo) & debug) {
DBG_PRINT("%s block\n", BlockNames[block]);
regs += block * 1024;
for (addr1 = 0; addr1 < 8; addr1++) {
for (addr2 = 0; addr2 < 8; addr2++) {
if (block == 0 &&
(addr1 * 8 + addr2) == 6)
DBG_PRINT(" ISR , ");
else
DBG_PRINT("0x%08x, ", readl(regs++));
}
DBG_PRINT("\n");
}
DBG_PRINT("\n");
}
}
/**
* DumpDeviceReg
* @etdev: pointer to our adapter
*
* Dumps the first 64 regs of each block of the et-1310 (each block is
* mapped to a new page, each page is 4096 bytes).
*/
void DumpDeviceReg(int debug, struct et131x_adapter *etdev)
{
u32 addr1, addr2;
u32 block;
u32 __iomem *regs = (u32 __iomem *)etdev->regs;
u32 __iomem *p;
/* Output the debug counters to the debug terminal */
if (DBG_FLAGS(et131x_dbginfo) & debug) {
for (block = 0; block < NUM_BLOCKS; block++) {
DBG_PRINT("%s block\n", BlockNames[block]);
p = regs + block * 1024;
for (addr1 = 0; addr1 < 8; addr1++) {
for (addr2 = 0; addr2 < 8; addr2++)
DBG_PRINT("0x%08x, ", readl(p++));
DBG_PRINT("\n");
}
DBG_PRINT("\n");
}
}
}
#endif /* CONFIG_ET131X_DEBUG */
/*
* Agere Systems Inc.
* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
*
* Copyright © 2005 Agere Systems Inc.
* All rights reserved.
* http://www.agere.com
*
*------------------------------------------------------------------------------
*
* et131x_debug.h - Defines, structs, enums, prototypes, etc. used for
* outputting debug messages to the system logging facility
* (ksyslogd)
*
*------------------------------------------------------------------------------
*
* SOFTWARE LICENSE
*
* This software is provided subject to the following terms and conditions,
* which you should read carefully before using the software. Using this
* software indicates your acceptance of these terms and conditions. If you do
* not agree with these terms and conditions, do not use the software.
*
* Copyright © 2005 Agere Systems Inc.
* All rights reserved.
*
* Redistribution and use in source or binary forms, with or without
* modifications, are permitted provided that the following conditions are met:
*
* . Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following Disclaimer as comments in the code as
* well as in the documentation and/or other materials provided with the
* distribution.
*
* . Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following Disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* . Neither the name of Agere Systems Inc. nor the names of the contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* Disclaimer
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
* RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*
*/
#ifndef __ET131X_DBG_H__
#define __ET131X_DBG_H__
/* Define Masks for debugging types/levels */
#define DBG_ERROR_ON 0x00000001L
#define DBG_WARNING_ON 0x00000002L
#define DBG_NOTICE_ON 0x00000004L
#define DBG_TRACE_ON 0x00000008L
#define DBG_VERBOSE_ON 0x00000010L
#define DBG_PARAM_ON 0x00000020L
#define DBG_BREAK_ON 0x00000040L
#define DBG_RX_ON 0x00000100L
#define DBG_TX_ON 0x00000200L
#ifdef CONFIG_ET131X_DEBUG
/*
* Set the level of debugging if not done with a preprocessor define. See
* et131x_main.c, function et131x_init_module() for how the debug level
* translates into the types of messages displayed.
*/
#ifndef DBG_LVL
#define DBG_LVL 3
#endif /* DBG_LVL */
#define DBG_DEFAULTS (DBG_ERROR_ON | DBG_WARNING_ON | DBG_BREAK_ON)
#define DBG_FLAGS(A) ((A)->dbgFlags)
#define DBG_NAME(A) ((A)->dbgName)
#define DBG_LEVEL(A) ((A)->dbgLevel)
#ifndef DBG_PRINT
#define DBG_PRINT(S...) printk(KERN_DEBUG S)
#endif /* DBG_PRINT */
#ifndef DBG_PRINTC
#define DBG_PRINTC(S...) printk(S)
#endif /* DBG_PRINTC */
#ifndef DBG_TRAP
#define DBG_TRAP do {} while (0) /* BUG() */
#endif /* DBG_TRAP */
#define _ENTER_STR ">>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>"
#define _LEAVE_STR "<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<"
#define _DBG_ENTER(A) printk(KERN_DEBUG "%s:%.*s:%s\n", DBG_NAME(A), \
++DBG_LEVEL(A), _ENTER_STR, __func__)
#define _DBG_LEAVE(A) printk(KERN_DEBUG "%s:%.*s:%s\n", DBG_NAME(A), \
DBG_LEVEL(A)--, _LEAVE_STR, __func__)
#define DBG_ENTER(A) \
do { \
if (DBG_FLAGS(A) & DBG_TRACE_ON) \
_DBG_ENTER(A); \
} while (0)
#define DBG_LEAVE(A) \
do { \
if (DBG_FLAGS(A) & DBG_TRACE_ON) \
_DBG_LEAVE(A); \
} while (0)
#define DBG_PARAM(A, N, F, S...) \
do { \
if (DBG_FLAGS(A) & DBG_PARAM_ON) \
DBG_PRINT(" %s -- "F" ", N, S); \
} while (0)
#define DBG_ERROR(A, S...) \
do { \
if (DBG_FLAGS(A) & DBG_ERROR_ON) { \
DBG_PRINT("%s:ERROR:%s ", DBG_NAME(A), __func__);\
DBG_PRINTC(S); \
DBG_TRAP; \
} \
} while (0)
#define DBG_WARNING(A, S...) \
do { \
if (DBG_FLAGS(A) & DBG_WARNING_ON) { \
DBG_PRINT("%s:WARNING:%s ", DBG_NAME(A), __func__); \
DBG_PRINTC(S); \
} \
} while (0)
#define DBG_NOTICE(A, S...) \
do { \
if (DBG_FLAGS(A) & DBG_NOTICE_ON) { \
DBG_PRINT("%s:NOTICE:%s ", DBG_NAME(A), __func__); \
DBG_PRINTC(S); \
} \
} while (0)
#define DBG_TRACE(A, S...) \
do { \
if (DBG_FLAGS(A) & DBG_TRACE_ON) { \
DBG_PRINT("%s:TRACE:%s ", DBG_NAME(A), __func__); \
DBG_PRINTC(S); \
} \
} while (0)
#define DBG_VERBOSE(A, S...) \
do { \
if (DBG_FLAGS(A) & DBG_VERBOSE_ON) { \
DBG_PRINT("%s:VERBOSE:%s ", DBG_NAME(A), __func__); \
DBG_PRINTC(S); \
} \
} while (0)
#define DBG_RX(A, S...) \
do { \
if (DBG_FLAGS(A) & DBG_RX_ON) \
DBG_PRINT(S); \
} while (0)
#define DBG_RX_ENTER(A) \
do { \
if (DBG_FLAGS(A) & DBG_RX_ON) \
_DBG_ENTER(A); \
} while (0)
#define DBG_RX_LEAVE(A) \
do { \
if (DBG_FLAGS(A) & DBG_RX_ON) \
_DBG_LEAVE(A); \
} while (0)
#define DBG_TX(A, S...) \
do { \
if (DBG_FLAGS(A) & DBG_TX_ON) \
DBG_PRINT(S); \
} while (0)
#define DBG_TX_ENTER(A) \
do { \
if (DBG_FLAGS(A) & DBG_TX_ON) \
_DBG_ENTER(A); \
} while (0)
#define DBG_TX_LEAVE(A) \
do { \
if (DBG_FLAGS(A) & DBG_TX_ON) \
_DBG_LEAVE(A); \
} while (0)
#define DBG_ASSERT(C) \
do { \
if (!(C)) { \
DBG_PRINT("ASSERT(%s) -- %s#%d (%s) ", \
#C, __FILE__, __LINE__, __func__); \
DBG_TRAP; \
} \
} while (0)
#define STATIC
typedef struct {
char *dbgName;
int dbgLevel;
unsigned long dbgFlags;
} dbg_info_t;
#else /* CONFIG_ET131X_DEBUG */
#define DBG_DEFN
#define DBG_TRAP
#define DBG_PRINT(S...)
#define DBG_ENTER(A)
#define DBG_LEAVE(A)
#define DBG_PARAM(A, N, F, S...)
#define DBG_ERROR(A, S...)
#define DBG_WARNING(A, S...)
#define DBG_NOTICE(A, S...)
#define DBG_TRACE(A, S...)
#define DBG_VERBOSE(A, S...)
#define DBG_RX(A, S...)
#define DBG_RX_ENTER(A)
#define DBG_RX_LEAVE(A)
#define DBG_TX(A, S...)
#define DBG_TX_ENTER(A)
#define DBG_TX_LEAVE(A)
#define DBG_ASSERT(C)
#define STATIC static
#endif /* CONFIG_ET131X_DEBUG */
/* Forward declaration of the private adapter structure */
struct et131x_adapter;
void DumpTxQueueContents(int dbgLvl, struct et131x_adapter *adapter);
void DumpDeviceBlock(int dbgLvl, struct et131x_adapter *adapter,
unsigned int Block);
void DumpDeviceReg(int dbgLvl, struct et131x_adapter *adapter);
#endif /* __ET131X_DBG_H__ */
This diff is collapsed.
......@@ -57,7 +57,6 @@
*/
#include "et131x_version.h"
#include "et131x_debug.h"
#include "et131x_defs.h"
#include <linux/init.h>
......@@ -76,6 +75,7 @@
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <linux/pci.h>
#include <asm/system.h>
#include <linux/netdevice.h>
......@@ -91,11 +91,6 @@
#include "et131x_adapter.h"
/* Data for debugging facilities */
#ifdef CONFIG_ET131X_DEBUG
extern dbg_info_t *et131x_dbginfo;
#endif /* CONFIG_ET131X_DEBUG */
/**
* et131x_enable_interrupts - enable interrupt
* @adapter: et131x device
......@@ -151,9 +146,7 @@ irqreturn_t et131x_isr(int irq, void *dev_id)
struct et131x_adapter *adapter = NULL;
u32 status;
if (netdev == NULL || !netif_device_present(netdev)) {
DBG_WARNING(et131x_dbginfo,
"No net_device struct or device not present\n");
if (!netif_device_present(netdev)) {
handled = false;
goto out;
}
......@@ -181,23 +174,12 @@ irqreturn_t et131x_isr(int irq, void *dev_id)
/* Make sure this is our interrupt */
if (!status) {
#ifdef CONFIG_ET131X_DEBUG
adapter->Stats.UnhandledInterruptsPerSec++;
#endif
handled = false;
DBG_VERBOSE(et131x_dbginfo, "NOT OUR INTERRUPT\n");
et131x_enable_interrupts(adapter);
goto out;
}
/* This is our interrupt, so process accordingly */
#ifdef CONFIG_ET131X_DEBUG
if (status & ET_INTR_RXDMA_XFR_DONE)
adapter->Stats.RxDmaInterruptsPerSec++;
if (status & ET_INTR_TXDMA_ISR)
adapter->Stats.TxDmaInterruptsPerSec++;
#endif
if (status & ET_INTR_WATCHDOG) {
PMP_TCB pMpTcb = adapter->TxRing.CurrSendHead;
......@@ -212,9 +194,6 @@ irqreturn_t et131x_isr(int irq, void *dev_id)
writel(0, &adapter->regs->global.watchdog_timer);
status &= ~ET_INTR_WATCHDOG;
#ifdef CONFIG_ET131X_DEBUG
adapter->Stats.WatchDogInterruptsPerSec++;
#endif
}
if (status == 0) {
......@@ -263,13 +242,11 @@ void et131x_isr_handler(struct work_struct *work)
*/
/* Handle all the completed Transmit interrupts */
if (status & ET_INTR_TXDMA_ISR) {
DBG_TX(et131x_dbginfo, "TXDMA_ISR interrupt\n");
et131x_handle_send_interrupt(etdev);
}
/* Handle all the completed Receives interrupts */
if (status & ET_INTR_RXDMA_XFR_DONE) {
DBG_RX(et131x_dbginfo, "RXDMA_XFR_DONE interrupt\n");
et131x_handle_recv_interrupt(etdev);
}
......@@ -283,7 +260,7 @@ void et131x_isr_handler(struct work_struct *work)
/* Following read also clears the register (COR) */
TxDmaErr.value = readl(&iomem->txdma.TxDmaError.value);
DBG_WARNING(et131x_dbginfo,
dev_warn(&etdev->pdev->dev,
"TXDMA_ERR interrupt, error = %d\n",
TxDmaErr.value);
}
......@@ -304,9 +281,6 @@ void et131x_isr_handler(struct work_struct *work)
* ET1310 for re-use. This interrupt is one method of
* returning resources.
*/
DBG_WARNING(et131x_dbginfo,
"RXDMA_FB_RING0_LOW or "
"RXDMA_FB_RING1_LOW interrupt\n");
/* If the user has flow control on, then we will
* send a pause packet, otherwise just exit
......@@ -332,8 +306,6 @@ void et131x_isr_handler(struct work_struct *work)
/* Handle Packet Status Ring Low Interrupt */
if (status & ET_INTR_RXDMA_STAT_LOW) {
DBG_WARNING(et131x_dbginfo,
"RXDMA_PKT_STAT_RING_LOW interrupt\n");
/*
* Same idea as with the two Free Buffer Rings.
......@@ -370,7 +342,7 @@ void et131x_isr_handler(struct work_struct *work)
etdev->TxMacTest.value =
readl(&iomem->txmac.tx_test.value);
DBG_WARNING(et131x_dbginfo,
dev_warn(&etdev->pdev->dev,
"RxDMA_ERR interrupt, error %x\n",
etdev->TxMacTest.value);
}
......@@ -384,7 +356,7 @@ void et131x_isr_handler(struct work_struct *work)
* message when we are in DBG mode, otherwise we
* will ignore it.
*/
DBG_ERROR(et131x_dbginfo, "WAKE_ON_LAN interrupt\n");
dev_err(&etdev->pdev->dev, "WAKE_ON_LAN interrupt\n");
}
/* Handle the PHY interrupt */
......@@ -393,8 +365,6 @@ void et131x_isr_handler(struct work_struct *work)
MI_BMSR_t BmsrInts, BmsrData;
MI_ISR_t myIsr;
DBG_VERBOSE(et131x_dbginfo, "PHY interrupt\n");
/* If we are in coma mode when we get this interrupt,
* we need to disable it.
*/
......@@ -405,9 +375,6 @@ void et131x_isr_handler(struct work_struct *work)
* so, disable it because we will not be able
* to read PHY values until we are out.
*/
DBG_VERBOSE(et131x_dbginfo,
"Device is in COMA mode, "
"need to wake up\n");
DisablePhyComa(etdev);
}
......@@ -426,11 +393,6 @@ void et131x_isr_handler(struct work_struct *work)
etdev->Bmsr.value ^ BmsrData.value;
etdev->Bmsr.value = BmsrData.value;
DBG_VERBOSE(et131x_dbginfo,
"Bmsr.value = 0x%04x,"
"Bmsr_ints.value = 0x%04x\n",
BmsrData.value, BmsrInts.value);
/* Do all the cable in / cable out stuff */
et131x_Mii_check(etdev, BmsrData, BmsrInts);
}
......@@ -451,7 +413,7 @@ void et131x_isr_handler(struct work_struct *work)
* a nutshell, the whole Tx path will have to be reset
* and re-configured afterwards.
*/
DBG_WARNING(et131x_dbginfo,
dev_warn(&etdev->pdev->dev,
"TXMAC interrupt, error 0x%08x\n",
etdev->TxRing.TxMacErr.value);
......@@ -459,7 +421,6 @@ void et131x_isr_handler(struct work_struct *work)
* otherwise we just want the device to be reset and
* continue
*/
/* DBG_TRAP(); */
}
/* Handle RXMAC Interrupt */
......@@ -473,11 +434,11 @@ void et131x_isr_handler(struct work_struct *work)
/* MP_SET_FLAG( etdev,
fMP_ADAPTER_HARDWARE_ERROR); */
DBG_WARNING(et131x_dbginfo,
dev_warn(&etdev->pdev->dev,
"RXMAC interrupt, error 0x%08x. Requesting reset\n",
readl(&iomem->rxmac.err_reg.value));
DBG_WARNING(et131x_dbginfo,
dev_warn(&etdev->pdev->dev,
"Enable 0x%08x, Diag 0x%08x\n",
readl(&iomem->rxmac.ctrl.value),
readl(&iomem->rxmac.rxq_diag.value));
......@@ -487,7 +448,6 @@ void et131x_isr_handler(struct work_struct *work)
* otherwise we just want the device to be reset and
* continue
*/
/* TRAP(); */
}
/* Handle MAC_STAT Interrupt */
......@@ -498,7 +458,6 @@ void et131x_isr_handler(struct work_struct *work)
* to maintain the top, software managed bits of the
* counter(s).
*/
DBG_VERBOSE(et131x_dbginfo, "MAC_STAT interrupt\n");
HandleMacStatInterrupt(etdev);
}
......@@ -513,7 +472,6 @@ void et131x_isr_handler(struct work_struct *work)
* addressed module is in a power-down state and
* can't respond.
*/
DBG_VERBOSE(et131x_dbginfo, "SLV_TIMEOUT interrupt\n");
}
}
et131x_enable_interrupts(etdev);
......
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