DaVinci: MUX: Fix davinci_cfg_reg() to honor PINMUX0 configuration

Changed the 'if' condition for pinmux register offset to 'mask' value
to be able to set PINMUX0. This would have been skipped otherwise
since PINMUX0 is at offset '0'.
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

arch/arm/mach-davinci/mux.c

@@ -63,8 +63,8 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
 		return -ENODEV;
 	}
 
-	/* Check the mux register in question */
-	if (cfg->mux_reg) {
+	/* Update the mux register in question */
+	if (cfg->mask) {
 		unsigned	tmp1, tmp2;
 
 		spin_lock_irqsave(&mux_spin_lock, flags);