Commit 115924b6 authored by Shreyas Bhatewara's avatar Shreyas Bhatewara Committed by David S. Miller

net: Getting rid of the x86 dependency to built vmxnet3

This patch removes config dependency on x86 to build vmxnet3 driver. Thus
the driver can be built on big endian architectures now. Although vmxnet3
is not supported on VMs other than x86 architecture, all this code goes in
to ensure correctness. If the code is not dependent on x86, it should not
assume little endian architecture in any of its operations.
Signed-off-by: default avatarShreyas Bhatewara <sbhatewara@vmware.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 649300b9
...@@ -3235,7 +3235,7 @@ config VIRTIO_NET ...@@ -3235,7 +3235,7 @@ config VIRTIO_NET
config VMXNET3 config VMXNET3
tristate "VMware VMXNET3 ethernet driver" tristate "VMware VMXNET3 ethernet driver"
depends on PCI && X86 && INET depends on PCI && INET
help help
This driver supports VMware's vmxnet3 virtual ethernet NIC. This driver supports VMware's vmxnet3 virtual ethernet NIC.
To compile this driver as a module, choose M here: the To compile this driver as a module, choose M here: the
......
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...@@ -50,11 +50,13 @@ vmxnet3_set_rx_csum(struct net_device *netdev, u32 val) ...@@ -50,11 +50,13 @@ vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
adapter->rxcsum = val; adapter->rxcsum = val;
if (netif_running(netdev)) { if (netif_running(netdev)) {
if (val) if (val)
adapter->shared->devRead.misc.uptFeatures |= set_flag_le64(
UPT1_F_RXCSUM; &adapter->shared->devRead.misc.uptFeatures,
UPT1_F_RXCSUM);
else else
adapter->shared->devRead.misc.uptFeatures &= reset_flag_le64(
~UPT1_F_RXCSUM; &adapter->shared->devRead.misc.uptFeatures,
UPT1_F_RXCSUM);
VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
VMXNET3_CMD_UPDATE_FEATURE); VMXNET3_CMD_UPDATE_FEATURE);
......
...@@ -330,14 +330,14 @@ struct vmxnet3_adapter { ...@@ -330,14 +330,14 @@ struct vmxnet3_adapter {
}; };
#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \ #define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \
writel((val), (adapter)->hw_addr0 + (reg)) writel(cpu_to_le32(val), (adapter)->hw_addr0 + (reg))
#define VMXNET3_READ_BAR0_REG(adapter, reg) \ #define VMXNET3_READ_BAR0_REG(adapter, reg) \
readl((adapter)->hw_addr0 + (reg)) le32_to_cpu(readl((adapter)->hw_addr0 + (reg)))
#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \ #define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \
writel((val), (adapter)->hw_addr1 + (reg)) writel(cpu_to_le32(val), (adapter)->hw_addr1 + (reg))
#define VMXNET3_READ_BAR1_REG(adapter, reg) \ #define VMXNET3_READ_BAR1_REG(adapter, reg) \
readl((adapter)->hw_addr1 + (reg)) le32_to_cpu(readl((adapter)->hw_addr1 + (reg)))
#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5) #define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5)
#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \ #define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
...@@ -353,6 +353,10 @@ struct vmxnet3_adapter { ...@@ -353,6 +353,10 @@ struct vmxnet3_adapter {
#define VMXNET3_MAX_ETH_HDR_SIZE 22 #define VMXNET3_MAX_ETH_HDR_SIZE 22
#define VMXNET3_MAX_SKB_BUF_SIZE (3*1024) #define VMXNET3_MAX_SKB_BUF_SIZE (3*1024)
void set_flag_le16(__le16 *data, u16 flag);
void set_flag_le64(__le64 *data, u64 flag);
void reset_flag_le64(__le64 *data, u64 flag);
int int
vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter); vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
......
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