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Commit 0f29f587 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Greg Kroah-Hartman
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Staging: rtl8192su: remove RTL8192SU ifdefs 

Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 60083ee0
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Showing with 82 additions and 2873 deletions
drivers/staging/rtl8192su/Makefile
View file @ 0f29f587
......@@ -7,8 +7,6 @@ EXTRA_CFLAGS += -mhard-float -DCONFIG_FORCE_HARD_FLOAT=y
EXTRA_CFLAGS += -DJACKSON_NEW_RX
EXTRA_CFLAGS += -DTHOMAS_BEACON
EXTRA_CFLAGS += -DRTL8192SU
#EXTRA_CFLAGS += -DMUTIPLE_BULK_OUT
r8192s_usb-objs := \
......
drivers/staging/rtl8192su/ieee80211/ieee80211_softmac_wx.c
View file @ 0f29f587
......@@ -230,7 +230,6 @@ int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
union iwreq_data *wrqu, char *extra)
{
u32 tmp_rate = 0;
#ifdef RTL8192SU
//printk("===>mode:%d, halfNmode:%d\n", ieee->mode, ieee->bHalfWirelessN24GMode);
if (ieee->mode & (IEEE_A | IEEE_B | IEEE_G))
tmp_rate = ieee->rate;
......@@ -243,10 +242,6 @@ int ieee80211_wx_get_rate(struct ieee80211_device *ieee,
else
tmp_rate = HTMcsToDataRate(ieee, 15);
}
#else
tmp_rate = TxCountToDataRate(ieee, ieee->softmac_stats.CurrentShowTxate);
#endif
wrqu->bitrate.value = tmp_rate * 500000;
return 0;
......
drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c
View file @ 0f29f587
......@@ -495,11 +495,7 @@ void ieee80211_query_protectionmode(struct ieee80211_device* ieee, cb_desc* tcb_
{
tcb_desc->bCTSEnable = true;
tcb_desc->rts_rate = MGN_24M;
#if defined(RTL8192SU)
tcb_desc->bRTSEnable = false;
#else
tcb_desc->bRTSEnable = true;
#endif
break;
}
else if(pHTInfo->IOTAction & (HT_IOT_ACT_FORCED_RTS|HT_IOT_ACT_PURE_N_MODE))
......
drivers/staging/rtl8192su/ieee80211/rtl819x_HTProc.c
View file @ 0f29f587
......@@ -516,7 +516,6 @@ bool HTIOTActIsDisableMCSTwoSpatialStream(struct ieee80211_device* ieee)
//#endif
#endif
#if 1
#if defined(RTL8192SU)
PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
if(ieee->is_ap_in_wep_tkip && ieee->is_ap_in_wep_tkip(ieee->dev))
{
......@@ -525,7 +524,6 @@ bool HTIOTActIsDisableMCSTwoSpatialStream(struct ieee80211_device* ieee)
(pHTInfo->IOTPeer != HT_IOT_PEER_MARVELL) )
retValue = true;
}
#endif
#endif
return retValue;
}
......@@ -595,7 +593,6 @@ u8 HTIOTActIsForcedRTSCTS(struct ieee80211_device *ieee, struct ieee80211_networ
u8 retValue = 0;
printk("============>%s(), %d\n", __FUNCTION__, network->realtek_cap_exit);
// Force protection
#if defined(RTL8192SU)
if(ieee->pHTInfo->bCurrentHTSupport)
{
//if(!network->realtek_cap_exit)
......@@ -606,7 +603,6 @@ u8 HTIOTActIsForcedRTSCTS(struct ieee80211_device *ieee, struct ieee80211_networ
retValue = 1;
}
}
#endif
return retValue;
}
......@@ -640,7 +636,6 @@ HTIOCActRejcectADDBARequest(struct ieee80211_network *network)
//if(IS_HARDWARE_TYPE_8192SE(Adapter) ||
// IS_HARDWARE_TYPE_8192SU(Adapter)
//)
#if defined RTL8192SU
{
// Do not reject ADDBA REQ because some of the AP may
// keep on sending ADDBA REQ qhich cause DHCP fail or ping loss!
......@@ -650,7 +645,6 @@ HTIOCActRejcectADDBARequest(struct ieee80211_network *network)
// return FALSE;
}
#endif
return retValue;
......@@ -664,7 +658,6 @@ HTIOCActRejcectADDBARequest(struct ieee80211_network *network)
{
u8 retValue = 0;
//if(IS_HARDWARE_TYPE_8192SU(Adapter))
#ifdef RTL8192SU
PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
{
//#if UNDER_VISTA
......@@ -678,7 +671,6 @@ HTIOCActRejcectADDBARequest(struct ieee80211_network *network)
return 1;
}
#endif
return retValue;
}
......@@ -733,7 +725,6 @@ HTIOTActIsDisableTx40MHz(struct ieee80211_device* ieee,struct ieee80211_network
{
u8 retValue = 0;
#if defined RTL8192SU
PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
if( (KEY_TYPE_WEP104 == ieee->pairwise_key_type) ||
(KEY_TYPE_WEP40 == ieee->pairwise_key_type) ||
......@@ -744,7 +735,6 @@ HTIOTActIsDisableTx40MHz(struct ieee80211_device* ieee,struct ieee80211_network
if((pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK) && (network->bssht.bdSupportHT))
retValue = 1;
}
#endif
return retValue;
}
......@@ -754,7 +744,6 @@ HTIOTActIsTxNoAggregation(struct ieee80211_device* ieee,struct ieee80211_network
{
u8 retValue = 0;
#if defined RTL8192SU
PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
if( (KEY_TYPE_WEP104 == ieee->pairwise_key_type) ||
(KEY_TYPE_WEP40 == ieee->pairwise_key_type) ||
......@@ -766,7 +755,6 @@ HTIOTActIsTxNoAggregation(struct ieee80211_device* ieee,struct ieee80211_network
pHTInfo->IOTPeer==HT_IOT_PEER_UNKNOWN)
retValue = 1;
}
#endif
return retValue;
}
......@@ -777,7 +765,6 @@ HTIOTActIsDisableTx2SS(struct ieee80211_device* ieee,struct ieee80211_network *n
{
u8 retValue = 0;
#if defined RTL8192SU
PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
if( (KEY_TYPE_WEP104 == ieee->pairwise_key_type) ||
(KEY_TYPE_WEP40 == ieee->pairwise_key_type) ||
......@@ -788,7 +775,6 @@ HTIOTActIsDisableTx2SS(struct ieee80211_device* ieee,struct ieee80211_network *n
if((pHTInfo->IOTPeer==HT_IOT_PEER_REALTEK) && (network->bssht.bdSupportHT))
retValue = 1;
}
#endif
return retValue;
}
......@@ -797,14 +783,12 @@ HTIOTActIsDisableTx2SS(struct ieee80211_device* ieee,struct ieee80211_network *n
bool HTIOCActAllowPeerAggOnePacket(struct ieee80211_device* ieee,struct ieee80211_network *network)
{
bool retValue = false;
#if defined(RTL8192SU)
PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
{
if(pHTInfo->IOTPeer == HT_IOT_PEER_MARVELL)
return true;
}
#endif
return retValue;
}
......@@ -1783,11 +1767,9 @@ void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80
//if(bIOTAction)
// pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_RTS;
#if defined(RTL8192SU)
bIOTAction = HTIOCActRejcectADDBARequest(pNetwork);
if(bIOTAction)
pHTInfo->IOTAction |= HT_IOT_ACT_REJECT_ADDBA_REQ;
#endif
bIOTAction = HTIOCActAllowPeerAggOnePacket(ieee, pNetwork);
if(bIOTAction)
......@@ -1797,7 +1779,6 @@ void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80
if(bIOTAction)
pHTInfo->IOTAction |= HT_IOT_ACT_EDCA_BIAS_ON_RX;
#if defined(RTL8192SU)
bIOTAction = HTIOTActDisableShortGI(ieee, pNetwork);
if(bIOTAction)
pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_SHORT_GI;
......@@ -1805,13 +1786,11 @@ void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80
bIOTAction = HTIOTActDisableHighPower(ieee, pNetwork);
if(bIOTAction)
pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_HIGH_POWER;
#endif
bIOTAction = HTIOTActIsForcedAMSDU8K(ieee, pNetwork);
if(bIOTAction)
pHTInfo->IOTAction |= HT_IOT_ACT_TX_USE_AMSDU_8K;
#if defined(RTL8192SU)
bIOTAction = HTIOTActIsTxNoAggregation(ieee, pNetwork);
if(bIOTAction)
pHTInfo->IOTAction |= HT_IOT_ACT_TX_NO_AGGREGATION;
......@@ -1823,7 +1802,6 @@ void HTResetSelfAndSavePeerSetting(struct ieee80211_device* ieee, struct ieee80
bIOTAction = HTIOTActIsDisableTx2SS(ieee, pNetwork);
if(bIOTAction)
pHTInfo->IOTAction |= HT_IOT_ACT_DISABLE_TX_2SS;
#endif
//must after HT_IOT_ACT_TX_NO_AGGREGATION
bIOTAction = HTIOTActIsForcedRTSCTS(ieee, pNetwork);
if(bIOTAction)
......
drivers/staging/rtl8192su/r8180_93cx6.h
View file @ 0f29f587
......@@ -13,13 +13,8 @@
/*This files contains card eeprom (93c46 or 93c56) programming routines*/
/*memory is addressed by WORDS*/
#ifdef RTL8192SU
#include "r8192U.h"
#include "r8192S_hw.h"
#else
#include "r8192U.h"
#include "r8192U_hw.h"
#endif
#define EPROM_DELAY 10
......
drivers/staging/rtl8192su/r8192S_Efuse.c
View file @ 0f29f587
......@@ -35,7 +35,6 @@
//
// In the future, we will always support EFUSE!!
//
#ifdef RTL8192SU
/*---------------------------Define Local Constant---------------------------*/
#define _POWERON_DELAY_
#define _PRE_EXECUTE_READ_CMD_
......@@ -2401,7 +2400,6 @@ void efuset_test_func_write(struct net_device* dev)
#endif // #if (HAL_CODE_BASE == RTL8192_S)
......
drivers/staging/rtl8192su/r8192S_firmware.c
View file @ 0f29f587
This diff is collapsed.
drivers/staging/rtl8192su/r8192S_hw.h
View file @ 0f29f587
......@@ -49,10 +49,8 @@ typedef enum _RT_RF_TYPE_DEFINITION
RF_1T2R = 0,
RF_2T4R,
RF_2T2R,
#ifdef RTL8192SU
RF_1T1R,
RF_2T2R_GREEN,
#endif
//RF_3T3R,
//RF_3T4R,
//RF_4T4R,
......
drivers/staging/rtl8192su/r8192S_phy.c
View file @ 0f29f587
......@@ -35,17 +35,11 @@
#include "r8192U_dm.h"
#include "r8192S_rtl6052.h"
#ifdef RTL8192SU
#include "r8192S_hw.h"
#include "r8192S_phy.h"
#include "r8192S_phyreg.h"
#include "r8192SU_HWImg.h"
//#include "r8192S_FwImgDTM.h"
#else
#include "r8192U_hw.h"
#include "r819xU_phy.h"
#include "r819xU_phyreg.h"
#endif
#include "ieee80211/dot11d.h"
......@@ -58,26 +52,6 @@
/*------------------------Define local variable------------------------------*/
// 2004-05-11
#ifndef RTL8192SU
static u32 RF_CHANNEL_TABLE_ZEBRA[]={
0,
0x085c,//2412 1
0x08dc,//2417 2
0x095c,//2422 3
0x09dc,//2427 4
0x0a5c,//2432 5
0x0adc,//2437 6
0x0b5c,//2442 7
0x0bdc,//2447 8
0x0c5c,//2452 9
0x0cdc,//2457 10
0x0d5c,//2462 11
0x0ddc,//2467 12
0x0e5c,//2472 13
//0x0f5c,//2484
0x0f72,//2484 //20040810
};
#endif
static u32
phy_CalculateBitShift(u32 BitMask);
......@@ -114,7 +88,6 @@ static u8 phy_DbmToTxPwrIdx( struct net_device* dev, WIRELESS_MODE WirelessMode,
void phy_SetFwCmdIOCallback(struct net_device* dev);
//#if ((HAL_CODE_BASE == RTL8192_S) && (DEV_BUS_TYPE==USB_INTERFACE))
#ifdef RTL8192SU
//
// Description:
// Base Band read by 4181 to make sure that operation could be done in unlimited cycle.
......@@ -382,7 +355,6 @@ void phy_SetUsbRFReg(struct net_device* dev,RF90_RADIO_PATH_E eRFPath,u32 RegAdd
}
#endif
/*---------------------Define local function prototype-----------------------*/
......@@ -422,7 +394,6 @@ u32 rtl8192_QueryBBReg(struct net_device* dev, u32 RegAddr, u32 BitMask)
// 2008.09.06.
//
//#if ((HAL_CODE_BASE == RTL8192_S) && (DEV_BUS_TYPE==USB_INTERFACE))
#ifdef RTL8192SU
if(IS_BB_REG_OFFSET_92S(RegAddr))
{
//if(RT_USB_CANNOT_IO(Adapter)) return FALSE;
......@@ -436,7 +407,6 @@ u32 rtl8192_QueryBBReg(struct net_device* dev, u32 RegAddr, u32 BitMask)
OriginalValue = phy_QueryUsbBBReg(dev, RegAddr);
}
else
#endif
{
OriginalValue = read_nic_dword(dev, RegAddr);
}
......@@ -482,7 +452,6 @@ void rtl8192_setBBreg(struct net_device* dev, u32 RegAddr, u32 BitMask, u32 Data
// 2008.09.06.
//
//#if ((HAL_CODE_BASE == RTL8192_S) && (DEV_BUS_TYPE==USB_INTERFACE))
#ifdef RTL8192SU
if(IS_BB_REG_OFFSET_92S(RegAddr))
{
if((RegAddr & 0x03) != 0)
......@@ -501,7 +470,6 @@ void rtl8192_setBBreg(struct net_device* dev, u32 RegAddr, u32 BitMask, u32 Data
phy_SetUsbBBReg(dev, RegAddr, Data);
}
else
#endif
{
if(BitMask!= bMaskDWord)
{//if not "double word" write
......@@ -571,19 +539,8 @@ u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u3
// 2008.09.06.
//
//#if (HAL_CODE_BASE == RTL8192_S && DEV_BUS_TYPE==USB_INTERFACE)
#ifdef RTL8192SU
//if(RT_USB_CANNOT_IO(Adapter)) return FALSE;
Original_Value = phy_QueryUsbRFReg(dev, eRFPath, RegAddr);
#else
if (priv->Rf_Mode == RF_OP_By_FW)
{
Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
}
else
{
Original_Value = phy_RFSerialRead(dev, eRFPath, RegAddr);
}
#endif
BitShift = phy_CalculateBitShift(BitMask);
Readback_Value = (Original_Value & BitMask) >> BitShift;
......@@ -647,7 +604,6 @@ void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32
// 2008.09.06.
//
//#if (HAL_CODE_BASE == RTL8192_S && DEV_BUS_TYPE==USB_INTERFACE)
#ifdef RTL8192SU
//if(RT_USB_CANNOT_IO(Adapter)) return;
if (BitMask != bRFRegOffsetMask) // RF data is 12 bits only
......@@ -659,37 +615,6 @@ void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32
}
else
phy_SetUsbRFReg(dev, eRFPath, RegAddr, Data);
#else
if (priv->Rf_Mode == RF_OP_By_FW)
{
//DbgPrint("eRFPath-%d Addr[%02x] = %08x\n", eRFPath, RegAddr, Data);
if (BitMask != bRFRegOffsetMask) // RF data is 12 bits only
{
Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
New_Value = (((Original_Value) & (~BitMask)) | (Data<< BitShift));
phy_FwRFSerialWrite(dev, eRFPath, RegAddr, New_Value);
}
else
phy_FwRFSerialWrite(dev, eRFPath, RegAddr, Data);
}
else
{
//DbgPrint("eRFPath-%d Addr[%02x] = %08x\n", eRFPath, RegAddr, Data);
if (BitMask != bRFRegOffsetMask) // RF data is 12 bits only
{
Original_Value = phy_RFSerialRead(dev, eRFPath, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
New_Value = (((Original_Value) & (~BitMask)) | (Data<< BitShift));
phy_RFSerialWrite(dev, eRFPath, RegAddr, New_Value);
}
else
phy_RFSerialWrite(dev, eRFPath, RegAddr, Data);
}
#endif
//PlatformReleaseSpinLock(dev, RT_RF_OPERATE_SPINLOCK);
//spin_unlock_irqrestore(&priv->rf_lock, flags); //YJ,test,090113
up(&priv->rf_sem);
......@@ -1477,11 +1402,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E
if(Rtl819XRadioA_Array_Table[i] == 0xfe)
{ // Deay specific ms. Only RF configuration require delay.
//#if (DEV_BUS_TYPE == USB_INTERFACE)
#ifdef RTL8192SU
mdelay(1000);
#else
mdelay(50);
#endif
}
else if (Rtl819XRadioA_Array_Table[i] == 0xfd)
mdelay(5);
......@@ -1505,11 +1426,7 @@ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E
if(Rtl819XRadioB_Array_Table[i] == 0xfe)
{ // Deay specific ms. Only RF configuration require delay.
//#if (DEV_BUS_TYPE == USB_INTERFACE)
#ifdef RTL8192SU
mdelay(1000);
#else
mdelay(50);
#endif
}
else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
mdelay(5);
......@@ -2969,9 +2886,7 @@ void rtl8192_SetBWMode(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth, HT_EX
#endif
if((priv->up) )// && !(RT_CANNOT_IO(Adapter) && Adapter->bInSetPower) )
{
#if defined(RTL8192SU)
SetBWModeCallback8192SUsbWorkItem(dev);
#endif
}
else
{
......@@ -3086,9 +3001,7 @@ u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel)
if((priv->up))// && !(RT_CANNOT_IO(Adapter) && Adapter->bInSetPower))
{
#if defined(RTL8192SU)
SwChnlCallback8192SUsbWorkItem(dev);
#endif
#ifdef TO_DO_LIST
if(bResult)
{
......@@ -3339,13 +3252,9 @@ phy_SwChnlStepByStep(
case CmdID_RF_WriteReg: // Only modify channel for the register now !!!!!
for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
{
#if defined RTL8192SU
// For new T65 RF 0222d register 0x18 bit 0-9 = channel number.
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, 0x1f, (CurrentCmd->Para2));
//printk("====>%x, %x, read_back:%x\n", CurrentCmd->Para2,CurrentCmd->Para1, rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, 0x1f));
#else
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, ((CurrentCmd->Para2)<<7));
#endif
}
break;
default:
......@@ -3813,7 +3722,6 @@ extern void PHY_IQCalibrateBcut(struct net_device* dev)
//
//-------------------------Move to other DIR later----------------------------*/
//#if (DEV_BUS_TYPE == USB_INTERFACE)
#ifdef RTL8192SU
// use in phy only (in win it's timer)
void SwChnlCallback8192SUsb(struct net_device *dev)
......@@ -4190,7 +4098,6 @@ void SetBWModeCallback8192SUsbWorkItem(struct net_device *dev)
}
//--------------------------Move to oter DIR later-------------------------------*/
#ifdef RTL8192SU
void InitialGain8192S(struct net_device *dev, u8 Operation)
{
#ifdef TO_DO_LIST
......@@ -4198,7 +4105,6 @@ void InitialGain8192S(struct net_device *dev, u8 Operation)
#endif
}
#endif
void InitialGain819xUsb(struct net_device *dev, u8 Operation)
{
......@@ -4284,7 +4190,6 @@ extern void InitialGainOperateWorkItemCallBack(struct work_struct *work)
}
}
#endif // #if (DEV_BUS_TYPE == USB_INTERFACE)
//-----------------------------------------------------------------------------
// Description:
......
drivers/staging/rtl8192su/r8192S_rtl6052.c
View file @ 0f29f587
......@@ -23,15 +23,9 @@
#include "r8192U.h"
#include "r8192S_rtl6052.h"
#ifdef RTL8192SU
#include "r8192S_hw.h"
#include "r8192S_phyreg.h"
#include "r8192S_phy.h"
#else
#include "r8192U_hw.h"
#include "r819xU_phyreg.h"
#include "r819xU_phy.h"
#endif
/*---------------------------Define Local Constant---------------------------*/
......@@ -162,7 +156,6 @@ void PHY_RF6052SetBandwidth(struct net_device* dev, HT_CHANNEL_WIDTH Bandwidth)
//if (priv->card_8192 == NIC_8192SE)
#ifdef RTL8192SU //YJ,test,090113
{
switch(Bandwidth)
{
......@@ -184,26 +177,6 @@ void PHY_RF6052SetBandwidth(struct net_device* dev, HT_CHANNEL_WIDTH Bandwidth)
}
}
// else
#else
{
for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
{
switch(Bandwidth)
{
case HT_CHANNEL_WIDTH_20:
//PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, (BIT10|BIT11), 0x01);
break;
case HT_CHANNEL_WIDTH_20_40:
//PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, (BIT10|BIT11), 0x00);
break;
default:
RT_TRACE(COMP_DBG, "PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth );
break;
}
}
}
#endif
}
......
drivers/staging/rtl8192su/r8192U.h
View file @ 0f29f587
......@@ -42,11 +42,7 @@
#include "ieee80211/ieee80211.h"
#ifdef RTL8192SU
#include "r8192S_firmware.h"
#else
#include "r819xU_firmware.h"
#endif
//#define RTL8192U
#define RTL819xU_MODULE_NAME "rtl819xU"
......@@ -305,7 +301,6 @@ do { if(rt_global_debug_component & component) \
#define OFDM_Table_Length 19
#define CCK_Table_length 12
#ifdef RTL8192SU
//
//Tx Descriptor for RLT8192SU(Normal mode)
//
......@@ -423,51 +418,9 @@ typedef struct _tx_status_desc_8192s_usb{
u8 RxAGC3;
u8 RxAGC4;
}tx_status_desc_8192s_usb, *ptx_status_desc_8192s_usb;
#else
/* for rtl819x */
typedef struct _tx_desc_819x_usb {
//DWORD 0
u16 PktSize;
u8 Offset;
u8 Reserved0:3;
u8 CmdInit:1;
u8 LastSeg:1;
u8 FirstSeg:1;
u8 LINIP:1;
u8 OWN:1;
//DWORD 1
u8 TxFWInfoSize;
u8 RATid:3;
u8 DISFB:1;
u8 USERATE:1;
u8 MOREFRAG:1;
u8 NoEnc:1;
u8 PIFS:1;
u8 QueueSelect:5;
u8 NoACM:1;
u8 Reserved1:2;
u8 SecCAMID:5;
u8 SecDescAssign:1;
u8 SecType:2;
//DWORD 2
u16 TxBufferSize;
//u16 Reserved2;
u8 ResvForPaddingLen:7;
u8 Reserved3:1;
u8 Reserved4;
//DWORD 3, 4, 5
u32 Reserved5;
u32 Reserved6;
u32 Reserved7;
}tx_desc_819x_usb, *ptx_desc_819x_usb;
#endif
#ifdef RTL8192SU
//
//Tx Descriptor for RLT8192SU(Load FW mode)
//
......@@ -532,39 +485,7 @@ typedef struct _tx_h2c_cmd_hdr_8192s_usb{
// DWORD 1
u32 Rsvd0;
}tx_h2c_cmd_hdr_8192s_usb, *ptx_h2c_cmd_hdr_8192s_usb;
#else
typedef struct _tx_desc_cmd_819x_usb {
//DWORD 0
u16 Reserved0;
u8 Reserved1;
u8 Reserved2:3;
u8 CmdInit:1;
u8 LastSeg:1;
u8 FirstSeg:1;
u8 LINIP:1;
u8 OWN:1;
//DOWRD 1
//u32 Reserved3;
u8 TxFWInfoSize;
u8 Reserved3;
u8 QueueSelect;
u8 Reserved4;
//DOWRD 2
u16 TxBufferSize;
u16 Reserved5;
//DWORD 3,4,5
//u32 TxBufferAddr;
//u32 NextDescAddress;
u32 Reserved6;
u32 Reserved7;
u32 Reserved8;
}tx_desc_cmd_819x_usb, *ptx_desc_cmd_819x_usb;
#endif
#ifdef RTL8192SU
typedef struct _tx_fwinfo_819x_usb{
//DWORD 0
u8 TxRate:7;
......@@ -593,38 +514,6 @@ typedef struct _tx_fwinfo_819x_usb{
u32 Tx_INFO_RSVD:6;
u32 PacketID:13;
}tx_fwinfo_819x_usb, *ptx_fwinfo_819x_usb;
#else
typedef struct _tx_fwinfo_819x_usb {
//DOWRD 0
u8 TxRate:7;
u8 CtsEnable:1;
u8 RtsRate:7;
u8 RtsEnable:1;
u8 TxHT:1;
u8 Short:1; //Short PLCP for CCK, or short GI for 11n MCS
u8 TxBandwidth:1; // This is used for HT MCS rate only.
u8 TxSubCarrier:2; // This is used for legacy OFDM rate only.
u8 STBC:2;
u8 AllowAggregation:1;
u8 RtsHT:1; //Interpre RtsRate field as high throughput data rate
u8 RtsShort:1; //Short PLCP for CCK, or short GI for 11n MCS
u8 RtsBandwidth:1; // This is used for HT MCS rate only.
u8 RtsSubcarrier:2; // This is used for legacy OFDM rate only.
u8 RtsSTBC:2;
u8 EnableCPUDur:1; //Enable firmware to recalculate and assign packet duration
//DWORD 1
u32 RxMF:2;
u32 RxAMD:3;
u32 TxPerPktInfoFeedback:1;//1 indicate Tx info gathtered by firmware and returned by Rx Cmd
u32 Reserved1:2;
u32 TxAGCOffSet:4;
u32 TxAGCSign:1;
u32 Tx_INFO_RSVD:6;
u32 PacketID:13;
//u32 Reserved;
}tx_fwinfo_819x_usb, *ptx_fwinfo_819x_usb;
#endif
typedef struct rtl8192_rx_info {
struct urb *urb;
......@@ -632,7 +521,6 @@ typedef struct rtl8192_rx_info {
u8 out_pipe;
}rtl8192_rx_info ;
#ifdef RTL8192SU
//typedef struct _RX_DESC_STATUS_8192SU{
typedef struct rx_desc_819x_usb{
//DWORD 0
......@@ -695,36 +583,8 @@ typedef struct rx_desc_819x_usb{
u32 TSFL;
//}RX_DESC_STATUS_8192SU, *PRX_DESC_STATUS_8192SU;
}rx_desc_819x_usb, *prx_desc_819x_usb;
#else
typedef struct rx_desc_819x_usb{
//DOWRD 0
u16 Length:14;
u16 CRC32:1;
u16 ICV:1;
u8 RxDrvInfoSize;
u8 Shift:2;
u8 PHYStatus:1;
u8 SWDec:1;
//u8 LastSeg:1;
//u8 FirstSeg:1;
//u8 EOR:1;
//u8 OWN:1;
u8 Reserved1:4;
//DWORD 1
u32 Reserved2;
//DWORD 2
//u32 Reserved3;
//DWORD 3
//u32 BufferAddress;
}rx_desc_819x_usb, *prx_desc_819x_usb;
#endif
#ifdef RTL8192SU
//
// Driver info are written to the begining of the RxBuffer
//
......@@ -800,41 +660,11 @@ typedef struct rx_drvinfo_819x_usb{
u8 reserve:4;
}rx_drvinfo_819x_usb, *prx_drvinfo_819x_usb;
#else
typedef struct rx_drvinfo_819x_usb{
//DWORD 0
u16 Reserved1:12;
u16 PartAggr:1;
u16 FirstAGGR:1;
u16 Reserved2:2;
u8 RxRate:7;
u8 RxHT:1;
u8 BW:1;
u8 SPLCP:1;
u8 Reserved3:2;
u8 PAM:1;
u8 Mcast:1;
u8 Bcast:1;
u8 Reserved4:1;
//DWORD 1
u32 TSFL;
}rx_drvinfo_819x_usb, *prx_drvinfo_819x_usb;
#endif
#define HWSET_MAX_SIZE_92S 128
#ifdef RTL8192SU
#define MAX_802_11_HEADER_LENGTH 40
#define MAX_PKT_AGG_NUM 256
#define TX_PACKET_SHIFT_BYTES USB_HWDESC_HEADER_LEN
#else
#define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
#define MAX_PKT_AGG_NUM 64
#define TX_PACKET_SHIFT_BYTES (USB_HWDESC_HEADER_LEN + sizeof(tx_fwinfo_819x_usb))
#endif
#define MAX_DEV_ADDR_SIZE 8 /* support till 64 bit bus width OS */
#define MAX_FIRMWARE_INFORMATION_SIZE 32 /*2006/04/30 by Emily forRTL8190*/
......@@ -908,7 +738,6 @@ typedef struct _rt_firmare_seg_container {
u8 *seg_ptr;
}fw_seg_container, *pfw_seg_container;
#ifdef RTL8192SU
//--------------------------------------------------------------------------------
// 8192S Firmware related
//--------------------------------------------------------------------------------
......@@ -1006,16 +835,6 @@ typedef struct _rt_firmware{
//u16 firmware_buf_size;//in 92u temp FIXLZM
}rt_firmware, *prt_firmware;
#else
typedef struct _rt_firmware{
firmware_status_e firmware_status;
u16 cmdpacket_frag_thresold;
#define RTL8190_MAX_FIRMWARE_CODE_SIZE 64000 //64k
#define MAX_FW_INIT_STEP 3
u8 firmware_buf[MAX_FW_INIT_STEP][RTL8190_MAX_FIRMWARE_CODE_SIZE];
u16 firmware_buf_size[MAX_FW_INIT_STEP];
}rt_firmware, *prt_firmware;
#endif
typedef struct _rt_firmware_info_819xUsb{
u8 sz_info[16];
}rt_firmware_info_819xUsb, *prt_firmware_info_819xUsb;
......@@ -1659,11 +1478,7 @@ typedef struct r8192_priv
/*PHY related*/
BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D
// Read/write are allow for following hardware information variables
#ifdef RTL8192SU
u32 MCSTxPowerLevelOriginalOffset[7];//FIXLZM
#else
u32 MCSTxPowerLevelOriginalOffset[6];
#endif
u32 CCKTxPowerLevelOriginalOffset;
u8 TxPowerLevelCCK[14]; // CCK channel 1~14
u8 TxPowerLevelOFDM24G[14]; // OFDM 2.4G channel 1~14
......@@ -1945,14 +1760,9 @@ struct ssid_thread {
};
#endif
#ifdef RTL8192SU
short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb);
bool FirmwareDownload92S(struct net_device *dev);
#else
short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
bool init_firmware(struct net_device *dev);
#endif
short rtl819xU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
......
drivers/staging/rtl8192su/r8192U_core.c
View file @ 0f29f587
This diff is collapsed.
drivers/staging/rtl8192su/r8192U_dm.c
View file @ 0f29f587
This diff is collapsed.
drivers/staging/rtl8192su/r8192U_wx.c
View file @ 0f29f587
......@@ -17,15 +17,9 @@
project Authors.
*/
#ifdef RTL8192SU
#include <linux/string.h>
#include "r8192U.h"
#include "r8192S_hw.h"
#else
#include <linux/string.h>
#include "r8192U.h"
#include "r8192U_hw.h"
#endif
#include "ieee80211/dot11d.h"
......@@ -344,7 +338,6 @@ static int r8192_wx_force_reset(struct net_device *dev,
}
#ifdef RTL8192SU
static int r8191su_wx_get_firm_version(struct net_device *dev,
struct iw_request_info *info,
struct iw_param *wrqu, char *extra)
......@@ -360,7 +353,6 @@ static int r8191su_wx_get_firm_version(struct net_device *dev,
up(&priv->wx_sem);
return 0;
}
#endif
......@@ -1232,14 +1224,12 @@ static const struct iw_priv_args r8192_private_args[] = {
IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "forcereset"
}
#ifdef RTL8192SU
,
{
SIOCIWFIRSTPRIV + 0x5,
IW_PRIV_TYPE_NONE, IW_PRIV_TYPE_INT|IW_PRIV_SIZE_FIXED|1,
"firm_ver"
}
#endif
};
......@@ -1262,9 +1252,7 @@ static iw_handler r8192_private_handler[] = {
#endif
r8192_wx_force_reset,
(iw_handler)NULL,
#ifdef RTL8192SU
(iw_handler)r8191su_wx_get_firm_version,
#endif
};
struct iw_statistics *r8192_get_wireless_stats(struct net_device *dev)
......
drivers/staging/rtl8192su/r819xU_cmdpkt.c
View file @ 0f29f587
......@@ -108,84 +108,7 @@ SendTxCommandPacket(
{
bool rt_status = true;
#ifdef RTL8192SU
return rt_status;
#else
#ifdef RTL8192U
return rt_status;
#else
struct r8192_priv *priv = ieee80211_priv(dev);
u16 frag_threshold;
u16 frag_length, frag_offset = 0;
//u16 total_size;
//int i;
rt_firmware *pfirmware = priv->pFirmware;
struct sk_buff *skb;
unsigned char *seg_ptr;
cb_desc *tcb_desc;
u8 bLastIniPkt;
firmware_init_param(dev);
//Fragmentation might be required
frag_threshold = pfirmware->cmdpacket_frag_thresold;
do {
if((buffer_len - frag_offset) > frag_threshold) {
frag_length = frag_threshold ;
bLastIniPkt = 0;
} else {
frag_length = buffer_len - frag_offset;
bLastIniPkt = 1;
}
/* Allocate skb buffer to contain firmware info and tx descriptor info
* add 4 to avoid packet appending overflow.
* */
#ifdef RTL8192U
skb = dev_alloc_skb(USB_HWDESC_HEADER_LEN + frag_length + 4);
#else
skb = dev_alloc_skb(frag_length + 4);
#endif
memcpy((unsigned char *)(skb->cb),&dev,sizeof(dev));
tcb_desc = (cb_desc*)(skb->cb + MAX_DEV_ADDR_SIZE);
tcb_desc->queue_index = TXCMD_QUEUE;
tcb_desc->bCmdOrInit = packettype;
tcb_desc->bLastIniPkt = bLastIniPkt;
#ifdef RTL8192U
skb_reserve(skb, USB_HWDESC_HEADER_LEN);
#endif
seg_ptr = skb_put(skb, buffer_len);
/*
* Transform from little endian to big endian
* and pending zero
*/
memcpy(seg_ptr,codevirtualaddress,buffer_len);
tcb_desc->txbuf_size= (u16)buffer_len;
if(!priv->ieee80211->check_nic_enough_desc(dev,tcb_desc->queue_index)||
(!skb_queue_empty(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index]))||\
(priv->ieee80211->queue_stop) ) {
RT_TRACE(COMP_FIRMWARE,"=====================================================> tx full!\n");
skb_queue_tail(&priv->ieee80211->skb_waitQ[tcb_desc->queue_index], skb);
} else {
priv->ieee80211->softmac_hard_start_xmit(skb,dev);
}
codevirtualaddress += frag_length;
frag_offset += frag_length;
}while(frag_offset < buffer_len);
return rt_status;
#endif
#endif
} /* CMPK_Message_Handle_Tx */
/*-----------------------------------------------------------------------------
......
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