Commit 0f1a6b1e authored by Kevin Hilman's avatar Kevin Hilman Committed by Tony Lindgren

ARM: OMAP3: fix McBSP clock definitions

McBSP[234] clocks are in PER_MOD, not CORE_MOD.
Signed-off-by: default avatarKevin Hilman <khilman@mvista.com>
Acked-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 8840cbd3
......@@ -2279,7 +2279,7 @@ static const struct clksel mcbsp_234_clksel[] = {
static struct clk mcbsp2_fck = {
.name = "mcbsp2_fck",
.init = &omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_MCBSP2_SHIFT,
.clksel_reg = OMAP343X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0),
.clksel_mask = OMAP2_MCBSP2_CLKS_MASK,
......@@ -2291,7 +2291,7 @@ static struct clk mcbsp2_fck = {
static struct clk mcbsp3_fck = {
.name = "mcbsp3_fck",
.init = &omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_MCBSP3_SHIFT,
.clksel_reg = OMAP343X_CTRL_REGADDR(OMAP343X_CONTROL_DEVCONF1),
.clksel_mask = OMAP2_MCBSP3_CLKS_MASK,
......@@ -2303,7 +2303,7 @@ static struct clk mcbsp3_fck = {
static struct clk mcbsp4_fck = {
.name = "mcbsp4_fck",
.init = &omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_MCBSP4_SHIFT,
.clksel_reg = OMAP343X_CTRL_REGADDR(OMAP343X_CONTROL_DEVCONF1),
.clksel_mask = OMAP2_MCBSP4_CLKS_MASK,
......
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