Commit 0a9cc20b authored by Ingo Molnar's avatar Ingo Molnar

x86, apic: clean up target_cpus methods

Impact: cleanup

Clean up all the target_cpus() namespace overlap that exists
between bigsmp, es7000, mach-default, numaq and summit - by
separating the different functions into different names.
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 7fe73286
...@@ -9,7 +9,7 @@ static inline int bigsmp_apic_id_registered(void) ...@@ -9,7 +9,7 @@ static inline int bigsmp_apic_id_registered(void)
return 1; return 1;
} }
static inline const cpumask_t *target_cpus(void) static inline const cpumask_t *bigsmp_target_cpus(void)
{ {
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
return &cpu_online_map; return &cpu_online_map;
......
...@@ -16,7 +16,7 @@ static inline const cpumask_t *target_cpus_cluster(void) ...@@ -16,7 +16,7 @@ static inline const cpumask_t *target_cpus_cluster(void)
return &CPU_MASK_ALL; return &CPU_MASK_ALL;
} }
static inline const cpumask_t *target_cpus(void) static inline const cpumask_t *es7000_target_cpus(void)
{ {
return &cpumask_of_cpu(smp_processor_id()); return &cpumask_of_cpu(smp_processor_id());
} }
...@@ -83,7 +83,7 @@ static inline void setup_apic_routing(void) ...@@ -83,7 +83,7 @@ static inline void setup_apic_routing(void)
printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
(apic_version[apic] == 0x14) ? (apic_version[apic] == 0x14) ?
"Physical Cluster" : "Logical Cluster", "Physical Cluster" : "Logical Cluster",
nr_ioapics, cpus_addr(*target_cpus())[0]); nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
} }
static inline int multi_timer_check(int apic, int irq) static inline int multi_timer_check(int apic, int irq)
......
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
#define APIC_DFR_VALUE (APIC_DFR_FLAT) #define APIC_DFR_VALUE (APIC_DFR_FLAT)
static inline const struct cpumask *target_cpus(void) static inline const struct cpumask *default_target_cpus(void)
{ {
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
return cpu_online_mask; return cpu_online_mask;
...@@ -33,7 +33,7 @@ static inline const struct cpumask *target_cpus(void) ...@@ -33,7 +33,7 @@ static inline const struct cpumask *target_cpus(void)
#define wakeup_secondary_cpu (apic->wakeup_cpu) #define wakeup_secondary_cpu (apic->wakeup_cpu)
extern void setup_apic_routing(void); extern void setup_apic_routing(void);
#else #else
#define TARGET_CPUS (target_cpus()) #define TARGET_CPUS (default_target_cpus())
#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init #define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
/* /*
* Set up the logical destination ID. * Set up the logical destination ID.
......
...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER) #define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
static inline const cpumask_t *target_cpus(void) static inline const cpumask_t *numaq_target_cpus(void)
{ {
return &CPU_MASK_ALL; return &CPU_MASK_ALL;
} }
......
...@@ -15,7 +15,7 @@ ...@@ -15,7 +15,7 @@
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER) #define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
static inline const cpumask_t *target_cpus(void) static inline const cpumask_t *summit_target_cpus(void)
{ {
/* CPU_MASK_ALL (0xff) has undefined behaviour with /* CPU_MASK_ALL (0xff) has undefined behaviour with
* dest_LowestPrio mode logical clustered apic interrupt routing * dest_LowestPrio mode logical clustered apic interrupt routing
......
...@@ -68,7 +68,7 @@ struct genapic apic_bigsmp = { ...@@ -68,7 +68,7 @@ struct genapic apic_bigsmp = {
/* phys delivery to target CPU: */ /* phys delivery to target CPU: */
.irq_dest_mode = 0, .irq_dest_mode = 0,
.target_cpus = target_cpus, .target_cpus = bigsmp_target_cpus,
.ESR_DISABLE = esr_disable, .ESR_DISABLE = esr_disable,
.apic_destination_logical = APIC_DEST_LOGICAL, .apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used, .check_apicid_used = check_apicid_used,
......
...@@ -35,7 +35,7 @@ struct genapic apic_default = { ...@@ -35,7 +35,7 @@ struct genapic apic_default = {
/* logical delivery broadcast to all CPUs: */ /* logical delivery broadcast to all CPUs: */
.irq_dest_mode = 1, .irq_dest_mode = 1,
.target_cpus = target_cpus, .target_cpus = default_target_cpus,
.ESR_DISABLE = esr_disable, .ESR_DISABLE = esr_disable,
.apic_destination_logical = APIC_DEST_LOGICAL, .apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used, .check_apicid_used = check_apicid_used,
......
...@@ -111,7 +111,7 @@ struct genapic apic_es7000 = { ...@@ -111,7 +111,7 @@ struct genapic apic_es7000 = {
/* phys delivery to target CPUs: */ /* phys delivery to target CPUs: */
.irq_dest_mode = 0, .irq_dest_mode = 0,
.target_cpus = target_cpus, .target_cpus = es7000_target_cpus,
.ESR_DISABLE = esr_disable, .ESR_DISABLE = esr_disable,
.apic_destination_logical = APIC_DEST_LOGICAL, .apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used, .check_apicid_used = check_apicid_used,
......
...@@ -55,7 +55,7 @@ struct genapic apic_numaq = { ...@@ -55,7 +55,7 @@ struct genapic apic_numaq = {
/* physical delivery on LOCAL quad: */ /* physical delivery on LOCAL quad: */
.irq_dest_mode = 0, .irq_dest_mode = 0,
.target_cpus = target_cpus, .target_cpus = numaq_target_cpus,
.ESR_DISABLE = esr_disable, .ESR_DISABLE = esr_disable,
.apic_destination_logical = APIC_DEST_LOGICAL, .apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used, .check_apicid_used = check_apicid_used,
......
...@@ -48,7 +48,7 @@ struct genapic apic_summit = { ...@@ -48,7 +48,7 @@ struct genapic apic_summit = {
/* logical delivery broadcast to all CPUs: */ /* logical delivery broadcast to all CPUs: */
.irq_dest_mode = 1, .irq_dest_mode = 1,
.target_cpus = target_cpus, .target_cpus = summit_target_cpus,
.ESR_DISABLE = esr_disable, .ESR_DISABLE = esr_disable,
.apic_destination_logical = APIC_DEST_LOGICAL, .apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used, .check_apicid_used = check_apicid_used,
......
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