Commit 091465d7 authored by Chris Elmquist's avatar Chris Elmquist Committed by David S. Miller

[TG3]: ethtool -d hangs PCIe systems

Resubmitting after recommendation to use GET_REG32_1() instead of
GET_REG32_LOOP(..., 1).  Retested.  Problem remains fixed.

Prevent tg3_get_regs() from reading reserved and undocumented registers
at RX_CPU_BASE and TX_CPU_BASE offsets which caused hostile behavior
on PCIe platforms.
Acked-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 67dbb4ea
...@@ -7151,8 +7151,13 @@ do { p = (u32 *)(orig_p + (reg)); \ ...@@ -7151,8 +7151,13 @@ do { p = (u32 *)(orig_p + (reg)); \
GET_REG32_LOOP(BUFMGR_MODE, 0x58); GET_REG32_LOOP(BUFMGR_MODE, 0x58);
GET_REG32_LOOP(RDMAC_MODE, 0x08); GET_REG32_LOOP(RDMAC_MODE, 0x08);
GET_REG32_LOOP(WDMAC_MODE, 0x08); GET_REG32_LOOP(WDMAC_MODE, 0x08);
GET_REG32_LOOP(RX_CPU_BASE, 0x280); GET_REG32_1(RX_CPU_MODE);
GET_REG32_LOOP(TX_CPU_BASE, 0x280); GET_REG32_1(RX_CPU_STATE);
GET_REG32_1(RX_CPU_PGMCTR);
GET_REG32_1(RX_CPU_HWBKPT);
GET_REG32_1(TX_CPU_MODE);
GET_REG32_1(TX_CPU_STATE);
GET_REG32_1(TX_CPU_PGMCTR);
GET_REG32_LOOP(GRCMBOX_INTERRUPT_0, 0x110); GET_REG32_LOOP(GRCMBOX_INTERRUPT_0, 0x110);
GET_REG32_LOOP(FTQ_RESET, 0x120); GET_REG32_LOOP(FTQ_RESET, 0x120);
GET_REG32_LOOP(MSGINT_MODE, 0x0c); GET_REG32_LOOP(MSGINT_MODE, 0x0c);
......
...@@ -1124,7 +1124,14 @@ ...@@ -1124,7 +1124,14 @@
/* 0x280 --> 0x400 unused */ /* 0x280 --> 0x400 unused */
#define RX_CPU_BASE 0x00005000 #define RX_CPU_BASE 0x00005000
#define RX_CPU_MODE 0x00005000
#define RX_CPU_STATE 0x00005004
#define RX_CPU_PGMCTR 0x0000501c
#define RX_CPU_HWBKPT 0x00005034
#define TX_CPU_BASE 0x00005400 #define TX_CPU_BASE 0x00005400
#define TX_CPU_MODE 0x00005400
#define TX_CPU_STATE 0x00005404
#define TX_CPU_PGMCTR 0x0000541c
/* Mailboxes */ /* Mailboxes */
#define GRCMBOX_INTERRUPT_0 0x00005800 /* 64-bit */ #define GRCMBOX_INTERRUPT_0 0x00005800 /* 64-bit */
......
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