Commit 05b27233 authored by Trent Piepho's avatar Trent Piepho Committed by Mauro Carvalho Chehab

V4L/DVB (6083): cx88-alsa: Rework buffer handling

Rework the way the DMA buffer is handled and IRQs are generated.

ALSA uses a ring-buffer of multiple periods.  Each period is supposed to
corrispond to one IRQ.

The existing driver was generating one interrupt per ring-buffer, as opposed
to per period.  This meant that as soon as the IRQ was generated, the hardware
was already starting to re-write the beginning of the buffer.  Since the DMA
happens on a per-line basis, there was only a narrow window to copy the data
out before the buffer was overwritten.

The cx88 core RISC program generator is modified so that it can set the IRQ
and counter flags to count every X lines of DMA transfer.  This way we can
generate an interrupt every period instead of every full ring-buffer.  Right
now only period of one line are supported, but it should be possible to
support longer periods.  Note that a WRITE instruction generates an IRQ when
it starts, not when the transfer is finished.  Thus to generate an IRQ when
line X is done, one must set the IRQ flag on the instruction that starts line
X+1, not the one that ends line X.

Change the line size so that there are four lines in the SRAM FIFO.  If there
are not four lines, the analog output from the cx88's internal DACs is full of
clicks and pops.

Try to handle FIFO sync errors.  Sometimes the chip generates many of these
errors before audio data starts.  Up to 50 sync errors will be ignored and the
counter reset.

Have the IRQ handler save the RISC counter to the chip struct, and then have
the pointer callback use this to calculate the pointer position.  We could
read the counter from the pointer callback, but sometimes the sync errors on
start up cause the counter to go crazy.  ALSA sees this and thinks there has
been an overrun.  The IRQ hander can avoid saving the counter position on
sync errors.

The chip "opened" flag wasn't necessary.  ALSA won't try to open the same
substream multiple times.  Probably this code was cut&pasted from the bt87x
driver, which has multiple sub-streams for one chip.

Do error checking for the videobuf mapping functions.

snd_card_cx88_runtime_free() is useless and can be deleted.
Signed-off-by: default avatarTrent Piepho <xyzzy@speakeasy.org>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@infradead.org>
parent 16cf1d0c
This diff is collapsed.
......@@ -68,13 +68,15 @@ static DEFINE_MUTEX(devlist);
#define NO_SYNC_LINE (-1U)
/* @lpi: lines per IRQ, or 0 to not generate irqs. Note: IRQ to be
generated _after_ lpi lines are transferred. */
static u32* cx88_risc_field(u32 *rp, struct scatterlist *sglist,
unsigned int offset, u32 sync_line,
unsigned int bpl, unsigned int padding,
unsigned int lines)
unsigned int lines, unsigned int lpi)
{
struct scatterlist *sg;
unsigned int line,todo;
unsigned int line,todo,sol;
/* sync instruction */
if (sync_line != NO_SYNC_LINE)
......@@ -87,15 +89,19 @@ static u32* cx88_risc_field(u32 *rp, struct scatterlist *sglist,
offset -= sg_dma_len(sg);
sg++;
}
if (lpi && line>0 && !(line % lpi))
sol = RISC_SOL | RISC_IRQ1 | RISC_CNT_INC;
else
sol = RISC_SOL;
if (bpl <= sg_dma_len(sg)-offset) {
/* fits into current chunk */
*(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|RISC_EOL|bpl);
*(rp++)=cpu_to_le32(RISC_WRITE|sol|RISC_EOL|bpl);
*(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
offset+=bpl;
} else {
/* scanline needs to be split */
todo = bpl;
*(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|
*(rp++)=cpu_to_le32(RISC_WRITE|sol|
(sg_dma_len(sg)-offset));
*(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
todo -= (sg_dma_len(sg)-offset);
......@@ -146,10 +152,10 @@ int cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
rp = risc->cpu;
if (UNSET != top_offset)
rp = cx88_risc_field(rp, sglist, top_offset, 0,
bpl, padding, lines);
bpl, padding, lines, 0);
if (UNSET != bottom_offset)
rp = cx88_risc_field(rp, sglist, bottom_offset, 0x200,
bpl, padding, lines);
bpl, padding, lines, 0);
/* save pointer to jmp instruction address */
risc->jmp = rp;
......@@ -159,7 +165,7 @@ int cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
int cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
struct scatterlist *sglist, unsigned int bpl,
unsigned int lines)
unsigned int lines, unsigned int lpi)
{
u32 instructions;
u32 *rp;
......@@ -176,7 +182,7 @@ int cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
/* write risc instructions */
rp = risc->cpu;
rp = cx88_risc_field(rp, sglist, 0, NO_SYNC_LINE, bpl, 0, lines);
rp = cx88_risc_field(rp, sglist, 0, NO_SYNC_LINE, bpl, 0, lines, lpi);
/* save pointer to jmp instruction address */
risc->jmp = rp;
......
......@@ -253,7 +253,7 @@ int cx8802_buf_prepare(struct videobuf_queue *q, struct cx8802_dev *dev,
goto fail;
cx88_risc_databuffer(dev->pci, &buf->risc,
buf->vb.dma.sglist,
buf->vb.width, buf->vb.height);
buf->vb.width, buf->vb.height, 0);
}
buf->vb.state = STATE_PREPARED;
return 0;
......
......@@ -519,7 +519,7 @@ cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
extern int
cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
struct scatterlist *sglist, unsigned int bpl,
unsigned int lines);
unsigned int lines, unsigned int lpi);
extern int
cx88_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
u32 reg, u32 mask, u32 value);
......
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