Commit 04803b9f authored by Kevin Hilman's avatar Kevin Hilman

DaVinci: serial init cleanup

- move UART register definitions to serial.h
- DM646x: move serial reset from board code to chip code
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent d23da8bd
...@@ -117,20 +117,6 @@ static void __init evm_init_i2c(void) ...@@ -117,20 +117,6 @@ static void __init evm_init_i2c(void)
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
} }
#define UART_DM646X_SCR (DAVINCI_UART0_BASE + 0x40)
/*
* Internal UARTs need to be initialized for the 8250 autoconfig to work
* properly. Note that the TX watermark initialization may not be needed
* once the 8250.c watermark handling code is merged.
*/
static int __init dm646x_serial_reset(void)
{
davinci_writel(0x08, UART_DM646X_SCR);
return 0;
}
late_initcall(dm646x_serial_reset);
static void board_init(void) static void board_init(void)
{ {
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DM646X_LPSC_AEMIF, 1); davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DM646X_LPSC_AEMIF, 1);
......
...@@ -18,6 +18,13 @@ ...@@ -18,6 +18,13 @@
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
#define DM355_UART2_BASE (IO_PHYS + 0x206000)
/* DaVinci UART register offsets */
#define UART_DAVINCI_PWREMU 0x0c
#define UART_DM646X_SCR 0x10
#define UART_DM646X_SCR_TX_WATERMARK 0x08
extern void davinci_serial_init(void); extern void davinci_serial_init(void);
#endif /* __ASM_ARCH_SERIAL_H */ #endif /* __ASM_ARCH_SERIAL_H */
...@@ -36,28 +36,18 @@ ...@@ -36,28 +36,18 @@
#include <mach/cpu.h> #include <mach/cpu.h>
#include "clock.h" #include "clock.h"
#define UART_DAVINCI_PWREMU 0x0c static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
#define DM355_UART2_BASE (0x01E06000) int offset)
static inline unsigned int davinci_serial_in(struct plat_serial8250_port *up,
int offset)
{ {
offset <<= up->regshift; offset <<= up->regshift;
return (unsigned int)__raw_readb(up->membase + offset); return (unsigned int)__raw_readl(up->membase + offset);
}
static inline void davinci_serial_outb(struct plat_serial8250_port *p,
int offset, int value)
{
offset <<= p->regshift;
__raw_writeb(value, p->membase + offset);
} }
static inline void davinci_serial_outs(struct plat_serial8250_port *p, static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
int offset, int value) int value)
{ {
offset <<= p->regshift; offset <<= p->regshift;
__raw_writew(value, p->membase + offset); __raw_writel(value, p->membase + offset);
} }
static struct plat_serial8250_port serial_platform_data[] = { static struct plat_serial8250_port serial_platform_data[] = {
...@@ -103,17 +93,21 @@ static struct platform_device serial_device = { ...@@ -103,17 +93,21 @@ static struct platform_device serial_device = {
static void __init davinci_serial_reset(struct plat_serial8250_port *p) static void __init davinci_serial_reset(struct plat_serial8250_port *p)
{ {
/* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
unsigned int pwremu = 0; unsigned int pwremu = 0;
davinci_serial_outb(p, UART_IER, 0); /* disable all interrupts */ serial_write_reg(p, UART_IER, 0); /* disable all interrupts */
davinci_serial_outs(p, UART_DAVINCI_PWREMU, pwremu); /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
mdelay(10); mdelay(10);
pwremu |= (0x3 << 13); pwremu |= (0x3 << 13);
pwremu |= 0x1; pwremu |= 0x1;
davinci_serial_outs(p, UART_DAVINCI_PWREMU, pwremu); serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
if (cpu_is_davinci_dm646x())
serial_write_reg(p, UART_DM646X_SCR,
UART_DM646X_SCR_TX_WATERMARK);
} }
void __init davinci_serial_init(void) void __init davinci_serial_init(void)
...@@ -166,8 +160,7 @@ void __init davinci_serial_init(void) ...@@ -166,8 +160,7 @@ void __init davinci_serial_init(void)
__func__, __LINE__, i); __func__, __LINE__, i);
else { else {
clk_enable(uart_clk); clk_enable(uart_clk);
if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm355()) davinci_serial_reset(p);
davinci_serial_reset(p);
} }
} }
} }
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment