Commit 0367a8d3 authored by Lucas Correia Villa Real's avatar Lucas Correia Villa Real Committed by Russell King

[ARM] 3266/1: S3C2400 - adds macro S3C24XX

Patch from Lucas Correia Villa Real

This patch defines S3C2400 memory map and adds a S3C24XX macro for
common resources between S3C2400, S3C2410 and S3C2440 cpus.
Signed-off-by: default avatarLucas Correia Villa Real <lucasvr@gobolinux.org>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent c43e6f02
...@@ -17,11 +17,12 @@ ...@@ -17,11 +17,12 @@
* 14-Jan-2005 BJD Added s3c24xx_init_clocks() call * 14-Jan-2005 BJD Added s3c24xx_init_clocks() call
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ} & IODESC_ENT * 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ} & IODESC_ENT
* 14-Mar-2005 BJD Updated for __iomem * 14-Mar-2005 BJD Updated for __iomem
* 15-Jan-2006 LCVR Updated S3C2410_PA_##x to new S3C24XX_PA_##x macro
*/ */
/* todo - fix when rmk changes iodescs to use `void __iomem *` */ /* todo - fix when rmk changes iodescs to use `void __iomem *` */
#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C2410_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
#ifndef MHZ #ifndef MHZ
#define MHZ (1000*1000) #define MHZ (1000*1000)
......
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
* *
* Modifications: * Modifications:
* 15-Jan-2006 LCVR Using S3C24XX_PA_##x macro for common S3C24XX devices
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ} * 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
* 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv * 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
* 29-Aug-2004 BJD Added timers 0 through 3 * 29-Aug-2004 BJD Added timers 0 through 3
...@@ -46,8 +47,8 @@ struct platform_device *s3c24xx_uart_devs[3]; ...@@ -46,8 +47,8 @@ struct platform_device *s3c24xx_uart_devs[3];
static struct resource s3c_usb_resource[] = { static struct resource s3c_usb_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_USBHOST, .start = S3C24XX_PA_USBHOST,
.end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST - 1, .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -76,8 +77,8 @@ EXPORT_SYMBOL(s3c_device_usb); ...@@ -76,8 +77,8 @@ EXPORT_SYMBOL(s3c_device_usb);
static struct resource s3c_lcd_resource[] = { static struct resource s3c_lcd_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_LCD, .start = S3C24XX_PA_LCD,
.end = S3C2410_PA_LCD + S3C24XX_SZ_LCD - 1, .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -139,8 +140,8 @@ EXPORT_SYMBOL(s3c_device_nand); ...@@ -139,8 +140,8 @@ EXPORT_SYMBOL(s3c_device_nand);
static struct resource s3c_usbgadget_resource[] = { static struct resource s3c_usbgadget_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_USBDEV, .start = S3C24XX_PA_USBDEV,
.end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV - 1, .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -164,8 +165,8 @@ EXPORT_SYMBOL(s3c_device_usbgadget); ...@@ -164,8 +165,8 @@ EXPORT_SYMBOL(s3c_device_usbgadget);
static struct resource s3c_wdt_resource[] = { static struct resource s3c_wdt_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_WATCHDOG, .start = S3C24XX_PA_WATCHDOG,
.end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1, .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -189,8 +190,8 @@ EXPORT_SYMBOL(s3c_device_wdt); ...@@ -189,8 +190,8 @@ EXPORT_SYMBOL(s3c_device_wdt);
static struct resource s3c_i2c_resource[] = { static struct resource s3c_i2c_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_IIC, .start = S3C24XX_PA_IIC,
.end = S3C2410_PA_IIC + S3C24XX_SZ_IIC - 1, .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -214,8 +215,8 @@ EXPORT_SYMBOL(s3c_device_i2c); ...@@ -214,8 +215,8 @@ EXPORT_SYMBOL(s3c_device_i2c);
static struct resource s3c_iis_resource[] = { static struct resource s3c_iis_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_IIS, .start = S3C24XX_PA_IIS,
.end = S3C2410_PA_IIS + S3C24XX_SZ_IIS -1, .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
} }
}; };
...@@ -239,8 +240,8 @@ EXPORT_SYMBOL(s3c_device_iis); ...@@ -239,8 +240,8 @@ EXPORT_SYMBOL(s3c_device_iis);
static struct resource s3c_rtc_resource[] = { static struct resource s3c_rtc_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_RTC, .start = S3C24XX_PA_RTC,
.end = S3C2410_PA_RTC + 0xff, .end = S3C24XX_PA_RTC + 0xff,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -268,8 +269,8 @@ EXPORT_SYMBOL(s3c_device_rtc); ...@@ -268,8 +269,8 @@ EXPORT_SYMBOL(s3c_device_rtc);
static struct resource s3c_adc_resource[] = { static struct resource s3c_adc_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_ADC, .start = S3C24XX_PA_ADC,
.end = S3C2410_PA_ADC + S3C24XX_SZ_ADC - 1, .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -316,8 +317,8 @@ EXPORT_SYMBOL(s3c_device_sdi); ...@@ -316,8 +317,8 @@ EXPORT_SYMBOL(s3c_device_sdi);
static struct resource s3c_spi0_resource[] = { static struct resource s3c_spi0_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_SPI, .start = S3C24XX_PA_SPI,
.end = S3C2410_PA_SPI + 0x1f, .end = S3C24XX_PA_SPI + 0x1f,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -341,8 +342,8 @@ EXPORT_SYMBOL(s3c_device_spi0); ...@@ -341,8 +342,8 @@ EXPORT_SYMBOL(s3c_device_spi0);
static struct resource s3c_spi1_resource[] = { static struct resource s3c_spi1_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_SPI + 0x20, .start = S3C24XX_PA_SPI + 0x20,
.end = S3C2410_PA_SPI + 0x20 + 0x1f, .end = S3C24XX_PA_SPI + 0x20 + 0x1f,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -366,8 +367,8 @@ EXPORT_SYMBOL(s3c_device_spi1); ...@@ -366,8 +367,8 @@ EXPORT_SYMBOL(s3c_device_spi1);
static struct resource s3c_timer0_resource[] = { static struct resource s3c_timer0_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_TIMER + 0x0C, .start = S3C24XX_PA_TIMER + 0x0C,
.end = S3C2410_PA_TIMER + 0x0C + 0xB, .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -391,8 +392,8 @@ EXPORT_SYMBOL(s3c_device_timer0); ...@@ -391,8 +392,8 @@ EXPORT_SYMBOL(s3c_device_timer0);
static struct resource s3c_timer1_resource[] = { static struct resource s3c_timer1_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_TIMER + 0x18, .start = S3C24XX_PA_TIMER + 0x18,
.end = S3C2410_PA_TIMER + 0x23, .end = S3C24XX_PA_TIMER + 0x23,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -416,8 +417,8 @@ EXPORT_SYMBOL(s3c_device_timer1); ...@@ -416,8 +417,8 @@ EXPORT_SYMBOL(s3c_device_timer1);
static struct resource s3c_timer2_resource[] = { static struct resource s3c_timer2_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_TIMER + 0x24, .start = S3C24XX_PA_TIMER + 0x24,
.end = S3C2410_PA_TIMER + 0x2F, .end = S3C24XX_PA_TIMER + 0x2F,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
...@@ -441,8 +442,8 @@ EXPORT_SYMBOL(s3c_device_timer2); ...@@ -441,8 +442,8 @@ EXPORT_SYMBOL(s3c_device_timer2);
static struct resource s3c_timer3_resource[] = { static struct resource s3c_timer3_resource[] = {
[0] = { [0] = {
.start = S3C2410_PA_TIMER + 0x30, .start = S3C24XX_PA_TIMER + 0x30,
.end = S3C2410_PA_TIMER + 0x3B, .end = S3C24XX_PA_TIMER + 0x3B,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
......
...@@ -1152,7 +1152,7 @@ static int __init s3c2410_init_dma(void) ...@@ -1152,7 +1152,7 @@ static int __init s3c2410_init_dma(void)
printk("S3C2410 DMA Driver, (c) 2003-2004 Simtec Electronics\n"); printk("S3C2410 DMA Driver, (c) 2003-2004 Simtec Electronics\n");
dma_base = ioremap(S3C2410_PA_DMA, 0x200); dma_base = ioremap(S3C24XX_PA_DMA, 0x200);
if (dma_base == NULL) { if (dma_base == NULL) {
printk(KERN_ERR "dma failed to remap register block\n"); printk(KERN_ERR "dma failed to remap register block\n");
return -ENOMEM; return -ENOMEM;
......
...@@ -133,12 +133,12 @@ ENTRY(s3c2410_cpu_resume) ...@@ -133,12 +133,12 @@ ENTRY(s3c2410_cpu_resume)
@@ load UART to allow us to print the two characters for @@ load UART to allow us to print the two characters for
@@ resume debug @@ resume debug
mov r2, #S3C2410_PA_UART & 0xff000000 mov r2, #S3C24XX_PA_UART & 0xff000000
orr r2, r2, #S3C2410_PA_UART & 0xff000 orr r2, r2, #S3C24XX_PA_UART & 0xff000
#if 0 #if 0
/* SMDK2440 LED set */ /* SMDK2440 LED set */
mov r14, #S3C2410_PA_GPIO mov r14, #S3C24XX_PA_GPIO
ldr r12, [ r14, #0x54 ] ldr r12, [ r14, #0x54 ]
bic r12, r12, #3<<4 bic r12, r12, #3<<4
orr r12, r12, #1<<7 orr r12, r12, #1<<7
......
...@@ -1060,7 +1060,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, ...@@ -1060,7 +1060,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
dbg("resource %p (%lx..%lx)\n", res, res->start, res->end); dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
port->mapbase = res->start; port->mapbase = res->start;
port->membase = S3C24XX_VA_UART + (res->start - S3C2410_PA_UART); port->membase = S3C24XX_VA_UART + (res->start - S3C24XX_PA_UART);
port->irq = platform_get_irq(platdev, 0); port->irq = platform_get_irq(platdev, 0);
ourport->clk = clk_get(&platdev->dev, "uart"); ourport->clk = clk_get(&platdev->dev, "uart");
......
...@@ -25,7 +25,7 @@ ...@@ -25,7 +25,7 @@
.macro addruart, rx .macro addruart, rx
mrc p15, 0, \rx, c1, c0 mrc p15, 0, \rx, c1, c0
tst \rx, #1 tst \rx, #1
ldreq \rx, = S3C2410_PA_UART ldreq \rx, = S3C24XX_PA_UART
ldrne \rx, = S3C24XX_VA_UART ldrne \rx, = S3C24XX_VA_UART
#if CONFIG_DEBUG_S3C2410_UART != 0 #if CONFIG_DEBUG_S3C2410_UART != 0
add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C2410_UART) add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C2410_UART)
...@@ -44,7 +44,7 @@ ...@@ -44,7 +44,7 @@
1003: 1003:
mrc p15, 0, \rd, c1, c0 mrc p15, 0, \rd, c1, c0
tst \rd, #1 tst \rd, #1
addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART) addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART) addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
bic \rd, \rd, #0xff000 bic \rd, \rd, #0xff000
ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
...@@ -75,7 +75,7 @@ ...@@ -75,7 +75,7 @@
1003: 1003:
mrc p15, 0, \rd, c1, c0 mrc p15, 0, \rd, c1, c0
tst \rd, #1 tst \rd, #1
addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART) addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART) addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
bic \rd, \rd, #0xff000 bic \rd, \rd, #0xff000
ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
......
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
* 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out * 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out
* 10-Feb-2005 BJD Added CAMIF definition from guillaume.gourat@nexvision.tv * 10-Feb-2005 BJD Added CAMIF definition from guillaume.gourat@nexvision.tv
* 10-Mar-2005 LCVR Added support to S3C2400, changed {VA,SZ} names * 10-Mar-2005 LCVR Added support to S3C2400, changed {VA,SZ} names
* 15-Jan-2006 LCVR Added S3C24XX_PA macros for common S3C24XX resources
*/ */
#ifndef __ASM_ARCH_MAP_H #ifndef __ASM_ARCH_MAP_H
...@@ -188,5 +189,42 @@ ...@@ -188,5 +189,42 @@
#define S3C2400_SDRAM_PA (S3C2400_CS6) #define S3C2400_SDRAM_PA (S3C2400_CS6)
/* Use a single interface for common resources between S3C24XX cpus */
#ifdef CONFIG_CPU_S3C2400
#define S3C24XX_PA_IRQ S3C2400_PA_IRQ
#define S3C24XX_PA_MEMCTRL S3C2400_PA_MEMCTRL
#define S3C24XX_PA_USBHOST S3C2400_PA_USBHOST
#define S3C24XX_PA_DMA S3C2400_PA_DMA
#define S3C24XX_PA_CLKPWR S3C2400_PA_CLKPWR
#define S3C24XX_PA_LCD S3C2400_PA_LCD
#define S3C24XX_PA_UART S3C2400_PA_UART
#define S3C24XX_PA_TIMER S3C2400_PA_TIMER
#define S3C24XX_PA_USBDEV S3C2400_PA_USBDEV
#define S3C24XX_PA_WATCHDOG S3C2400_PA_WATCHDOG
#define S3C24XX_PA_IIC S3C2400_PA_IIC
#define S3C24XX_PA_IIS S3C2400_PA_IIS
#define S3C24XX_PA_GPIO S3C2400_PA_GPIO
#define S3C24XX_PA_RTC S3C2400_PA_RTC
#define S3C24XX_PA_ADC S3C2400_PA_ADC
#define S3C24XX_PA_SPI S3C2400_PA_SPI
#else
#define S3C24XX_PA_IRQ S3C2410_PA_IRQ
#define S3C24XX_PA_MEMCTRL S3C2410_PA_MEMCTRL
#define S3C24XX_PA_USBHOST S3C2410_PA_USBHOST
#define S3C24XX_PA_DMA S3C2410_PA_DMA
#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR
#define S3C24XX_PA_LCD S3C2410_PA_LCD
#define S3C24XX_PA_UART S3C2410_PA_UART
#define S3C24XX_PA_TIMER S3C2410_PA_TIMER
#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV
#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG
#define S3C24XX_PA_IIC S3C2410_PA_IIC
#define S3C24XX_PA_IIS S3C2410_PA_IIS
#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
#define S3C24XX_PA_RTC S3C2410_PA_RTC
#define S3C24XX_PA_ADC S3C2410_PA_ADC
#define S3C24XX_PA_SPI S3C2410_PA_SPI
#endif
#endif /* __ASM_ARCH_MAP_H */ #endif /* __ASM_ARCH_MAP_H */
...@@ -39,9 +39,9 @@ ...@@ -39,9 +39,9 @@
#define S3C24XX_VA_UART1 (S3C24XX_VA_UART + 0x4000 ) #define S3C24XX_VA_UART1 (S3C24XX_VA_UART + 0x4000 )
#define S3C24XX_VA_UART2 (S3C24XX_VA_UART + 0x8000 ) #define S3C24XX_VA_UART2 (S3C24XX_VA_UART + 0x8000 )
#define S3C2410_PA_UART0 (S3C2410_PA_UART) #define S3C2410_PA_UART0 (S3C24XX_PA_UART)
#define S3C2410_PA_UART1 (S3C2410_PA_UART + 0x4000 ) #define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 )
#define S3C2410_PA_UART2 (S3C2410_PA_UART + 0x8000 ) #define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 )
#define S3C2410_URXH (0x24) #define S3C2410_URXH (0x24)
#define S3C2410_UTXH (0x20) #define S3C2410_UTXH (0x20)
......
...@@ -35,13 +35,13 @@ ...@@ -35,13 +35,13 @@
#undef S3C2410_GPIOREG #undef S3C2410_GPIOREG
#undef S3C2410_WDOGREG #undef S3C2410_WDOGREG
#define S3C2410_GPIOREG(x) ((S3C2410_PA_GPIO + (x))) #define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x)))
#define S3C2410_WDOGREG(x) ((S3C2410_PA_WATCHDOG + (x))) #define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
/* how many bytes we allow into the FIFO at a time in FIFO mode */ /* how many bytes we allow into the FIFO at a time in FIFO mode */
#define FIFO_MAX (14) #define FIFO_MAX (14)
#define uart_base S3C2410_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT) #define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C2410_LOWLEVEL_UART_PORT)
static __inline__ void static __inline__ void
uart_wr(unsigned int reg, unsigned int val) uart_wr(unsigned int reg, unsigned int val)
......
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