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Stefan Richter authored
It seems unlikely, but access to self_id_cpu[0] could at least in theory be deferred until after the loop over self_id_cpu[1..n] or even after the subsequent reg_read. Enforce the desired order by a read barrier. Also prevent the reg_read from being reordered relative to the for loop. This isn't necessary if the loop's conditional printk counts as an implicit barrier, but better make it explicit. (self_id_cpu[] is a coherent DMA buffer.) Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
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