The 82575 has an issue in which the DMA will go out of sync if the link
partner goes into an L0s state.  To prevent this we set the pci-e link
partner capability bits to disable the L0s transition on the hw.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>