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Paul Serice authored
From: Paul Serice <paul@serice.net> The workaround in commit f7201c3d broke. The work around requires memory for DMA transfers for some NVidia EHCI controllers to be below 2GB, but recent changes have caused some DMA memory to be allocated before the DMA mask is set. Signed-off-by: Paul Serice <paul@serice.net> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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