The MI clock is not configured correctly on adapters with the CPMU
present.  The tg3 driver has code which statically sets the MI clock to
be a fraction of the speed at which the core clock is running.
However, the CPMU can change the adapter's core clock frequency based
on operating conditions.  Consequently, the MI will run slow when the
core's clock has been slowed down.

There is a new 500KHz constant frequency clock available on adapters
with a CPMU.  This patch removes the static core clock scaling and
configures the MI clock to use this new 500KHz clock instead.

Running the MI clock at slower speeds will not directly result in data
corruption, but it does challenge the PHY read and write routine timeouts.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>