• James Cleverdon's avatar
    [PATCH] i386/x86-64: Share interrupt vectors when there is a large number of interrupt sources · 6004e1b7
    James Cleverdon authored
    Here's a patch that builds on Natalie Protasevich's IRQ compression
    patch and tries to work for MPS boots as well as ACPI.  It is meant for
    a 4-node IBM x460 NUMA box, which was dying because it had interrupt
    pins with GSI numbers > NR_IRQS and thus overflowed irq_desc.
    
    The problem is that this system has 270 GSIs (which are 1:1 mapped with
    I/O APIC RTEs) and an 8-node box would have 540.  This is much bigger
    than NR_IRQS (224 for both i386 and x86_64).  Also, there aren't enough
    vectors to go around.  There are about 190 usable vectors, not counting
    the reserved ones and the unused vectors at 0x20 to 0x2F.  So, my patch
    attempts to compress the GSI range and share vectors by sharing IRQs.
    
    Cc: "Protasevich, Natalie" <Natalie.Protasevich@unisys.com>
    Signed-off-by: default avatarAndi Kleen <ak@suse.de>
    Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
    6004e1b7
mpparse.c 24.7 KB