DISPC DMA can, in certain conditions, underflow which will trigger an error
condition and halt the graphics pipeline. The only way to recover from
this would be to reset the related HW modules, which would abort the
current transfer and cause unwanted visual side-effects. The problem
arises mainly when enabling multiple planes with higher resolutions.

The arbitration priority of the DISPC DMA cannot be raised higher, thus -
so far - the only workaround is to keep the DMA FIFO full as much as
possible to minimize the risk of it being totally drained. The patch does
this for external LCD controllers connected to RFBI, where the new FIFO
setting doesn't degrade power consumption significantly.
Signed-off-by: Imre Deak <imre.deak@solidboot.com>
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>