Many OMAP2 clocks are either source- or divisor-selectable by twiddling
various register bits; these are 'clksel' clocks.  The table of rate divisors
and source clock settings was previously embedded in the clock.c source code.
Encode this data in two data structures:

1) struct clksel_rate for divisor-selection, mapping divisor values to
register bit field values, along with a flags field indicating which
chips the rate is available for -- one for each parent-rate combination; and:

2) struct clksel for source-selection, mapping parent struct clk pointers
to struct clksel_rate array pointers; one for each parent.

Also, add several fields to the clk structure:

1) clksel: pointer to the struct clksel array

2) clksel_reg: pointer to the clksel register

3) clksel_mask: mask for the clksel bitfield

Add this data to each clksel clock.  All this data is not yet used by the clock
framework; that functionality is in the following patches.

N.B. Two clocks, sys_clkout and sys_clkout2, could not be converted to
this setup without splitting source selection and divisor selection.
This is because these clocks use separate registers for each
selector.  So, create two new clocks, sys_clkout_src and
sys_clkout2_src, and locate source-selection there, and keep divisor
selection in sys_clkout/sys_clkout2.  This entailed modifying
board-n800-audio.c.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>