• Paul Mackerras's avatar
    perf_counter: powerpc: Make powerpc perf_counter code safe for 32-bit kernels · 98fb1807
    Paul Mackerras authored
    This abstracts a few things in arch/powerpc/kernel/perf_counter.c
    that are specific to 64-bit kernels, and provides definitions for
    32-bit kernels.  In particular,
    
    * Only 64-bit has MMCRA and the bits in it that give information
      about a PMU interrupt (sampled PR, HV, slot number etc.)
    * Only 64-bit has the lppaca and the lppaca->pmcregs_in_use field
    * Use of SDAR is confined to 64-bit for now
    * Only 64-bit has soft/lazy interrupt disable and therefore
      pseudo-NMIs (interrupts that occur while interrupts are soft-disabled)
    * Only 64-bit has PMC7 and PMC8
    * Only 64-bit has the MSR_HV bit.
    
    This also fixes the types used in a couple of places, where we were
    using long types for things that need to be 64-bit.
    Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
    Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
    Cc: linuxppc-dev@ozlabs.org
    Cc: benh@kernel.crashing.org
    LKML-Reference: <19000.55590.634126.876084@cargo.ozlabs.ibm.com>
    Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
    98fb1807
perf_counter.c 31.9 KB