• Roland Dreier's avatar
    mlx4_core: Allocate and map sufficient ICM memory for EQ context · 0dadca5c
    Roland Dreier authored
    commit fa0681d2 upstream.
    
    The current implementation allocates a single host page for EQ context
    memory, which was OK when we only allocated a few EQs.  However, since
    we now allocate an EQ for each CPU core, this patch removes the
    hard-coded limit (which we exceed with 4 KB pages and 128 byte EQ
    context entries with 32 CPUs) and uses the same ICM table code as all
    other context tables, which ends up simplifying the code quite a bit
    while fixing the problem.
    
    This problem was actually hit in practice on a dual-socket Nehalem box
    with 16 real hardware threads and sufficiently odd ACPI tables that it
    shows on boot
    
        SMP: Allowing 32 CPUs, 16 hotplug CPUs
    
    so num_possible_cpus() ends up 32, and mlx4 ends up creating 33 MSI-X
    interrupts and 33 EQs.  This mlx4 bug means that mlx4 can't even
    initialize at all on this quite mainstream system.
    Reported-by: default avatarEli Cohen <eli@mellanox.co.il>
    Tested-by: default avatarChristoph Lameter <cl@linux-foundation.org>
    Signed-off-by: default avatarRoland Dreier <rolandd@cisco.com>
    Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
    0dadca5c
main.c 35.4 KB