1. 02 Oct, 2006 31 commits
  2. 01 Oct, 2006 9 commits
    • Linus Torvalds's avatar
      pccard_store_cis: fix wrong error handling · d834c165
      Linus Torvalds authored
      The test for the error from pcmcia_replace_cis() was incorrect, and
      would always trigger (because if an error didn't happen, the "ret" value
      would not be zero, it would be the passed-in count).
      
      Reported and debugged by Fabrice Bellet <fabrice@bellet.info>
      
      Rather than just fix the single broken test, make the code in question
      use an understandable code-sequence instead, fixing the whole function
      to be more readable.
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      d834c165
    • Andrew Morton's avatar
      [PATCH] rtc-sysfs fix · 4e9011d5
      Andrew Morton authored
      It's not clear how this thinko got through..
      
      Cc: Olaf Hering <olaf@aepfle.de>
      Cc: David Brownell <david-b@pacbell.net>
      Cc: Alessandro Zummo <alessandro.zummo@towertech.it>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      4e9011d5
    • Linus Torvalds's avatar
      Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart · 82965add
      Linus Torvalds authored
      * master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart:
        [AGPGART] printk fixups.
        [AGPGART] Use pci_get_slot not pci_find_slot
      82965add
    • Linus Torvalds's avatar
      Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq · f0b364a1
      Linus Torvalds authored
      * master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq:
        [CPUFREQ] Make acpi-cpufreq unsticky again.
        [CPUFREQ] longhaul: remove duplicated code.
        [CPUFREQ] Longhaul - Disable arbiter CLE266
        [CPUFREQ] Fix section mismatch warning
        [CPUFREQ] Fix cut-n-paste bug in suspend printk
      f0b364a1
    • Zachary Amsden's avatar
      [PATCH] Some config.h removals · 5a73fdc5
      Zachary Amsden authored
      During tracking down a PAE compile failure, I found that config.h was being
      included in a bunch of places in i386 code.  It is no longer necessary, so
      drop it.
      Signed-off-by: default avatarZachary Amsden <zach@vmware.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Jeremy Fitzhardinge <jeremy@xensource.com>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      5a73fdc5
    • Zachary Amsden's avatar
      [PATCH] paravirt: update pte hook · 789e6ac0
      Zachary Amsden authored
      Add a pte_update_hook which notifies about pte changes that have been made
      without using the set_pte / clear_pte interfaces.  This allows shadow mode
      hypervisors which do not trap on page table access to maintain synchronized
      shadows.
      
      It also turns out, there was one pte update in PAE mode that wasn't using any
      accessor interface at all for setting NX protection.  Considering it is PAE
      specific, and the accessor is i386 specific, I didn't want to add a generic
      encapsulation of this behavior yet.
      Signed-off-by: default avatarZachary Amsden <zach@vmware.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Jeremy Fitzhardinge <jeremy@xensource.com>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      789e6ac0
    • Zachary Amsden's avatar
      [PATCH] paravirt: remove set pte atomic · a93cb055
      Zachary Amsden authored
      Now that ptep_establish has a definition in PAE i386 3-level paging code, the
      only paging model which is insane enough to have multi-word hardware PTEs
      which are not efficient to set atomically, we can remove the ghost of
      set_pte_atomic from other architectures which falesly duplicated it, and
      remove all knowledge of it from the generic pgtable code.
      
      set_pte_atomic is now a private pte operator which is specific to i386
      Signed-off-by: default avatarZachary Amsden <zach@vmware.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Jeremy Fitzhardinge <jeremy@xensource.com>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      a93cb055
    • Zachary Amsden's avatar
      [PATCH] paravirt: optimize ptep establish for pae · d6d861e3
      Zachary Amsden authored
      The ptep_establish macro is only used on user-level PTEs, for P->P mapping
      changes.  Since these always happen under protection of the pagetable lock,
      the strong synchronization of a 64-bit cmpxchg is not needed, in fact, not
      even a lock prefix needs to be used.  We can simply instead clear the P-bit,
      followed by a normal set.  The write ordering is still important to avoid the
      possibility of the TLB snooping a partially written PTE and getting a bad
      mapping installed.
      Signed-off-by: default avatarZachary Amsden <zach@vmware.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Jeremy Fitzhardinge <jeremy@xensource.com>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      d6d861e3
    • Zachary Amsden's avatar
      [PATCH] paravirt: kpte flush · 23002d88
      Zachary Amsden authored
      Create a new PTE function which combines clearing a kernel PTE with the
      subsequent flush.  This allows the two to be easily combined into a single
      hypercall or paravirt-op.  More subtly, reverse the order of the flush for
      kmap_atomic.  Instead of flushing on establishing a mapping, flush on clearing
      a mapping.  This eliminates the possibility of leaving stale kmap entries
      which may still have valid TLB mappings.  This is required for direct mode
      hypervisors, which need to reprotect all mappings of a given page when
      changing the page type from a normal page to a protected page (such as a page
      table or descriptor table page).  But it also provides some nicer semantics
      for real hardware, by providing extra debug-proofing against using stale
      mappings, as well as ensuring that no stale mappings exist when changing the
      cacheability attributes of a page, which could lead to cache conflicts when
      two different types of mappings exist for the same page.
      Signed-off-by: default avatarZachary Amsden <zach@vmware.com>
      Cc: Rusty Russell <rusty@rustcorp.com.au>
      Cc: Jeremy Fitzhardinge <jeremy@xensource.com>
      Cc: Andi Kleen <ak@suse.de>
      Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      23002d88