1. 26 Sep, 2005 1 commit
    • David S. Miller's avatar
      [SPARC64]: Probe D/I/E-cache config and use. · 80dc0d6b
      David S. Miller authored
      At boot time, determine the D-cache, I-cache and E-cache size and
      line-size.  Use them in cache flushes when appropriate.
      
      This change was motivated by discovering that the D-cache on
      UltraSparc-IIIi and later are 64K not 32K, and the flushes done by the
      Cheetah error handlers were assuming a 32K size.
      
      There are still some pieces of code that are hard coding things and
      will need to be fixed up at some point.
      
      While we're here, fix the D-cache and I-cache parity error handlers
      to run with interrupts disabled, and when the trap occurs at trap
      level > 1 log the event via a counter displayed in /proc/cpuinfo.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      80dc0d6b
  2. 25 Sep, 2005 2 commits
    • David S. Miller's avatar
      [SPARC64]: Add CONFIG_DEBUG_PAGEALLOC support. · 56425306
      David S. Miller authored
      The trick is that we do the kernel linear mapping TLB miss starting
      with an instruction sequence like this:
      
      	ba,pt		%xcc, kvmap_load
      	 xor		%g2, %g4, %g5
      
      succeeded by an instruction sequence which performs a full page table
      walk starting at swapper_pg_dir.
      
      We first take over the trap table from the firmware.  Then, using this
      constant PTE generation for the linear mapping area above, we build
      the kernel page tables for the linear mapping.
      
      After this is setup, we patch that branch above into a "nop", which
      will cause TLB misses to fall through to the full page table walk.
      
      With this, the page unmapping for CONFIG_DEBUG_PAGEALLOC is trivial.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      56425306
    • David S. Miller's avatar
      [SPARC64]: Fix mask formation in tomatillo_wsync_handler() · 52f26deb
      David S. Miller authored
      "1" needs to be "1UL", this is a 64-bit mask we're creating.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      52f26deb
  3. 23 Sep, 2005 4 commits
    • David S. Miller's avatar
    • David S. Miller's avatar
      [SPARC64]: Kill unused variable in setup_arch() · 1c9ea5db
      David S. Miller authored
      'highest_paddr' is set, but never actually used.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1c9ea5db
    • David S. Miller's avatar
      a8201c61
    • David S. Miller's avatar
      [SPARC64]: Rewrite bootup sequence. · bff06d55
      David S. Miller authored
      Instead of all of this cpu-specific code to remap the kernel
      to the correct location, use portable firmware calls to do
      this instead.
      
      What we do now is the following in position independant
      assembler:
      
      	chosen_node = prom_finddevice("/chosen");
      	prom_mmu_ihandle_cache = prom_getint(chosen_node, "mmu");
      	vaddr = 4MB_ALIGN(current_text_addr());
      	prom_translate(vaddr, &paddr_high, &paddr_low, &mode);
      	prom_boot_mapping_mode = mode;
      	prom_boot_mapping_phys_high = paddr_high;
      	prom_boot_mapping_phys_low = paddr_low;
      	prom_map(-1, 8 * 1024 * 1024, KERNBASE, paddr_low);
      
      and that replaces the massive amount of by-hand TLB probing and
      programming we used to do here.
      
      The new code should also handle properly the case where the kernel
      is mapped at the correct address already (think: future kexec
      support).
      
      Consequently, the bulk of remap_kernel() dies as does the entirety
      of arch/sparc64/prom/map.S
      
      We try to share some strings in the PROM library with the ones used
      at bootup, and while we're here mark input strings to oplib.h routines
      with "const" when appropriate.
      
      There are many more simplifications now possible.  For one thing, we
      can consolidate the two copies we now have of a lot of cpu setup code
      sitting in head.S and trampoline.S.
      
      This is a significant step towards CONFIG_DEBUG_PAGEALLOC support.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      bff06d55
  4. 22 Sep, 2005 8 commits
  5. 21 Sep, 2005 25 commits