- 27 Sep, 2006 19 commits
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Russell King authored
Don't offer non-MMU based CPUs for selection when CONFIG_MMU is set. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hyok S. Choi authored
This patch adds ARM946E-S core support which has typically 8KB I&D cache. It has a MPU and supports ARMv5TE instruction set. Because the ARM946E-S core can be synthesizable with various cache size, CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hyok S. Choi authored
This patch adds ARM940T core support which has 4KB D-cache, 4KB I-cache and a MPU. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hyok S. Choi authored
This patch adds ARM9TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hyok S. Choi authored
This patch adds ARM740T core support which has a MPU and 4KB or 8KB cache. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hyok S. Choi authored
This patch adds ARM7TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hyok S. Choi authored
All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hyok S. Choi authored
By merging of uClinux/ARM, we need to treat various CPU cores which have MMU, MPU or even none for memory management. The memory management coprocessors are controlled by CP15 register set and the ARM core family can be categorized by 5 groups by the register ; G-a. CP15 is MMU : 610, 710, 720, 920, 922, 925, 926, 1020, 1020e, 1022, v6 and the derivations sa1100, sa110, xscale, xsc3. G-b. CP15 is MPU : 740, 940, 946, 996, 1156. G-c. CP15 is MPU or MMU : 1026 (selectable by schematic design) G-d. CP15 is exist, but nothing for memory managemnt : 966, 968. G-e. no-CP15 : 7tdmi, 9tdmi, 9e, 9ej This patch defines CPU_CP15, CPU_CP15_MMU and CPU_CP15_MPU. Thus the family can be defined as : - CPU_CP15 only : G-d - CPU_CP15_MMU(implies CPU_CP15) : G-a, G-c(selectable) - CPU_CP15_MPU(implies CPU_CP15) : G-b, G-c(selectable) - !CPU_CP15 : G-e Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hyok S. Choi authored
A simple patch to support module in nommu mode. The vmalloc is used instead of __vmalloc_area which depends on CONFIG_MMU. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Since do_bad_area() always takes the currently active task and (supposed to) take the currently active MM, there's no point passing them to this function. Instead, obtain references to them inside do_bad_area(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Add an empty setup_mm_for_reboot() function for nommu machines. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
mm-armv.c now only contains the pgd allocation/freeing code, so rename it to have a more sensible filename. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
If we're going to have mmu.c for code which is specific to the MMU machines, we might as well move the other MMU initialisation specific code from mm-armv.c into this new file. This also allows us to make some functions static. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Move the MMU specific code from init.c into mmu.c, and add nommu fixups to nommu.c Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
nommu does not require the page table manipulation code in the bootmem initialisation paths. Move this into separate inline functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Paul Brook authored
The ARM Versatile board PCI config space read routines are broken for byte accesses. The access uses a byte read, so masking the bottom two bits of the address is wrong. I guess this is a cut/paste error from the the halfword code which uses aligned word access+shift+mask. Signed-off-by: Paul Brook <paul@codesourcery.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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George G. Davis authored
The ARM XIP_KERNEL map created in devicemaps_init() is wrong. The map.pfn is rounded down to an even 1MiB section boundary which results in va/pa translations errors when XIP_PHYS_ADDR starts on an odd 1MiB boundary and this causes the kernel to hang. This patch fixes ARM XIP_KERNEL translation errors for the odd 1MiB XIP_PHYS_ADDR boundary case. Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ben Dooks authored
Add S3C2412 power management code, and move the core register saving in from s3c2412.c Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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David Anders authored
Add the AML M5900 series to the list of supported machines in the arch/arm/mach-s3c2410 directory. This ensures the core peripherals are registered, and the timer source is configured. if selected in the kernel config the framebuffer registers and mtd partition information are set. This version of the patch has corrected formatting and removed the legacy procfs directory entry. Signed-off-by: David Anders <danders@amltd.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 25 Sep, 2006 21 commits
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Tony Lindgren authored
Adds support for CONFIG_DEBUG_ICEDCC for ARM11. Tested on ARM1136 (OMAP2420). Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
- Document the meaning for OP_SCALAR, OP_SD and add OP_DD. - Formatting cleanups - Remove now redundant code for making compare instructions operate on scalar values. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Gen FUKATSU authored
VECITR in Floating-Point Exception register indicates the number of remaining short vector iterations after a potential exception was detected. In case of exception caused by scalar instructions, VECITR is NOT updated. Therefore emulation for VFP must ignore VECITR field and treat "veclen" as zero when recognizing scalar instructing. Signed-off-by: Gen Fukatsu <fukatsu.gen@jp.panasonic.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Dan Fandrich authored
The documentation for the ZBOOT_ROM_BSS config option describes it as "The base address of 64KiB of read/write memory in the target for the ROM-able zImage..." In actuality, it requires more than 100 KiB of space in addition to enough space to hold the decompressed kernel. This patch fixes the description in the Kconfig file. Signed-off-by: Dan Fandrich <dfandrich@intrinsyc.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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George G. Davis authored
Fix thinko in the flush_ptrace_access() "if (expr)" for the ARM VIPT non-aliasing cache case. We only need to flush cache when VM_EXEC is set in vma->vm_flags but "if (expr) always evaluates to true on UP systems for the ARM VIPT non-aliasing cache case. Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Lennert Buytenhek authored
Thomas Gleixner noticed that bitops.h should also use the raw_* irq disable/enable variants, and __xchg needs them as well. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Lennert Buytenhek authored
Add support for the IO-Data GLAN Tank, from Martin Michlmayr. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Lennert Buytenhek authored
Add support for the Thecus n2100 (80219-based.) Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Lennert Buytenhek authored
gcc 4.1's __typeof__ propagates 'const', which breaks get_unaligned(). Rewrite get_unaligned() not to use __typeof__. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ben Dooks authored
The memory mapping for the Osiris machine are all off by one bit, and the base address has been fixed for writing (bit25 is being checked by the write, but not on read) Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ben Dooks authored
New s3c2410_defconfig, updated 2.6.18 Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ben Dooks authored
Remove the redundant Modification lines from the top of the files in arch/arm/mach-s3c2410 Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ben Dooks authored
The S3C2412 LCD controller is different enough to warrant renaming the platform device. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ben Dooks authored
Add new code for the S3C2412 Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ben Dooks authored
Add new machine VSTMS Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Thomas Gleixner <tglx@linuxtronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Lennert Buytenhek authored
Remove the old per-board defconfigs. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Lennert Buytenhek authored
Add one defconfig for all iop32x boards and one defconfig for all iop33x boards. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Lennert Buytenhek authored
Since the iop32x code isn't iop321-specific, and the iop33x code isn't iop331-specfic, do a s/iop321/iop32x/ and s/iop331/iop33x/, and tidy up the code to conform to the coding style guidelines somewhat better. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Lennert Buytenhek authored
Factor out the register defines for a number of other peripherals common to the iop32x and iop33x. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Lennert Buytenhek authored
Revamp the iop3xx board support: move the support code for each iop board type into its own file, start using platform serial and platform physmap flash devices, switch to a per-board time tick rate, and get rid of the ARCH_EP80219 and STEPD config options by doing the relevant checks at run time. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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