1. 28 Jun, 2007 6 commits
  2. 25 Jun, 2007 18 commits
  3. 14 Jun, 2007 16 commits
    • David Gibson's avatar
      [POWERPC] Fix problems with device tree representation of TSI-1xx bridges · e58ca3de
      David Gibson authored
      This fixes some problems with the way the some things
      represented in the device tree for the Holly and Taiga boards.  This
      means changes both to the dts files, and to the code which
      instantiates the tsi108 ethernet platform devices based on the device
      tree.
      
      	- First, and most importantly, the ethernet PHYs are given
      with an identical 'reg' property.  This reg currently encodes the
      accessible register used to initiate mdio interaction with the PHYs,
      rather than a meaningful address on the parent bus (mdio in this
      case), which is incorrect.  Instead we give the address of these
      registers as 'reg' in the mdio node itself, and encode the ID of each
      phy in their 'reg' propertyies.
      	- Currently the platform device constructor enables a
      workaround in the tsi108 ethernet driver based on the compatible
      property of the PHY.  This is incorrect, because the workaround in
      question is necessary due to the board's wiring of the PHY, not the
      model of PHY itself.  This patch alters the constructor to instead
      enable the workaround based on a new special property in the PHY node.
      	- The compatible properties on a number of nodes in the device
      tree are insufficiently precise.  In particular the PHYs give only
      "bcm54xx", which is broken, since there are many bcm54xx PHY models,
      and they have differences which matter.  The mdio had a compatible
      property of "tsi-ethernet" identical to the ethernet MAC nodes, which
      doesn't make sense.  The ethernet, i2c, bridge and PCI nodes were
      given only as "tsi-*" which is somewhat inprecise, we replace with
      "tsi108-*" in the case of Taiga (which has a TSI108 bridge), and
      "tsi109-*", "tsi108-*" in the case of Holly (which has a TSI109
      bridge).
      	- We remove some "model" properties from the ethernets on
      Taiga board which were neither useful nor adequately precise.
      	- On Holly we change to using a dtc label instead of a full
      path to reference the MPIC node, which makes the dts a little more
      readable.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      e58ca3de
    • David Gibson's avatar
      [POWERPC] Don't store a command line in the Holly device tree · e60c526f
      David Gibson authored
      Currently, the Holly device tree includes a bootargs property in
      /chosen, which gives a commandline.  This is somewhat inconvenient,
      because it means an alternative default command line can't be given in
      the kernel config - the value obtained from the dts via the
      bootwrapper will always override CONFIG_CMDLINE.
      
      This removes the command line from the dts, and instead puts the
      same command line as a default in holly_defconfig.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      e60c526f
    • David Gibson's avatar
      [POWERPC] Consolidate cuboot initialization code · 85aecac8
      David Gibson authored
      The various cuboot platforms (i.e. pre-device tree aware u-boot for
      83xx, 85xx and Ebony) share a certain amount of code for parsing the
      boot parameters.  To a certain extent that's inevitable, since they
      platforms have different definitions of the bd_t structure.  However,
      with some macro work and a helper function, this patch improves the
      situation a bit.
      
      In the process, this fixes a bug on Ebony, which was incorrectly
      handling the parameters passed form u-boot for the command line (the
      bug was copied from 83xx and 85xx which have subsequently been fixed).
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      85aecac8
    • David Gibson's avatar
      [POWERPC] Derive ebc ranges property from EBC registers · b2ba34f3
      David Gibson authored
      In the device tree for Ebony, the 'ranges' property in the node for
      the EBC bridge shows the mappings from the chip select / address lines
      actually used for the EBC peripherals into the address space of the
      OPB.  At present, these mappings are hardcoded in ebony.dts for the
      mappings set up by the OpenBIOS firmware when it configures the EBC
      bridge.
      
      This replaces the hardcoded mappings with code in the zImage to
      read the EBC configuration registers and create an appropriate ranges
      property based on them.  This should make the zImage and kernel more
      robust to changes in firmware configuration.  In particular, some of
      the Ebony's DIP switches can change the effective address of the Flash
      and other peripherals in OPB space.  With this patch, the kernel will
      be able to cope with at least some of the possible variations.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      b2ba34f3
    • David Gibson's avatar
      [POWERPC] Factor zImage's 44x reset code out of ebony.c · 11123346
      David Gibson authored
      The ebony_exit() function which resets the Ebony board should in fact
      be common to most if not all 44x boards.  This moves the function out
      into 44x.c, renaming it, so it can be used by other 44x platforms.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      11123346
    • David Gibson's avatar
      [POWERPC] Merge CPU features pertaining to icache coherency · 4508dc21
      David Gibson authored
      Currently the powerpc kernel has a 64-bit only feature,
      COHERENT_ICACHE used for those CPUS which maintain icache/dcache
      coherency in hardware (POWER5, essentially).  It also has a feature,
      SPLIT_ID_CACHE, which is used on CPUs which have separate i and
      d-caches, which is to say everything except 601 and Freescale E200.
      
      In nearly all the places we check the SPLIT_ID_CACHE, what we actually
      care about is whether the i and d-caches are coherent (which they will
      be, trivially, if they're the same cache).
      
      This tries to clarify the situation a little.  The COHERENT_ICACHE
      feature becomes availble on 32-bit and is set for all CPUs where i and
      d-cache are effectively coherent, whether this is due to special logic
      (POWER5) or because they're unified.  We check this, instead of
      SPLIT_ID_CACHE nearly everywhere.
      
      The SPLIT_ID_CACHE feature itself is replaced by a UNIFIED_ID_CACHE
      feature with reversed sense, set only on 601 and Freescale E200.  In
      the two places (one Freescale BookE specific) where we really care
      whether it's a unified cache, not whether they're coherent, we check
      this feature.  The CPUs with unified cache are so few, we could
      consider replacing this feature bit with explicit checks against the
      PVR.
      
      This will make unifying the 32-bit and 64-bit cache flush code a
      little more straightforward.
      Signed-off-by: default avatarDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      4508dc21
    • David Gibson's avatar
      [POWERPC] Kill typedef-ed structs for hash PTEs and BATs · 8e561e7e
      David Gibson authored
      Using typedefs to rename structure types if frowned on by CodingStyle.
      However, we do so for the hash PTE structure on both ppc32 (where it's
      called "PTE") and ppc64 (where it's called "hpte_t").  On ppc32 we
      also have such a typedef for the BATs ("BAT").
      
      This removes this unhelpful use of typedefs, in the process
      bringing ppc32 and ppc64 closer together, by using the name "struct
      hash_pte" in both cases.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      8e561e7e
    • David Gibson's avatar
      [POWERPC] Start factoring pgtable-ppc32.h and pgtable-ppc64.h · 9c709f3b
      David Gibson authored
      This factors some things defined in both pgtable-ppc32.h and
      pgtable-ppc64.h into the common part of asm-powerpc/pgtable.h.  These
      are all things which have essentially identical definitions, and which
      by their nature are very unlikely ever to need different definitions
      in the two cases.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      9c709f3b
    • David Gibson's avatar
      [POWERPC] Remove a couple of unused definitions from pgtable_32.c · c0770f68
      David Gibson authored
      In arch/powerpc/mm/pgtable_32.c, the variable io_bat_index and the
      macro is_power_of_4() no longer have any users.  This removes them.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      c0770f68
    • David Gibson's avatar
      [POWERPC] Remove the dregs of APUS support from arch/powerpc · f21f49ea
      David Gibson authored
      APUS (the Amiga Power-Up System) is not supported under arch/powerpc
      and it's unlikely it ever will be.  Therefore, this patch removes the
      fragments of APUS support code from arch/powerpc which have been
      copied from arch/ppc.
      
      A few APUS references are left in asm-powerpc in .h files which are
      still used from arch/ppc.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      f21f49ea
    • David Gibson's avatar
      [POWERPC] Abolish iopa(), mm_ptov(), io_block_mapping() from arch/powerpc · 90ac19a8
      David Gibson authored
      These old-fashioned IO mapping functions no longer have any callers in
      code which remains relevant on arch/powerpc.  Therefore, this removes
      them from arch/powerpc.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      90ac19a8
    • David Gibson's avatar
      [POWERPC] Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU · 4db68bfe
      David Gibson authored
      arch/powerpc still relies on asm-ppc/mmu.h for most 32-bit MMU types.
      This is another step towards fixing this.  It takes the portions
      of asm-ppc/mmu.h related to the "classic" 32-bit hash page table MMU
      which are still relevant in arch/powerpc and puts them in a new
      asm-powerpc/mmu-hash32.h, included when appropriate from
      asm-powerpc/mmu.h.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      4db68bfe
    • David Gibson's avatar
      [POWERPC] Split low-level OF-related bootloader code into separate files · 2e601613
      David Gibson authored
      Currently, all OF-related code in the bootloader is contained in of.c.
      of.c also provides the platform specific things necessary to boot on
      an OF platform.
      
      However, there are platforms (such as PReP) which can include an OF
      implementation, but are not bootable as pure OF systems.  For use by
      such platforms, this patch splits out the low-level parts of the OF
      code (call_prom() and various wrappers thereof) into a new oflib.c
      file.  In addition, the code related to bootwrapper console output via
      OF are moved to a new ofconsole.c file.  Both these files are included
      in the wrapper.a library where they can be used by both full-OF and
      partial OF platforms.
      Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      2e601613
    • Arnd Bergmann's avatar
      [POWERPC] Split out CPU specific options into a new Kconfig file · a0ae9c7c
      Arnd Bergmann authored
      A lot of the options in arch/powerpc/Kconfig deal with the CPU menu,
      and my next patches add more to them.  Moving them to a new
      arch/powerpc/platforms/Kconfig.cputype file makes it easier to
      follow.
      
      There are no functional changes in here.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      a0ae9c7c
    • will schmidt's avatar
      [POWERPC] During VM oom condition, kill all threads in process group · effe24bd
      will schmidt authored
      We have had complaints where a threaded application is left in a bad state
      after one of it's threads is killed when we hit a VM: out_of_memory
      condition.
      
      Killing just one of the process threads can leave the application in a
      bad state, whereas killing the entire process group would allow for
      the application to restart, or be otherwise handled, and makes it very
      obvious that something has gone wrong.
      
      This change allows the entire process group to be taken down, rather than
      just the one thread.
      
      lightly tested on powerpc
      Signed-off-by: default avatarWill <will_schmidt@vnet.ibm.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      effe24bd
    • Jake Moilanen's avatar
      [POWERPC] Donate idle CPU cycles on dedicated partitions · d8c391a5
      Jake Moilanen authored
      A Power6 can give up CPU cycles on a dedicated CPU (as opposed to a
      shared CPU) to other shared processors if the administrator asks for it
      (via the HMC).
      
      This enables that to work properly on P6.
      
      This just involves setting a bit in the CAS structure as well as the
      VPA.  To donate cycles, a CPU has to have all SMT threads idle and
      have the donate bit set in the VPA.  Then call H_CEDE.
      
      The reason why shared processors just aren't used is because dedicated
      CPUs are guaranteed an actual processor, yet the system is still able to
      increase the capacity of the shared CPU pool.
      
      Also rename the VPA's cpuctls_task_attrs field to a more accurate name.
      Signed-off-by: default avatarJake Moilanen <moilanen@austin.ibm.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      d8c391a5