- 26 Sep, 2006 40 commits
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Diego Calleja authored
Bugzilla #6552 says: "In arch/i386/boot/setup.S, movw is used instead of movb for PS/2 mouse information, although it is unsigned char. This does not harm, because the jmp instruction overwritten by movw is used before executing movw, and never be used again" I've no idea if this is a real bug or how it gets fixed, so I'm submitting it for review instead of letting it die of boredom in bugzilla. Aditionally to i386, I've changed x86-64, which mirrors the same code. Credits to Yoshinori K. Okuji, who found the problem and suggested a fix. Signed-off-by:
Diego Calleja <diegocg@gmail.com> Signed-off-by:
Andi Kleen <ak@suse.de>
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Andi Kleen authored
The IO APIC code had lots of duplicated code to read/write 64bit routing entries into the IO-APIC. Factor this out int common read/write functions In a few cases the IO APIC lock is taken more often now, but this isn't a problem because it's all initialization/shutdown only slow path code. Similar to earlier x86-64 patch. Includes a fix by Jiri Slaby for a mistake that broke resume Signed-off-by: -
Andi Kleen authored
The IO APIC code had lots of duplicated code to read/write 64bit routing entries into the IO-APIC. Factor this out int common read/write functions In a few cases the IO APIC lock is taken more often now, but this isn't a problem because it's all initialization/shutdown only slow path code. Signed-off-by: -
Andi Kleen authored
It apparently has never triggered in many years. Signed-off-by: -
Andi Kleen authored
PIC mode is an outdated way to drive the APICs that was used on some early MP boards. It is not supported in the ACPI model. It is unlikely to be ever configured by any x86-64 system Remove it thus. Signed-off-by: -
Andi Kleen authored
No 64bit EISA or Microchannel systems ever. Remove the left over code in the IO-APIC driver and the mptable parser Signed-off-by: -
Andi Kleen authored
This was an old workaround for broken MP-BIOS. The user could specify overwrites on the command line. I've never seen it being used for anything on 64bit. So get rid of it for now. Signed-off-by: -
Andi Kleen authored
And remove some old obsolete ones. Signed-off-by: -
Andi Kleen authored
(based on x86-64 changes) - Add a proper memory clobber to invlpg - Remove an unused extern Signed-off-by: -
Andi Kleen authored
- Convert CR* accesses to dedicated inline functions and rewrite the rest as C inlines - Don't do a double flush for global flushes (pointed out by Zach Amsden) This was a bug workaround for old CPUs that don't do 64bit and is obsolete. - Add a proper memory clobber to invlpg - Remove an unused extern Signed-off-by: -
Andi Kleen authored
The new systems already use focus disabled and the comment was completely outdated. Signed-off-by: -
Andi Kleen authored
Nobody has been setting the mismatch counter and the ifdef was never set so remove it. Signed-off-by: -
Andi Kleen authored
IO-APIC or local APIC can only be disabled at runtime anyways and Kconfig has forced these options on for a long time now. The Kconfigs are kept only now for the benefit of the shared acpi boot.c code. Signed-off-by: -
Andi Kleen authored
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Andi Kleen authored
And move the comment to a proper place. Signed-off-by: -
Andi Kleen authored
- Move them to a pure assembly file. Previously they were in a C file that only consisted of inline assembly. Doing it in pure assembler is much nicer. - Add a frame.i include with FRAME/ENDFRAME macros to easily add frame pointers to assembly functions - Add dwarf2 annotation to them so that the new dwarf2 unwinder doesn't get stuck on them - Random cleanups Includes feedback from Jan Beulich and a UML build fix from Andrew Morton. Cc: jbeulich@novell.com Cc: jdike@addtoit.com Signed-off-by: -
Andi Kleen authored
LOCK_PREFIX is replaced by nops on UP systems, so it has to be a special macro. Previously this was only possible from C. Allow it for pure assembly files too. Similar to earlier x86-64 patch. Signed-off-by: -
Andi Kleen authored
Previously it didn't align. Use the same one as the C compiler in blended mode, which is good for K8 and Core2 and doesn't hurt on P4. Signed-off-by: -
Andi Kleen authored
rwlocks are now out of line, so it near never triggers. Also it was incompatible with the new dwarf2 unwinder because it had unannotiatable push/pops. Signed-off-by: -
Andi Kleen authored
- Move the slow path fallbacks to their own assembly files This makes them much easier to read and is needed for the next change. - Add CFI annotations for unwinding (XXX need review) - Remove constant case which can never happen with out of line spinlocks - Use patchable LOCK prefixes - Don't use lock sections anymore for inline code because they can't be expressed by the unwinder (this adds one taken jump to the lock fast path) Cc: jbeulich@novell.com Signed-off-by: -
Andi Kleen authored
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Andi Kleen authored
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Andi Kleen authored
Use knowledge about EFLAGS layout (bits 22:63 are always 0) to distingush EFLAGS word and kernel address in the spin lock stack frame. Signed-off-by: -
Andi Kleen authored
This ports the algorithm from x86-64 (with improvements) to i386. Previously this only worked for frame pointer enabled kernels. But spinlocks have a very simple stack frame that can be manually analyzed. Do this. Signed-off-by: -
Andi Kleen authored
Based on patch from Frank van Maarseveen <frankvm@frankvm.com>, but extended. Signed-off-by: -
Adam Henley authored
A few trivial spelling and grammar mistakes picked up in "arch/x86_64/aperture.c", "arch/x86_64/crash.c" and "arch/x86_64/apic.c". I think all are correct fixes but am ever aware of my fallibility :o) This is my first patch submission so all feedback is appreciated, esp. WRT CCing to Linus, Andi and trivial@kernel.org, is this correct? And which is the most appropriate kernel version to diff against? If any. Should apply cleanly to 2.6.18-rc1 Signed-off-by:
Adam Henley <adamazing@gmail.com> Signed-off-by:
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Andi Kleen authored
virtual addresses don't belong into kernel logs for non debugging Cc: clemens@ladisch.de Signed-off-by: -
Stephane Eranian authored
Hello, Following my discussion with Andi. Here is a patch that introduces two new TIF flags to simplify the context switch code in __switch_to(). The idea is to minimize the number of cache lines accessed in the common case, i.e., when neither the debug registers nor the I/O bitmap are used. This patch covers the x86-64 modifications. A patch for i386 follows. Changelog: - add TIF_DEBUG to track when debug registers are active - add TIF_IO_BITMAP to track when I/O bitmap is used - modify __switch_to() to use the new TIF flags <signed-off-by>: eranian@hpl.hp.com Signed-off-by: -
Andi Kleen authored
No need to include it from entry.S Drop all the #ifdef __ASSEMBLY__ Signed-off-by: -
Andi Kleen authored
For NUMA optimization and some other algorithms it is useful to have a fast to get the current CPU and node numbers in user space. x86-64 added a fast way to do this in a vsyscall. This adds a generic syscall for other architectures to make it a generic portable facility. I expect some of them will also implement it as a faster vsyscall. The cache is an optimization for the x86-64 vsyscall optimization. Since what the syscall returns is an approximation anyways and user space often wants very fast results it can be cached for some time. The norma methods to get this information in user space are relatively slow The vsyscall is in a better position to manage the cache because it has direct access to a fast time stamp (jiffies). For the generic syscall optimization it doesn't help much, but enforce a valid argument to keep programs portable I only added an i386 syscall entry for now. Other architectures can follow as needed. AK: Also added some cleanups from Andrew Morton Signed-off-by: -
Vojtech Pavlik authored
This patch adds a vgetcpu vsyscall, which depending on the CPU RDTSCP capability uses either the RDTSCP or CPUID to obtain a CPU and node numbers and pass them to the program. AK: Lots of changes over Vojtech's original code: Better prototype for vgetcpu() It's better to pass the cpu / node numbers as separate arguments to avoid mistakes when going from SMP to NUMA. Also add a fast time stamp based cache using a user supplied argument to speed things more up. Use fast method from Chuck Ebbert to retrieve node/cpu from GDT limit instead of CPUID Made sure RDTSCP init is always executed after node is known. Drop printk Signed-off-by:
Vojtech Pavlik <vojtech@suse.cz> Signed-off-by:
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Vojtech Pavlik authored
This patch adds initalization of the RDTSCP auxilliary values to CPU numbers to time.c. If RDTSCP is available, the MSRs are written with the respective values. It can be later used to initalize per-cpu timekeeping variables. AK: Some cleanups. Move externs into headers and fix CPU hotplug. Signed-off-by:
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Vojtech Pavlik authored
This patch adds macros for reading tsc via the RDTSCP instruction, as well as writing the auxilliary MSR read by RDTSCP to msr.h [AK: changed rdtscp definition for old binutils] Signed-off-by:
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Venkatesh Pallipadi authored
AK: This redoes the changes I temporarily reverted. Intel now has support for Architectural Performance Monitoring Counters ( Refer to IA-32 Intel Architecture Software Developer's Manual http://www.intel.com/design/pentium4/manuals/253669.htm ). This feature is present starting from Intel Core Duo and Intel Core Solo processors. What this means is, the performance monitoring counters and some performance monitoring events are now defined in an architectural way (using cpuid). And there will be no need to check for family/model etc for these architectural events. Below is the patch to use this performance counters in nmi watchdog driver. Patch handles both i386 and x86-64 kernels. Signed-off-by:
Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by:
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Andi Kleen authored
I've had good experiences with having this on by default on x86-64. It turns nasty hangs into easier to debug oopses. Enable the local APIC wdog by default for systems newer than 2004. This comes from a strange compromise: according to arjan the reason it was off by default was some old IBM systems that corrupted registered when NMI happened in SMI. Can't remember more specific, but >= 2004 should avoid these. It's probably overly broad because most older systems should be ok (and the really old systems won't be supported by the local apic watchdog anyways) Signed-off-by: -
Vivek Goyal authored
After a crash we should wait for NMI IPI event and not for external NMI or NMI watchdog tick. Signed-off-by:
Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by:
Andrew Morton <akpm@osdl.org>
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Vivek Goyal authored
After a crash we should wait for NMI IPI event and not for external NMI or NMI watchdog tick. Signed-off-by:
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Adrian Bunk authored
This patch makes the following needlessly global functions static: - nmi_int.c: profile_exceptions_notify() - nmi_timer_int.c: profile_timer_exceptions_notify() Signed-off-by:
Adrian Bunk <bunk@stusta.de> Signed-off-by:
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Andi Kleen authored
When a unknown NMI happened the panic would claim a NMI watchdog timeout. Also it would check the variable set by nmi_watchdog=panic and panic then. Fix up the panic message to be generic Unconditionally panic on unknown NMI when panic on unknown nmi is enabled. Noticed by Jan Beulich Cc: jbeulich@novell.com Signed-off-by: -
Shaohua Li authored
Making NMI suspend/resume work with SMP. We use CPU hotplug to offline APs in SMP suspend/resume. Only BSP executes sysdev's .suspend/.resume method. APs should follow CPU hotplug code path. And: +From: Don Zickus <dzickus@redhat.com> Makes the start/stop paths of nmi watchdog more robust to handle the suspend/resume cases more gracefully. AK: I merged the two patches together Signed-off-by:
Shaohua Li <shaohua.li@intel.com> Signed-off-by:
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