- 26 Apr, 2007 40 commits
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David S. Miller authored
__get_phys is only called from init.c as is prom_virt_to_phys(), __get_iospace() is not called at all, and sun4u_get_pte() is largely misnamed. Privatize the implementation and helper functions of sun4u_get_phys() to mm/init.c, and rename to kvaddr_to_paddr(). The only used of this thing is flush_icache_range(), and thus things can be considerably further simplified. For example, we should only see module or PAGE_OFFSET kernel addresses here, so we don't need the OBP firmware range handling at all. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
We already get those from asm/sections.h Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Kick out empty entries as soon as we spot them, and use memmove() instead of a silly loop to make the operation more clear. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Decrease the SECTION_SIZE_BITS --> MAX_PHYSADDR_BITS range a little bit. The cost of going to SPARSEMEM_STATIC becomes 8K of BSS space, and in return we save a pointer dereferences on every page struct lookup. Even better we hit the main kernel image for the base address which is in a hugepage locked TLB entry. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
This helps deal with the invisible bridge that sits between the host controller and the top-most visisble PCI devices on hypervisor systems. For example, on T1000 the bus-range property says 2 --> 4 and so there is a PCI express bridge at bus 2, devfn 0, etc. So if we don't force the dummy host controller to bus zero, we'll try to create two devices with the same domain/bus/devfn triplet. Also, add some more log diagnostics to make debugging stuff like this easyer. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
We fake up a dummy one in all cases because that is the simplest thing to do and it happens to be necessary for hypervisor systems. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Based upon a similar patch for x86_64 written by Stephen Hemminger. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Set but never used. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
We don't do the "Simba APB is a PBM" bogosity for Sabre controllers any longer, so this pbms_same_domain thing is no longer necessary. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Implemented but never actually used. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
All the implementations can be identical and generic, so no need for controller specific methods. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
It is only used in one spot and we can just fetch the OF property right there. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Set but never used. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
It can be done for every PCI configuration using OF properties. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
The SIMBA APB bridge is strange, it is a PCI bridge but it lacks some standard OF properties, in particular it lacks a 'ranges' property. What you have to do is read the IO and MEM range registers in the APB bridge to determine the ranges handled by each bridge. So fill in the bus resources by doing that. Since we now handle this quirk in the generic PCI and OF device probing layers, we can flat out eliminate all of that code from the sabre pci controller driver. In fact we can thus eliminate completely another quirk of the sabre driver. It tried to make the two APB bridges look like PBMs but that makes zero sense now (and it's questionable whether it ever made sense). So now just use pbm_A and probe the whole PCI hierarchy using that as the root. This simplification allows many future cleanups to occur. Also, I've found yet another quirk that needs to be worked around while testing this. You can't use the 'class-code' OF firmware property, especially for IDE controllers. We have to read the value out of PCI config space or else we'll see the value the device was showing before it was programmed into native mode. I'm starting to think it might be wise to just read all of the values out of PCI config space instead of using the OF properties. :-/ Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Need to traverse recursively down child busses else we only get the file created under devices at the top-level. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
The only user was bus_dvma_to_mem() which is no longer used by any driver, so kill that, and the export of pci_memspace_mask. The only user now is the PCI mmap support code. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Almost entirely taken from the 64-bit PowerPC PCI code. This allowed to eliminate a ton of cruft from the sparc64 PCI layer. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Also, do not try to compute resources by hand, instead use the pre-computed ones in the of_device. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Also, we don't need to store or use the PBM so kill that from the linux_ebus. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Also __sparc__ --> CONFIG_SPARC Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
And use CONFIG_SPARC instead of CONFIG_SPARC64 as the test. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Just like powerpc does. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
This allows us to simplify sharing code with powerpc which has properties that have various forms of capitalization when on the sparc64 side the property is all lower-case. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
We have several platforms using local copies of identical code. Signed-off-by: David S. Miller <davem@davemloft.net>
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Stephen Rothwell authored
This starts bringing the PowerPC and Sparc implemetations back closer together. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stephen Rothwell authored
Finally, we actually change the functions themselves. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stephen Rothwell authored
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stephen Rothwell authored
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stephen Rothwell authored
The only unfortunate bit here is that the name field of struct map_info is not const, so for now we put a cast on the assignment of it. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
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