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  1. 24 May, 2007 4 commits
  3. 22 May, 2007 6 commits
  5. 16 May, 2007 14 commits
  7. 15 May, 2007 16 commits
    • Jan Engelhardt's avatar
      Use menuconfig objects: IDE · e0ff9cd1
      Jan Engelhardt authored 
      Use menuconfigs instead of menus, so the whole menu can be disabled at once
instead of going through all options.
Signed-off-by: default avatarJan Engelhardt <jengelh@gmx.de>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      e0ff9cd1
    • Alan Cox's avatar
      sl82c105: Switch to ref counting API · 640b31bf
      Alan Cox authored 
      Not sure how this one got missed in the great purge some time ago but it did.
Signed-off-by: default avatarAlan Cox <alan@redhat.com>
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      640b31bf
    • Bartlomiej Zolnierkiewicz's avatar
      ide: remove ide_use_dma() · 122ab088
      Bartlomiej Zolnierkiewicz authored 
      ide_use_dma() duplicates a lot of ide_max_dma_mode() functionality
and as all users of ide_use_dma() were converted to use ide_tune_dma()
now it is possible to add missing checks to ide_tune_dma() and remove
ide_use_dma() completely, so do it.

There should be no functionality changes caused by this patch.
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      122ab088
    • Bartlomiej Zolnierkiewicz's avatar
      ide: add missing validity checks for identify words 62 and 63 · 3649c06e
      Bartlomiej Zolnierkiewicz authored 
      Check validity of identify words 62 and 63 before using them in
ide_get_mode_mask().
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      3649c06e
    • Bartlomiej Zolnierkiewicz's avatar
      ide: remove ide_dma_enable() · 4728d546
      Bartlomiej Zolnierkiewicz authored 
      * check ->speedproc return value in ide_tune_dma()
* use ide_tune_dma() in cmd64x/cs5530/sc1200/siimage/sl82c105/scc_pata drivers
* remove no longer needed ide_dma_enable()
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      4728d546
    • Sergei Shtylyov's avatar
      sl82c105: add speedproc() method and MWDMA0/1 support · 46cedc9b
      Sergei Shtylyov authored 
      Add the speedproc() method for setting transfer modes, modify config_for_dma()
to call it and use ide_max_dma_mode() to select the best DMA mode.
Add support for the multiword DMA modes 0 and 1, using the upper half of the
'drive_data' field to store the DMA timings to program into the drive control
register when DMA is turned on for real.
Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      46cedc9b
    • Bartlomiej Zolnierkiewicz's avatar
      cs5530/sc1200: add ->speedproc support · 3c3f5d2c
      Bartlomiej Zolnierkiewicz authored 
      * add {cs5530,sc1200}_tunepio() for programming PIO timings

* add {cs5530,sc1200}_tune_chipset() (->speedproc method) for setting
  transfer mode and convert {cs5530,sc1200}_config_dma() to use it

* bump driver version
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      3c3f5d2c
    • Bartlomiej Zolnierkiewicz's avatar
      cs5530/sc1200: DMA support cleanup · a01ba401
      Bartlomiej Zolnierkiewicz authored 
      sc1200.c:

* remove open-coded variant of ide_dma_host_off() (== ->dma_host_off),
  it is not needed because ->dma_off_quietly calls ->dma_host_off

* use ->dma_host_on (== ide_dma_host_on() for this driver) instead of
  open-coded variant, call it from the users of sc1200_config_dma2()

  [ there is no need to call ->dma_host_on in sc1200_config_dma() because
    core code takes care of calling ->ide_dma_on on successful execution
    of ->ide_dma_check ]

* add comment about ->tuneproc interface abuse

cs5530.c/sc1200.c:

* core code takes care of calling ->dma_off_quietly before calling
  ->ide_dma_check so there is no need to call it in ->ide_dma_check methods

* bump driver version
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      a01ba401
    • Bartlomiej Zolnierkiewicz's avatar
      ide: use ide_tune_dma() part #2 · bd203b57
      Bartlomiej Zolnierkiewicz authored 
      Use ide_tune_dma() in ide-cris/it821x/pdc202xx_old/serverworks drivers.
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      bd203b57
    • Bartlomiej Zolnierkiewicz's avatar
      cs5530/sc1200: add ->udma_filter methods · 5fd216bb
      Bartlomiej Zolnierkiewicz authored 
      CS5530/SC1200 specifies that two drives on the same cable cannot mix
UDMA/MDMA.  Add {cs5530,sc1200}_udma_filter() to handle this.  This also
makes it possible to remove open-coded best DMA mode selection and use
standard ide_use_dma()/ide_max_dma_mode() helpers.  While at it bump
version numbers.

There should be no functionality changes caused by this patch.
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      5fd216bb
    • Bartlomiej Zolnierkiewicz's avatar
      ide: always disable DMA before tuning it · 793a9722
      Bartlomiej Zolnierkiewicz authored 
      ide_start_power_step() and set_using_dma() were missing ->dma_off_quietly
call (comment in probe_hwif() states that DMA should be always cleared before
tuning is attempted).  Fix it.
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      793a9722
    • Bartlomiej Zolnierkiewicz's avatar
      pdc202xx_new: use ide_tune_dma() · 7f86723a
      Bartlomiej Zolnierkiewicz authored 
      * remove code enabling IORDY and prefetch from config_chipset_for_dma(),
  as the comment states it has no real effect because these settings are
  overriden when the PIO mode is set (and for this driver ->autotune == 1
  so PIO mode is always programmed)

* use ide_tune_dma() in pdcnew_config_drive_xfer_rate() and remove no longer
  needed config_chipset_for_dma()

There should be no functionality changes caused by this patch.
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      7f86723a
    • Bartlomiej Zolnierkiewicz's avatar
      alim15x3: use ide_tune_dma() · 38ff8a74
      Bartlomiej Zolnierkiewicz authored 
      Use ide_tune_dma() in ali15x3_config_drive_for_dma() and remove all the open
coded DMA tuning code and also config_chipset_for_dma().  Set ->atapi_dma flag
correctly in init_hwif_common_ali15x3() so ide_tune_dma() can take care of
checking if ATAPI DMA is allowed and remove open coded ATAPI DMA check from
ali15x3_config_drive_for_dma().

There should be no functionality changes caused by this patch.
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      38ff8a74
    • Bartlomiej Zolnierkiewicz's avatar
      sis5513: PIO mode setup fixes · 6b8cf772
      Bartlomiej Zolnierkiewicz authored 
      * limit max PIO mode to PIO4, this driver doesn't support PIO5 and attempt
  to program PIO5 by config_art_rwp_pio() could result in incorrect PIO
  timings being programmed and possibly the data corruption (for < ATA100
  family chipsets PIO0 timings were used, for ATA100 and ATA100a - the random
  content of test1 variable was used, for ATA133 - MWDMA0 timings were used)

* BUG() in sis5513_tune_chipset() if somebody tries to force unsupported PIO5,
  also cleanup this function a bit while at it

* add comment about PIO0 timings for < ATA100 family chipsets

* remove open-coded best PIO mode selection from config_art_rwp_pio(),
  it contained numerous bugs:

  - it didn't check for validity of id->eide_pio_modes and id->eide_pio_iordy
    before using them

  - it tried to found out maximum PIO mode basing on minimum IORDY cycle time
    (moreover wrong cycle times were used for PIO1/5)

  - it was overriding PIO blacklist and conservative PIO "downgrade" done
    by ide_get_best_pio_mode()

* use sis5513_tune_drive() instead of config_art_rwp_pio()
  in sis5513_config_xfer_rate() so the correct PIO mode is also set
  on drive even if the device is not IORDY/DMA capable

* config_art_rwp_pio() was always setting the best possible mode and not
  the wanted one - fix it and move ide_get_best_pio_mode() call to
  config_chipset_for_pio()

* don't use ide_find_best_mode() in config_chipset_for_pio(), it was being
  overriden by config_art_rwp_pio() for the host timings anyway + we need to
  set the same PIO mode on the device and the host

* pass correct "pio" argument (255 instead of 5) to sis5513_tune_drive() call
  in sis5513_config_xfer_rate() so the best PIO mode is set on the drive
  and not PIO4

* rename sis5513_tune_drive() to sis5513_tuneproc()
  and config_chipset_for_pio() to sis5513_tune_driver()

* bump driver version
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      6b8cf772
    • Bartlomiej Zolnierkiewicz's avatar
      serverworks: PIO mode setup fixes · 9445de76
      Bartlomiej Zolnierkiewicz authored 
      * limit max PIO mode to PIO4, this driver doesn't support PIO5 and attempt
  to program PIO5 by svwks_tune_chipset() could result in incorrect PIO
  timings being programmed and possibly the data corruption (it seems that
  the minimum possible values were used but I lack the datasheets to be sure)

* select best PIO mode in svwks_tune_drive() and not in svwks_tune_chipset()
  when doing PIO autotuning (pio == 255)

* don't try to tune PIO in config_chipset_for_dma() as ide_dma_enable() could
  return 1 if DMA was previously enabled (svwks_config_drive_xfer_rate()
  takes care of PIO tuning if no suitable DMA mode is found)

* remove config_chipset_for_pio() and use svwks_tune_drive() instead,
  config_chipset_for_pio() contained numerous bugs when selecting PIO mode
  (luckily it was only used for devices limited to PIO by capabilities/BIOS):

  - it didn't check for validity of id->eide_pio_modes and id->eide_pio_iordy
    before using them

  - it tried to found out maximum PIO mode basing on minimum IORDY cycle time
    (moreover wrong cycle times were used for PIO0/1/5)

  - it was overriding PIO blacklist and conservative PIO "downgrade" done
    by ide_get_best_pio_mode()

  - if the max drive PIO was PIO5 then XFER_PIO_0/XFER_PIO_SLOW was selected
    (XFER_PIO_SLOW is not supported by svwks_tune_chipset() so the result
     was the same as if using XFER_PIO_5 => wrong PIO timings were set)

  - it was overriding drive->current_speed

* bump driver version
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      9445de76
    • Bartlomiej Zolnierkiewicz's avatar
      pdc202xx_old: rewrite mode programming code (v2) · 4fce3164
      Bartlomiej Zolnierkiewicz authored 
      This patch is based on the documentation (I would like to thank Promise
for it) and also partially on the older vendor driver.

Rewrite mode programming code:

* disable 66MHz clock in pdc202xx_tune_chipset() so it is correctly disabled
  even if both devices on the channel are not DMA capable and after reset

* enable/disable IORDY and PREFETCH bits in pdc202xx_tune_chipset()
  as they need to be setup correctly also for PIO only devices, plus IORDY
  wasn't disabled for non-IORDY devices and PREFETCH wasn't disabled for
  ATAPI devices

* remove dead code for setting SYNC_ERDDY_EN bits from config_chipset_for_dma()
  (driver sets ->autotune to 1 so PIO modes are always programmed => lower
   nibble of register A never equals 4 => "chipset_is_set" is always true)

* enable PIO mode programming for all ATAPI devices
  (it was limited to ->media == ide_cdrom devices)

* remove extra reads of registers A/B/C, don't read register D et all

* do clearing / programming of registers A/B/C in one go
  (gets rid of extra PCI config space read/write cycle)

* set initial values of drive_conf/AP/BP/CP variables to zero
  (paranoia for the case when PCI reads fail)

* remove XFER_UDMA6 to XFER_UDMA5 remapping case - it can't happen
  (ide_rate_filter() takes care of it)

* fix XFER_MW_DMA0 timings (they were overclocked, use the official ones)

* fix bitmasks for clearing bits of register B:

  - when programming DMA mode bit 0x10 of register B was cleared which
    resulted in overclocked PIO timing setting (iff PIO0 was used)

  - when programming PIO mode bits 0x18 weren't cleared so suboptimal
    timings were used for PIO1-4 if PIO0 was previously set (bit 0x10)
    and for PIO0/3/4 if PIO1/2 was previously set (bit 0x08)

* add FIXME comment about missing locking for 66MHz clock register

Also while at it:

* remove unused defines

* do a few cosmetic / CodingStyle fixes

* bump driver version

v2:
* in pdc202xx_tune_chipset() the old content of drive configuration
  registers is used only by the debugging code so cover "drive_conf"
  PCI registers read by #if PDC202XX_DEBUG_DRIVE_INFO
  (Noticed by Sergei Shtylyov)
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      4fce3164