1. 03 Jul, 2006 4 commits
    • Eric Hustvedt's avatar
      intelfb: add vsync interrupt support · 37bced38
      Eric Hustvedt authored
      [04/05] intelfb: implement FBIO_WAITFORVSYNC ioctl
      
      The (unofficial) FBIO_WAITFORVSYNC ioctl is implemented by sleeping on the appropriate waitqueue, as defined in my earlier patch. Currently, only display 0 (aka pipe A) is supported.
      Signed-off-by: default avatarEric Hustvedt <ehustvedt@cecropia.com>
      37bced38
    • Eric Hustvedt's avatar
      intelfb: add vsync interrupt support · 7649757b
      Eric Hustvedt authored
      [03/05] intelfb: Implement basic interrupt handling
      
      Functions have been added to enable and disable interrupts using the MMIO registers. Currently only pipe A vsync interrupts are enabled.
      A generalized vsync accounting struct is defined, with the intent that it can encapsulate per-pipe vsync related info in the future. Currently a single instance is hard-coded.
      The interrupt service routine currently only looks for vsync interrupts on pipe A, and increments a counter and wakes up anyone waiting on it.
      
      This implementation is heavily influenced by similar implementations in the atyfb and matroxfb drivers.
      Signed-off-by: default avatarEric Hustvedt <ehustvedt@cecropia.com>
      7649757b
    • Eric Hustvedt's avatar
      intelfb: add vsync interrupt support · 9a5f019b
      Eric Hustvedt authored
      [02/05] intelfb: Add interrupt related register definitions
      
      Add constants for accessing HWSTAM, IER, IIR, and IMR registers.
      Add constants for interrupt types supported by the 8xx and 9xx chipsets.
      The registers are also stored in the hwstate struct and dumped in the debug routine.
      Signed-off-by: default avatarEric Hustvedt <ehustvedt@cecropia.com>
      9a5f019b
    • Eric Hustvedt's avatar
      intelfb: add vsync interrupt support · 3ce6fb43
      Eric Hustvedt authored
      [01/05] intelfb: Add 16-bit register access macros
      
      This patch adds macros to read and write two-byte MMIO registers. The interrupt-related registers are all word-sized, rather than long-sized.
      Signed-off-by: default avatarEric Hustvedt <ehustvedt@cecropia.com>
      3ce6fb43
  2. 24 Jun, 2006 2 commits
  3. 23 Jun, 2006 34 commits