- 05 Sep, 2005 40 commits
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Venkatesh Pallipadi authored
Signed-off-by:
Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Venkatesh Pallipadi authored
i386 generic subarchitecture requires explicit dmi strings or command line to enable bigsmp mode. The patch below removes that restriction, and uses bigsmp as soon as it finds more than 8 logical CPUs, Intel processors and xAPIC support. Signed-off-by:
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Vivek Goyal authored
o With introduction of kexec as boot-loader, the assumption that parameter segment will always be loaded at lower address than kernel and will be addressable by early bootup page tables is no longer valid. In kexec on panic case parameter segment might well be loaded beyond kernel image and might not be addressable by early boot page tables. o This case might hit in the scenario where user has reserved a chunk of memory for second kernel, for example 16MB to 64MB, and has also built second kernel for physical memory location 16MB. In this case kexec has no choice but to load the parameter segment at a higher address than new kernel image at safe location where new kernel does not stomp it. o Though problem should automatically go away once relocatable kernel for i386 is in place and kexec can determine the location of new kernel at run time and load parameter segment at lower address than kernel image. But till then this patch can go in (assuming it does not break something else). o This patch moves up the boot parameter saving code. Now boot parameters are copied out in protected mode before page tables are initialized. This will ensure that parameter segment is always addressable irrespective of its physical location. Signed-off-by:
Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by:
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Petr Tesarik authored
If the virtual 86 machine reaches an instruction which raises a General Protection Fault (such as CLI or STI), the instruction is emulated (in handle_vm86_fault). However, the emulation ignored the TF bit, so the hardware debug interrupt was not invoked after such an emulated instruction (and the DOS debugger missed it). This patch fixes the problem by emulating the hardware debug interrupt as the last action before control is returned to the VM86 program. Signed-off-by:
Petr Tesarik <kernel@tesarici.cz> Signed-off-by:
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Matt Tolentino authored
The memory descriptors that comprise the EFI memory map are not fixed in stone such that the size could change in the future. This uses the memory descriptor size obtained from EFI to iterate over the memory map entries during boot. This enables the removal of an x86 specific pad (and ifdef) in the EFI header. I also couldn't stomach the broken up nature of the function to put EFI runtime calls into virtual mode any longer so I fixed that up a bit as well. For reference, this patch only impacts x86. Signed-off-by:
Matt Tolentino <matthew.e.tolentino@intel.com> Signed-off-by:
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Venkatesh Pallipadi authored
Only use read_timer_tsc only when CPU has TSC. Thanks to Andrea for pointing this out. Should not be issue on any platforms as all recent systems that has HPET also has CPUs that supports TSC. The patch is still required for correctness. Signed-off-by:
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Ingo Molnar authored
This patch pushes the creation of a rare signal frame (SIGBUS or SIGSEGV) into a separate function, thus saving stackspace in the main do_page_fault() stackframe. The effect is 132 bytes less of stack used by the typical do_page_fault() invocation - resulting in a denser cache-layout. (Another minor effect is that in case of kernel crashes that come from a pagefault, we add less space to the already existing frame, giving the crash functions a slightly higher chance to do their stuff without overflowing the stack.) (The changes also result in slightly cleaner code.) argument bugfix from "Guillaume C." <guichaz@gmail.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu> Signed-off-by:
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Adrian Bunk authored
The LOG_BUF_SHIFT from lib/Kconfig.debug is sufficient. Signed-off-by:
Adrian Bunk <bunk@stusta.de> Acked-by:
Paul Mundt <lethal@Linux-SH.ORG> Signed-off-by:
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Ralf Baechle authored
Extend the compat mode kludgeology in envdev to cover MIPS as well. Or why we should need something like is_compat_task() ... Signed-off-by:
Ralf Baechle <ralf@linux-mips.org> Cc: Vojtech Pavlik <vojtech@suse.cz> Signed-off-by:
Dmitry Torokhov <dtor_core@ameritech.net> Signed-off-by:
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Yoichi Yuasa authored
vr41xx doesn't need mach-vr41xx/timex.h. This patch has removed mach-vr41xx/timex.h. Signed-off-by:
Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by:
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Yoichi Yuasa authored
This patch has fixed the following warnings. arch/mips/kernel/genex.S:250:5: warning: "CONFIG_64BIT" is not defined arch/mips/math-emu/cp1emu.c:1128:5: warning: "__mips64" is not defined arch/mips/math-emu/cp1emu.c:1206:5: warning: "__mips64" is not defined arch/mips/math-emu/cp1emu.c:1270:5: warning: "__mips64" is not defined arch/mips/math-emu/cp1emu.c:323:5: warning: "__mips64" is not defined arch/mips/math-emu/cp1emu.c:808:5: warning: "__mips64" is not defined arch/mips/math-emu/cp1emu.c:953:5: warning: "__mips64" is not defined arch/mips/mm/tlbex.c:519:5: warning: "CONFIG_64BIT" is not defined include/asm/reg.h:73:5: warning: "CONFIG_64BIT" is not defined Signed-off-by:
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Yoichi Yuasa authored
The addtion of SYS_SUPPORTS_*_KERNEL and CPU_SUPPORTS_*_KERNEL is halfway. This patch has added more SYS_SUPPORTS_*_KERNEL and CPU_SUPPORTS_*_KERNEL to arch/mips/Kconfig. Please apply. Signed-off-by:
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Yoichi Yuasa authored
This patch has added pcibios_bus_to_resource to MIPS. Signed-off-by:
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Yoichi Yuasa authored
Add pcibios_select_root to MIPS. Signed-off-by:
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Ralf Baechle authored
Fix the MIPS coherency configuration such that we always keep the mapping state in <asm/pci.h> when we need to on non-coherent platforms. Signed-off-by:
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Ralf Baechle authored
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Ralf Baechle authored
Start cleaning 32-bit vs. 64-bit configuration. Signed-off-by:
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Yoichi Yuasa authored
This patch has changed from VR41XX to VR4100 series in arch/mips/Kconfig. Signed-off-by:
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Yoichi Yuasa authored
This patch has removed obsolete VRC4171 config. Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by:
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Yoichi Yuasa authored
$ make menuconfig scripts/kconfig/mconf arch/i386/Kconfig drivers/char/Kconfig:847:warning: 'select' used by config symbol 'TANBAC_TB0219' refer to undefined symbol 'PCI_VR41XX' Here is a patch for this warning fix. Signed-off-by:
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Yoichi Yuasa authored
This patch has added default select configs for vr41xx. Signed-off-by:
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Yoichi Yuasa authored
This patch has added TANBAC VR4131 multichip module in arch/mips/Kconfig Signed-off-by:
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Ralf Baechle authored
- MIPS Denmark does no longer exist; the PCI vendor ID is now owned by MIPS Technologies. - Add ID for SOC-it, MIPS's system controller. Signed-off-by:
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Ralf Baechle authored
Add support for the virtual MIPS system that is emulated by Qemu. See http://www.linux-mips.org/wiki/Qemu for a detailed current status. Signed-off-by:
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Ralf Baechle authored
Revive HX frame buffer support for 2.6. Signed-off-by:
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Ralf Baechle authored
Rewrite PMAG BA frame buffer driver for 2.6. Acked-by:
Antonino Daplas <adaplas@pol.net> Signed-off-by:
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Ralf Baechle authored
Get it working again. Signed-off-by:
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Ralf Baechle authored
Remove the one file which managed to survive the removel of HP Laserjet support. Signed-off-by:
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Adrian Bunk authored
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Yoichi Yuasa authored
We also need this patch for removing mips vr4181. Signed-off-by:
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Ralf Baechle authored
There seem to be no more users or interest in the NEC Osprey evaluation system for the NEC VR4181 SOC which is an old part anyway, so remove the code. More information on the Osprey can be found at http://www.linux-mips.org/wiki/Osprey. Signed-off-by:
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Yoichi Yuasa authored
This patch has changed system type name in proc for vr41xx. Signed-off-by:
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Yoichi Yuasa authored
This patch has updated IRQ handling for vr41xx. o added common IRQ dispatch o changed IRQ number in int-handler.S o added resource management to icu.c Signed-off-by:
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Yoichi Yuasa authored
This patch has removed obsolete GIU function call for vr41xx. Signed-off-by:
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Jesper Juhl authored
Signed-off-by:
Jesper Juhl <jesper.juhl@gmail.com> Acked-by:
David Howells <dhowells@redhat.com> Signed-off-by:
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Nishanth Aravamudan authored
Use msleep_interruptible() instead of schedule_timeout() in ppc64-specific code to cleanup/simplify the sleeping logic. Change the units of the parameter of do_event_scan_all_cpus() to milliseconds from jiffies. The return value of rtas_extended_busy_delay_time() was incorrectly being used as a jiffies value (it is actually milliseconds), which is fixed by using the value as a parameter to msleep_interruptible(). Also, use rtas_extended_busy_delay_time() in another case where similar logic is duplicated. Signed-off-by:
Nishanth Aravamudan <nacc@us.ibm.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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Olof Johansson authored
We need to indicate to the hypervisor that it needs to save our VMX registers when switching partitions on a shared-processor system, just as it needs to for FP and PMC registers. This could be made to be on-demand when VMX is used, but we don't do that for FP nor PMC right now either so let's not overcomplicate things. Signed-off-by:
Olof Johansson <olof@lixom.net> Acked-by:
Paul Mackerras <paulus@samba.org> Cc: Anton Blanchard <anton@samba.org> Cc: <engebret@us.ibm.com> Signed-off-by:
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Olaf Hering authored
xmon will do nothing but noise on a G5 if BOOTX_TEXT is not enabled. mention the recognized kernel cmdline options for xmon. Signed-off-by:
Olaf Hering <olh@suse.de> Cc: Paul Mackeras <paulus@samba.org> Signed-off-by:
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Mark A. Greer authored
Update the cpci690 platform code: - pass mem size in from bootwrapper via bi_rec - some minor fixups Signed-off-by:
Mark A. Greer <mgreer@mvista.com> Signed-off-by:
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Mark A. Greer authored
Update the katana platform support code: - if booted as zImage, pass mem size in via bi_req from bootwrapper - if booted as uImage, get mem size from bd_info passed in from u-boot - add support for 82544 present on katana 752i's - set cacheline size on pci devices - some minor fixups Signed-off-by:
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