Commit d69332b8 authored by Jason Gaston's avatar Jason Gaston Committed by Linus Torvalds

[PATCH] piix: IDE PATA patch for Intel ESB2

This patch adds the Intel ESB2 DID's to the piix.c file for IDE PATA support.
Signed-off-by: default avatarJason Gaston <Jason.d.gaston@intel.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent e285f809
...@@ -134,6 +134,7 @@ static u8 piix_ratemask (ide_drive_t *drive) ...@@ -134,6 +134,7 @@ static u8 piix_ratemask (ide_drive_t *drive)
case PCI_DEVICE_ID_INTEL_ESB_2: case PCI_DEVICE_ID_INTEL_ESB_2:
case PCI_DEVICE_ID_INTEL_ICH6_19: case PCI_DEVICE_ID_INTEL_ICH6_19:
case PCI_DEVICE_ID_INTEL_ICH7_21: case PCI_DEVICE_ID_INTEL_ICH7_21:
case PCI_DEVICE_ID_INTEL_ESB2_18:
mode = 3; mode = 3;
break; break;
/* UDMA 66 capable */ /* UDMA 66 capable */
...@@ -447,6 +448,7 @@ static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char ...@@ -447,6 +448,7 @@ static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char
case PCI_DEVICE_ID_INTEL_ESB_2: case PCI_DEVICE_ID_INTEL_ESB_2:
case PCI_DEVICE_ID_INTEL_ICH6_19: case PCI_DEVICE_ID_INTEL_ICH6_19:
case PCI_DEVICE_ID_INTEL_ICH7_21: case PCI_DEVICE_ID_INTEL_ICH7_21:
case PCI_DEVICE_ID_INTEL_ESB2_18:
{ {
unsigned int extra = 0; unsigned int extra = 0;
pci_read_config_dword(dev, 0x54, &extra); pci_read_config_dword(dev, 0x54, &extra);
...@@ -572,6 +574,7 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = { ...@@ -572,6 +574,7 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = {
/* 20 */ DECLARE_PIIX_DEV("ICH6"), /* 20 */ DECLARE_PIIX_DEV("ICH6"),
/* 21 */ DECLARE_PIIX_DEV("ICH7"), /* 21 */ DECLARE_PIIX_DEV("ICH7"),
/* 22 */ DECLARE_PIIX_DEV("ICH4"), /* 22 */ DECLARE_PIIX_DEV("ICH4"),
/* 23 */ DECLARE_PIIX_DEV("ESB2"),
}; };
/** /**
...@@ -647,6 +650,7 @@ static struct pci_device_id piix_pci_tbl[] = { ...@@ -647,6 +650,7 @@ static struct pci_device_id piix_pci_tbl[] = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_19, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_19, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 21}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 21},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 22}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 22},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 23},
{ 0, }, { 0, },
}; };
MODULE_DEVICE_TABLE(pci, piix_pci_tbl); MODULE_DEVICE_TABLE(pci, piix_pci_tbl);
......
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