Commit ca22a5e4 authored by rajesh.shah@intel.com's avatar rajesh.shah@intel.com Committed by Greg Kroah-Hartman

[PATCH] pciehp: remove redundant data structures

State information is currently stored in per-slot as well as
per-pci-function data structures in pciehp. There's a lot of
overlap in the information kept, and some of it is never used.
This patch consolidates the state information to per-slot and
eliminates unused data structures. The biggest change is to
eliminate the pci_func structure and the code around managing
its lists.
Signed-off-by: default avatarRajesh Shah <rajesh.shah@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent a8a2be94
......@@ -56,25 +56,11 @@ struct hotplug_params {
u8 enable_perr;
};
struct pci_func {
struct pci_func *next;
u8 bus;
u8 device;
u8 function;
u8 is_a_board;
u16 status;
u8 configured;
u8 switch_save;
u8 presence_save;
u16 reserved2;
u32 config_space[0x20];
struct pci_dev* pci_dev;
};
struct slot {
struct slot *next;
u8 bus;
u8 device;
u16 status;
u32 number;
u8 is_a_board;
u8 configured;
......@@ -177,9 +163,6 @@ struct controller {
* error Messages
*/
#define msg_initialization_err "Initialization failure, error=%d\n"
#define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
#define msg_HPC_non_pcie "The PCI hot plug controller is not supported by this driver.\n"
#define msg_HPC_not_supported "This system is not supported by this version of pciephd module. Upgrade to a newer version of pciehpd\n"
#define msg_button_on "PCI slot #%d - powering on due to button press.\n"
#define msg_button_off "PCI slot #%d - powering off due to button press.\n"
#define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
......@@ -188,8 +171,6 @@ struct controller {
/* controller functions */
extern int pciehp_event_start_thread (void);
extern void pciehp_event_stop_thread (void);
extern struct pci_func *pciehp_slot_create (unsigned char busnumber);
extern struct pci_func *pciehp_slot_find (unsigned char bus, unsigned char device, unsigned char index);
extern int pciehp_enable_slot (struct slot *slot);
extern int pciehp_disable_slot (struct slot *slot);
......@@ -200,12 +181,8 @@ extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
/* extern void long_delay (int delay); */
/* pci functions */
extern int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
/*extern int pciehp_get_bus_dev (struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/
extern int pciehp_save_config (struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
extern int pciehp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot);
extern int pciehp_configure_device (struct slot *ctrl);
extern int pciehp_unconfigure_device (struct pci_func* func);
extern int pciehp_configure_device (struct slot *p_slot);
extern int pciehp_unconfigure_device (struct slot *p_slot);
extern int get_hp_hw_control_from_firmware(struct pci_dev *dev);
extern void get_hp_params_from_firmware(struct pci_dev *dev,
struct hotplug_params *hpp);
......@@ -214,7 +191,6 @@ extern void get_hp_params_from_firmware(struct pci_dev *dev,
/* Global variables */
extern struct controller *pciehp_ctrl_list;
extern struct pci_func *pciehp_slot_list[256];
/* Inline functions */
......
......@@ -46,7 +46,6 @@ int pciehp_debug;
int pciehp_poll_mode;
int pciehp_poll_time;
struct controller *pciehp_ctrl_list;
struct pci_func *pciehp_slot_list[256];
#define DRIVER_VERSION "0.4"
#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
......@@ -422,15 +421,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
first_device_num = ctrl->slot_device_offset;
num_ctlr_slots = ctrl->num_slots;
/* Store PCI Config Space for all devices on this bus */
dbg("%s: Before calling pciehp_save_config, ctrl->bus %x,ctrl->slot_bus %x\n",
__FUNCTION__,ctrl->bus, ctrl->slot_bus);
rc = pciehp_save_config(ctrl, ctrl->slot_bus, num_ctlr_slots, first_device_num);
if (rc) {
err("%s: unable to save PCI configuration data, error %d\n", __FUNCTION__, rc);
goto err_out_free_ctrl_bus;
}
ctrl->add_support = 1;
/* Setup the slot information structures */
......@@ -491,7 +481,6 @@ err_out_none:
static int pcie_start_thread(void)
{
int loop;
int retval = 0;
dbg("Initialize + Start the notification/polling mechanism \n");
......@@ -502,20 +491,11 @@ static int pcie_start_thread(void)
return retval;
}
dbg("Initialize slot lists\n");
/* One slot list for each bus in the system */
for (loop = 0; loop < 256; loop++) {
pciehp_slot_list[loop] = NULL;
}
return retval;
}
static void __exit unload_pciehpd(void)
{
struct pci_func *next;
struct pci_func *TempSlot;
int loop;
struct controller *ctrl;
struct controller *tctrl;
......@@ -534,15 +514,6 @@ static void __exit unload_pciehpd(void)
kfree(tctrl);
}
for (loop = 0; loop < 256; loop++) {
next = pciehp_slot_list[loop];
while (next != NULL) {
TempSlot = next;
next = next->next;
kfree(TempSlot);
}
}
/* Stop the notification mechanism */
pciehp_event_stop_thread();
......
This diff is collapsed.
......@@ -101,346 +101,41 @@ int pciehp_configure_device(struct slot *p_slot)
return 0;
}
int pciehp_unconfigure_device(struct pci_func* func)
int pciehp_unconfigure_device(struct slot *p_slot)
{
int rc = 0;
int j;
struct pci_bus *pbus;
u8 bctl = 0;
dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus,
func->device, func->function);
pbus = func->pci_dev->bus;
dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus,
p_slot->device);
for (j=0; j<8 ; j++) {
struct pci_dev* temp = pci_find_slot(func->bus,
(func->device << 3) | j);
if (temp) {
pci_remove_bus_device(temp);
struct pci_dev* temp = pci_find_slot(p_slot->bus,
(p_slot->device << 3) | j);
if (!temp)
continue;
if ((temp->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
err("Cannot remove display device %s\n",
pci_name(temp));
continue;
}
if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, &bctl);
if (bctl & PCI_BRIDGE_CTL_VGA) {
err("Cannot remove display device %s\n",
pci_name(temp));
continue;
}
}
pci_remove_bus_device(temp);
}
/*
* Some PCI Express root ports require fixup after hot-plug operation.
*/
if (pcie_mch_quirk)
pci_fixup_device(pci_fixup_final, pbus->self);
pci_fixup_device(pci_fixup_final, p_slot->ctrl->pci_dev);
return rc;
}
/*
* pciehp_save_config
*
* Reads configuration for all slots in a PCI bus and saves info.
*
* Note: For non-hot plug busses, the slot # saved is the device #
*
* returns 0 if success
*/
int pciehp_save_config(struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num)
{
int rc;
u8 class_code;
u8 header_type;
u32 ID;
u8 secondary_bus;
struct pci_func *new_slot;
int sub_bus;
int max_functions;
int function;
u8 DevError;
int device = 0;
int cloop = 0;
int stop_it;
int index;
int is_hot_plug = num_ctlr_slots || first_device_num;
struct pci_bus lpci_bus, *pci_bus;
int FirstSupported, LastSupported;
dbg("%s: Enter\n", __FUNCTION__);
memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
pci_bus = &lpci_bus;
dbg("%s: num_ctlr_slots = %d, first_device_num = %d\n", __FUNCTION__,
num_ctlr_slots, first_device_num);
/* Decide which slots are supported */
if (is_hot_plug) {
/*********************************
* is_hot_plug is the slot mask
*********************************/
FirstSupported = first_device_num;
LastSupported = FirstSupported + num_ctlr_slots - 1;
} else {
FirstSupported = 0;
LastSupported = 0x1F;
}
dbg("FirstSupported = %d, LastSupported = %d\n", FirstSupported,
LastSupported);
/* Save PCI configuration space for all devices in supported slots */
dbg("%s: pci_bus->number = %x\n", __FUNCTION__, pci_bus->number);
pci_bus->number = busnumber;
dbg("%s: bus = %x, dev = %x\n", __FUNCTION__, busnumber, device);
for (device = FirstSupported; device <= LastSupported; device++) {
ID = 0xFFFFFFFF;
rc = pci_bus_read_config_dword(pci_bus, PCI_DEVFN(device, 0),
PCI_VENDOR_ID, &ID);
if (ID != 0xFFFFFFFF) { /* device in slot */
dbg("%s: ID = %x\n", __FUNCTION__, ID);
rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
0x0B, &class_code);
if (rc)
return rc;
rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(device, 0),
PCI_HEADER_TYPE, &header_type);
if (rc)
return rc;
dbg("class_code = %x, header_type = %x\n", class_code, header_type);
/* If multi-function device, set max_functions to 8 */
if (header_type & 0x80)
max_functions = 8;
else
max_functions = 1;
function = 0;
do {
DevError = 0;
dbg("%s: In do loop\n", __FUNCTION__);
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* P-P Bridge */
/* Recurse the subordinate bus
* get the subordinate bus number
*/
rc = pci_bus_read_config_byte(pci_bus,
PCI_DEVFN(device, function),
PCI_SECONDARY_BUS, &secondary_bus);
if (rc) {
return rc;
} else {
sub_bus = (int) secondary_bus;
/* Save secondary bus cfg spc with this recursive call. */
rc = pciehp_save_config(ctrl, sub_bus, 0, 0);
if (rc)
return rc;
}
}
index = 0;
new_slot = pciehp_slot_find(busnumber, device, index++);
dbg("%s: new_slot = %p bus %x dev %x fun %x\n",
__FUNCTION__, new_slot, busnumber, device, index-1);
while (new_slot && (new_slot->function != (u8) function)) {
new_slot = pciehp_slot_find(busnumber, device, index++);
dbg("%s: while loop, new_slot = %p bus %x dev %x fun %x\n",
__FUNCTION__, new_slot, busnumber, device, index-1);
}
if (!new_slot) {
/* Setup slot structure. */
new_slot = pciehp_slot_create(busnumber);
dbg("%s: if, new_slot = %p bus %x dev %x fun %x\n",
__FUNCTION__, new_slot, busnumber, device, function);
if (new_slot == NULL)
return(1);
}
new_slot->bus = (u8) busnumber;
new_slot->device = (u8) device;
new_slot->function = (u8) function;
new_slot->is_a_board = 1;
new_slot->switch_save = 0x10;
/* In case of unsupported board */
new_slot->status = DevError;
new_slot->pci_dev = pci_find_slot(new_slot->bus,
(new_slot->device << 3) | new_slot->function);
dbg("new_slot->pci_dev = %p\n", new_slot->pci_dev);
for (cloop = 0; cloop < 0x20; cloop++) {
rc = pci_bus_read_config_dword(pci_bus,
PCI_DEVFN(device, function),
cloop << 2,
(u32 *) &(new_slot->config_space [cloop]));
/* dbg("new_slot->config_space[%x] = %x\n",
cloop, new_slot->config_space[cloop]); */
if (rc)
return rc;
}
function++;
stop_it = 0;
/* this loop skips to the next present function
* reading in Class Code and Header type.
*/
while ((function < max_functions)&&(!stop_it)) {
dbg("%s: In while loop \n", __FUNCTION__);
rc = pci_bus_read_config_dword(pci_bus,
PCI_DEVFN(device, function),
PCI_VENDOR_ID, &ID);
if (ID == 0xFFFFFFFF) { /* nothing there. */
function++;
dbg("Nothing there\n");
} else { /* Something there */
rc = pci_bus_read_config_byte(pci_bus,
PCI_DEVFN(device, function),
0x0B, &class_code);
if (rc)
return rc;
rc = pci_bus_read_config_byte(pci_bus,
PCI_DEVFN(device, function),
PCI_HEADER_TYPE, &header_type);
if (rc)
return rc;
dbg("class_code = %x, header_type = %x\n", class_code, header_type);
stop_it++;
}
}
} while (function < max_functions);
/* End of IF (device in slot?) */
} else if (is_hot_plug) {
/* Setup slot structure with entry for empty slot */
new_slot = pciehp_slot_create(busnumber);
if (new_slot == NULL) {
return(1);
}
dbg("new_slot = %p, bus = %x, dev = %x, fun = %x\n", new_slot,
new_slot->bus, new_slot->device, new_slot->function);
new_slot->bus = (u8) busnumber;
new_slot->device = (u8) device;
new_slot->function = 0;
new_slot->is_a_board = 0;
new_slot->presence_save = 0;
new_slot->switch_save = 0;
}
} /* End of FOR loop */
dbg("%s: Exit\n", __FUNCTION__);
return(0);
}
/*
* pciehp_save_slot_config
*
* Saves configuration info for all PCI devices in a given slot
* including subordinate busses.
*
* returns 0 if success
*/
int pciehp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot)
{
int rc;
u8 class_code;
u8 header_type;
u32 ID;
u8 secondary_bus;
int sub_bus;
int max_functions;
int function;
int cloop = 0;
int stop_it;
struct pci_bus lpci_bus, *pci_bus;
memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
pci_bus = &lpci_bus;
pci_bus->number = new_slot->bus;
ID = 0xFFFFFFFF;
pci_bus_read_config_dword(pci_bus, PCI_DEVFN(new_slot->device, 0),
PCI_VENDOR_ID, &ID);
if (ID != 0xFFFFFFFF) { /* device in slot */
pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
0x0B, &class_code);
pci_bus_read_config_byte(pci_bus, PCI_DEVFN(new_slot->device, 0),
PCI_HEADER_TYPE, &header_type);
if (header_type & 0x80) /* Multi-function device */
max_functions = 8;
else
max_functions = 1;
function = 0;
do {
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
/* Recurse the subordinate bus */
pci_bus_read_config_byte(pci_bus,
PCI_DEVFN(new_slot->device, function),
PCI_SECONDARY_BUS, &secondary_bus);
sub_bus = (int) secondary_bus;
/* Save the config headers for the secondary bus. */
rc = pciehp_save_config(ctrl, sub_bus, 0, 0);
if (rc)
return rc;
} /* End of IF */
new_slot->status = 0;
for (cloop = 0; cloop < 0x20; cloop++) {
pci_bus_read_config_dword(pci_bus,
PCI_DEVFN(new_slot->device, function),
cloop << 2,
(u32 *) &(new_slot->config_space [cloop]));
}
function++;
stop_it = 0;
/* this loop skips to the next present function
* reading in the Class Code and the Header type.
*/
while ((function < max_functions) && (!stop_it)) {
pci_bus_read_config_dword(pci_bus,
PCI_DEVFN(new_slot->device, function),
PCI_VENDOR_ID, &ID);
if (ID == 0xFFFFFFFF) { /* nothing there. */
function++;
} else { /* Something there */
pci_bus_read_config_byte(pci_bus,
PCI_DEVFN(new_slot->device, function),
0x0B, &class_code);
pci_bus_read_config_byte(pci_bus,
PCI_DEVFN(new_slot->device, function),
PCI_HEADER_TYPE, &header_type);
stop_it++;
}
}
} while (function < max_functions);
} /* End of IF (device in slot?) */
else {
return 2;
}
return 0;
}
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