Commit b5f3c4b5 authored by Tony Lindgren's avatar Tony Lindgren

musb_hdrc: Search and replace bEnd with epnum

Search and replace bEnd with epnum
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 3ef9b196
......@@ -76,7 +76,7 @@ static int service_tx_status_request(
{
void __iomem *mbase = musb->mregs;
int handled = 1;
u8 bResult[2], bEnd = 0;
u8 bResult[2], epnum = 0;
const u8 bRecip = pControlRequest->bRequestType & USB_RECIP_MASK;
bResult[1] = 0;
......@@ -107,27 +107,27 @@ static int service_tx_status_request(
u16 tmp;
void __iomem *regs;
bEnd = (u8) pControlRequest->wIndex;
if (!bEnd) {
epnum = (u8) pControlRequest->wIndex;
if (!epnum) {
bResult[0] = 0;
break;
}
is_in = bEnd & USB_DIR_IN;
is_in = epnum & USB_DIR_IN;
if (is_in) {
bEnd &= 0x0f;
ep = &musb->endpoints[bEnd].ep_in;
epnum &= 0x0f;
ep = &musb->endpoints[epnum].ep_in;
} else {
ep = &musb->endpoints[bEnd].ep_out;
ep = &musb->endpoints[epnum].ep_out;
}
regs = musb->endpoints[bEnd].regs;
regs = musb->endpoints[epnum].regs;
if (bEnd >= MUSB_C_NUM_EPS || !ep->desc) {
if (epnum >= MUSB_C_NUM_EPS || !ep->desc) {
handled = -EINVAL;
break;
}
MGC_SelectEnd(mbase, bEnd);
MGC_SelectEnd(mbase, epnum);
if (is_in)
tmp = musb_readw(regs, MGC_O_HDRC_TXCSR)
& MGC_M_TXCSR_P_SENDSTALL;
......@@ -256,19 +256,19 @@ __acquires(musb->Lock)
case USB_RECIP_INTERFACE:
break;
case USB_RECIP_ENDPOINT:{
const u8 bEnd = pControlRequest->wIndex & 0x0f;
const u8 epnum = pControlRequest->wIndex & 0x0f;
struct musb_ep *musb_ep;
if (bEnd == 0
|| bEnd >= MUSB_C_NUM_EPS
if (epnum == 0
|| epnum >= MUSB_C_NUM_EPS
|| pControlRequest->wValue
!= USB_ENDPOINT_HALT)
break;
if (pControlRequest->wIndex & USB_DIR_IN)
musb_ep = &musb->endpoints[bEnd].ep_in;
musb_ep = &musb->endpoints[epnum].ep_in;
else
musb_ep = &musb->endpoints[bEnd].ep_out;
musb_ep = &musb->endpoints[epnum].ep_out;
if (!musb_ep->desc)
break;
......@@ -364,7 +364,7 @@ stall:
break;
case USB_RECIP_ENDPOINT:{
const u8 bEnd =
const u8 epnum =
pControlRequest->wIndex & 0x0f;
struct musb_ep *musb_ep;
struct musb_hw_ep *ep;
......@@ -372,13 +372,13 @@ stall:
int is_in;
u16 csr;
if (bEnd == 0
|| bEnd >= MUSB_C_NUM_EPS
if (epnum == 0
|| epnum >= MUSB_C_NUM_EPS
|| pControlRequest->wValue
!= USB_ENDPOINT_HALT)
break;
ep = musb->endpoints + bEnd;
ep = musb->endpoints + epnum;
regs = ep->regs;
is_in = pControlRequest->wIndex & USB_DIR_IN;
if (is_in)
......@@ -388,7 +388,7 @@ stall:
if (!musb_ep->desc)
break;
MGC_SelectEnd(mbase, bEnd);
MGC_SelectEnd(mbase, epnum);
if (is_in) {
csr = musb_readw(regs,
MGC_O_HDRC_TXCSR);
......
This diff is collapsed.
......@@ -39,7 +39,7 @@ struct musb_request {
struct musb_ep *ep;
struct musb *musb;
u8 bTx; /* endpoint direction */
u8 bEnd;
u8 epnum;
u8 mapped;
};
......@@ -92,8 +92,8 @@ static inline struct usb_request *next_request(struct musb_ep *ep)
return container_of(queue->next, struct usb_request, list);
}
extern void musb_g_tx(struct musb *musb, u8 bEnd);
extern void musb_g_rx(struct musb *musb, u8 bEnd);
extern void musb_g_tx(struct musb *musb, u8 epnum);
extern void musb_g_rx(struct musb *musb, u8 epnum);
extern const struct usb_ep_ops musb_g_ep0_ops;
......
This diff is collapsed.
......@@ -233,14 +233,14 @@ static int dump_ep(struct musb_ep *ep, char *buffer, unsigned max)
#endif
static int
dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
dump_end_info(struct musb *musb, u8 epnum, char *aBuffer, unsigned max)
{
int code = 0;
char *buf = aBuffer;
struct musb_hw_ep *hw_ep = &musb->endpoints[bEnd];
struct musb_hw_ep *hw_ep = &musb->endpoints[epnum];
do {
MGC_SelectEnd(musb->mregs, bEnd);
MGC_SelectEnd(musb->mregs, epnum);
#ifdef CONFIG_USB_MUSB_HDRC_HCD
if (is_host_active(musb)) {
int dump_rx, dump_tx;
......@@ -249,7 +249,7 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
/* TEMPORARY (!) until we have a real periodic
* schedule tree ...
*/
if (!bEnd) {
if (!epnum) {
/* control is shared, uses RX queue
* but (mostly) shadowed tx registers
*/
......@@ -258,10 +258,10 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
} else if (hw_ep == musb->bulk_ep) {
dump_tx = !list_empty(&musb->out_bulk);
dump_rx = !list_empty(&musb->in_bulk);
} else if (musb->periodic[bEnd]) {
} else if (musb->periodic[epnum]) {
struct usb_host_endpoint *hep;
hep = musb->periodic[bEnd]->hep;
hep = musb->periodic[epnum]->hep;
dump_rx = hep->desc.bEndpointAddress
& USB_ENDPOINT_DIR_MASK;
dump_tx = !dump_rx;
......@@ -276,7 +276,7 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
"max %04x type %02x; "
"dev %d hub %d port %d"
"\n",
bEnd,
epnum,
hw_ep->rx_double_buffered
? "2buf" : "1buf",
musb_readw(regs, MGC_O_HDRC_RXCSR),
......@@ -285,13 +285,13 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
musb_readb(regs, MGC_O_HDRC_RXTYPE),
/* FIXME: assumes multipoint */
musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(bEnd,
MGC_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_RXFUNCADDR)),
musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(bEnd,
MGC_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_RXHUBADDR)),
musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(bEnd,
MGC_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_RXHUBPORT))
);
if (code <= 0)
......@@ -301,9 +301,9 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
max -= code;
if (is_cppi_enabled()
&& bEnd
&& epnum
&& hw_ep->rx_channel) {
unsigned cppi = bEnd - 1;
unsigned cppi = epnum - 1;
unsigned off1 = cppi << 2;
void __iomem *base;
void __iomem *ram;
......@@ -347,8 +347,8 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
code = min(code, (int) max);
buf += code;
max -= code;
} else if (musb->periodic[bEnd]) {
code = dump_qh(musb->periodic[bEnd],
} else if (musb->periodic[epnum]) {
code = dump_qh(musb->periodic[epnum],
buf, max);
if (code <= 0)
break;
......@@ -364,7 +364,7 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
"max %04x type %02x; "
"dev %d hub %d port %d"
"\n",
bEnd,
epnum,
hw_ep->tx_double_buffered
? "2buf" : "1buf",
musb_readw(regs, MGC_O_HDRC_TXCSR),
......@@ -373,13 +373,13 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
musb_readb(regs, MGC_O_HDRC_TXTYPE),
/* FIXME: assumes multipoint */
musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(bEnd,
MGC_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_TXFUNCADDR)),
musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(bEnd,
MGC_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_TXHUBADDR)),
musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(bEnd,
MGC_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_TXHUBPORT))
);
if (code <= 0)
......@@ -389,9 +389,9 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
max -= code;
if (is_cppi_enabled()
&& bEnd
&& epnum
&& hw_ep->tx_channel) {
unsigned cppi = bEnd - 1;
unsigned cppi = epnum - 1;
void __iomem *base;
void __iomem *ram;
......@@ -438,8 +438,8 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
code = min(code, (int) max);
buf += code;
max -= code;
} else if (musb->periodic[bEnd]) {
code = dump_qh(musb->periodic[bEnd],
} else if (musb->periodic[epnum]) {
code = dump_qh(musb->periodic[epnum],
buf, max);
if (code <= 0)
break;
......@@ -454,7 +454,7 @@ dump_end_info(struct musb *musb, u8 bEnd, char *aBuffer, unsigned max)
if (is_peripheral_active(musb)) {
code = 0;
if (hw_ep->ep_in.desc || !bEnd) {
if (hw_ep->ep_in.desc || !epnum) {
code = dump_ep(&hw_ep->ep_in, buf, max);
if (code <= 0)
break;
......@@ -785,7 +785,7 @@ static int musb_proc_read(char *page, char **start,
int code = 0;
unsigned long flags;
struct musb *musb = data;
unsigned bEnd;
unsigned epnum;
count -= off;
count -= 1; /* for NUL at end */
......@@ -802,9 +802,9 @@ static int musb_proc_read(char *page, char **start,
/* generate the report for the end points */
// REVISIT ... not unless something's connected!
for (bEnd = 0; count >= 0 && bEnd < musb->nr_endpoints;
bEnd++) {
code = dump_end_info(musb, bEnd, buffer, count);
for (epnum = 0; count >= 0 && epnum < musb->nr_endpoints;
epnum++) {
code = dump_end_info(musb, epnum, buffer, count);
if (code > 0) {
buffer += code;
count -= code;
......
......@@ -218,19 +218,19 @@ enum musb_g_ep0_state {
/* TUSB mapping: "flat" plus ep0 special cases */
#if defined(CONFIG_USB_TUSB6010)
#define MGC_SelectEnd(_mbase, _bEnd) \
musb_writeb((_mbase), MGC_O_HDRC_INDEX, (_bEnd))
#define MGC_SelectEnd(_mbase, _epnum) \
musb_writeb((_mbase), MGC_O_HDRC_INDEX, (_epnum))
#define MGC_END_OFFSET MGC_TUSB_OFFSET
/* "flat" mapping: each endpoint has its own i/o address */
#elif defined(MUSB_FLAT_REG)
#define MGC_SelectEnd(_mbase, _bEnd) (((void)(_mbase)),((void)(_bEnd)))
#define MGC_SelectEnd(_mbase, _epnum) (((void)(_mbase)),((void)(_epnum)))
#define MGC_END_OFFSET MGC_FLAT_OFFSET
/* "indexed" mapping: INDEX register controls register bank select */
#else
#define MGC_SelectEnd(_mbase, _bEnd) \
musb_writeb((_mbase), MGC_O_HDRC_INDEX, (_bEnd))
#define MGC_SelectEnd(_mbase, _epnum) \
musb_writeb((_mbase), MGC_O_HDRC_INDEX, (_epnum))
#define MGC_END_OFFSET MGC_INDEXED_OFFSET
#endif
......
......@@ -107,16 +107,16 @@
#define MGC_O_HDRC_CONFIGDATA MGC_O_HDRC_FIFOSIZE /* re-used for EP0 */
/* offsets to endpoint registers in indexed model (using INDEX register) */
#define MGC_INDEXED_OFFSET(_bEnd, _bOffset) \
#define MGC_INDEXED_OFFSET(_epnum, _bOffset) \
(0x10 + (_bOffset))
/* offsets to endpoint registers in flat models */
#define MGC_FLAT_OFFSET(_bEnd, _bOffset) \
(0x100 + (0x10*(_bEnd)) + (_bOffset))
#define MGC_FLAT_OFFSET(_epnum, _bOffset) \
(0x100 + (0x10*(_epnum)) + (_bOffset))
#ifdef CONFIG_USB_TUSB6010
/* TUSB6010 EP0 configuration register is special */
#define MGC_TUSB_OFFSET(_bEnd, _bOffset) \
#define MGC_TUSB_OFFSET(_epnum, _bOffset) \
(0x10 + _bOffset)
#include "tusb6010.h" /* needed "only" for TUSB_EP0_CONF */
#endif
......@@ -130,8 +130,8 @@
#define MGC_O_HDRC_RXHUBADDR 0x06
#define MGC_O_HDRC_RXHUBPORT 0x07
#define MGC_BUSCTL_OFFSET(_bEnd, _bOffset) \
(0x80 + (8*(_bEnd)) + (_bOffset))
#define MGC_BUSCTL_OFFSET(_epnum, _bOffset) \
(0x80 + (8*(_epnum)) + (_bOffset))
/*
* MUSBHDRC Register bit masks
......
......@@ -78,7 +78,7 @@ struct musb_dma_channel {
u32 len;
u16 wMaxPacketSize;
u8 bIndex;
u8 bEnd;
u8 epnum;
u8 bTransmit;
};
......@@ -140,7 +140,7 @@ static struct dma_channel* dma_channel_allocate(struct dma_controller *c,
pImplChannel = &(pController->aChannel[bBit]);
pImplChannel->pController = pController;
pImplChannel->bIndex = bBit;
pImplChannel->bEnd = hw_ep->epnum;
pImplChannel->epnum = hw_ep->epnum;
pImplChannel->bTransmit = bTransmit;
pChannel = &(pImplChannel->Channel);
pChannel->pPrivateData = pImplChannel;
......@@ -201,7 +201,7 @@ static void configure_channel(struct dma_channel *pChannel,
}
}
wCsr |= (pImplChannel->bEnd << MGC_S_HSDMA_ENDPOINT)
wCsr |= (pImplChannel->epnum << MGC_S_HSDMA_ENDPOINT)
| (1 << MGC_S_HSDMA_ENABLE)
| (1 << MGC_S_HSDMA_IRQENABLE)
| (pImplChannel->bTransmit ? (1 << MGC_S_HSDMA_TRANSMIT) : 0);
......@@ -228,7 +228,7 @@ static int dma_channel_program(struct dma_channel * pChannel,
(struct musb_dma_channel *) pChannel->pPrivateData;
DBG(2, "ep%d-%s pkt_sz %d, dma_addr 0x%x length %d, mode %d\n",
pImplChannel->bEnd,
pImplChannel->epnum,
pImplChannel->bTransmit ? "Tx" : "Rx",
wPacketSize, dma_addr, dwLength, bMode);
......@@ -263,22 +263,22 @@ static int dma_channel_abort(struct dma_channel *pChannel)
if (pImplChannel->bTransmit) {
csr = musb_readw(mbase,
MGC_END_OFFSET(pImplChannel->bEnd,MGC_O_HDRC_TXCSR));
MGC_END_OFFSET(pImplChannel->epnum,MGC_O_HDRC_TXCSR));
csr &= ~(MGC_M_TXCSR_AUTOSET |
MGC_M_TXCSR_DMAENAB |
MGC_M_TXCSR_DMAMODE);
musb_writew(mbase,
MGC_END_OFFSET(pImplChannel->bEnd,MGC_O_HDRC_TXCSR),
MGC_END_OFFSET(pImplChannel->epnum,MGC_O_HDRC_TXCSR),
csr);
}
else {
csr = musb_readw(mbase,
MGC_END_OFFSET(pImplChannel->bEnd,MGC_O_HDRC_RXCSR));
MGC_END_OFFSET(pImplChannel->epnum,MGC_O_HDRC_RXCSR));
csr &= ~(MGC_M_RXCSR_AUTOCLEAR |
MGC_M_RXCSR_DMAENAB |
MGC_M_RXCSR_DMAMODE);
musb_writew(mbase,
MGC_END_OFFSET(pImplChannel->bEnd,MGC_O_HDRC_RXCSR),
MGC_END_OFFSET(pImplChannel->epnum,MGC_O_HDRC_RXCSR),
csr);
}
......@@ -354,14 +354,14 @@ static irqreturn_t dma_controller_irq(int irq, void *pPrivateData)
) {
/* Send out the packet */
MGC_SelectEnd(mbase,
pImplChannel->bEnd);
pImplChannel->epnum);
musb_writew(mbase,
MGC_END_OFFSET(pImplChannel->bEnd,MGC_O_HDRC_TXCSR),
MGC_END_OFFSET(pImplChannel->epnum,MGC_O_HDRC_TXCSR),
MGC_M_TXCSR_TXPKTRDY);
} else
musb_dma_completion(
pController->pDmaPrivate,
pImplChannel->bEnd,
pImplChannel->epnum,
pImplChannel->bTransmit);
}
}
......
......@@ -662,7 +662,7 @@ static irqreturn_t musb_stage2_irq(struct musb * musb, u8 bIntrUSB,
if (bIntrUSB & MGC_M_INTR_SOF) {
void __iomem *mbase = musb->mregs;
struct musb_hw_ep *ep;
u8 bEnd;
u8 epnum;
u16 wFrame;
DBG(6, "START_OF_FRAME\n");
......@@ -671,20 +671,20 @@ static irqreturn_t musb_stage2_irq(struct musb * musb, u8 bIntrUSB,
/* start any periodic Tx transfers waiting for current frame */
wFrame = musb_readw(mbase, MGC_O_HDRC_FRAME);
ep = musb->endpoints;
for (bEnd = 1; (bEnd < musb->nr_endpoints)
&& (musb->wEndMask >= (1 << bEnd));
bEnd++, ep++) {
for (epnum = 1; (epnum < musb->nr_endpoints)
&& (musb->wEndMask >= (1 << epnum));
epnum++, ep++) {
// FIXME handle framecounter wraps (12 bits)
// eliminate duplicated StartUrb logic
if (ep->dwWaitFrame >= wFrame) {
ep->dwWaitFrame = 0;
printk("SOF --> periodic TX%s on %d\n",
ep->tx_channel ? " DMA" : "",
bEnd);
epnum);
if (!ep->tx_channel)
musb_h_tx_start(musb, bEnd);
musb_h_tx_start(musb, epnum);
else
cppi_hostdma_start(musb, bEnd);
cppi_hostdma_start(musb, epnum);
}
} /* end of for loop */
}
......@@ -1178,7 +1178,7 @@ static int __init ep_config_from_table(struct musb *musb)
*/
static int __init ep_config_from_hw(struct musb *musb)
{
u8 bEnd = 0, reg;
u8 epnum = 0, reg;
struct musb_hw_ep *hw_ep;
void *mbase = musb->mregs;
......@@ -1186,9 +1186,9 @@ static int __init ep_config_from_hw(struct musb *musb)
/* FIXME pick up ep0 maxpacket size */
for (bEnd = 1; bEnd < MUSB_C_NUM_EPS; bEnd++) {
MGC_SelectEnd(mbase, bEnd);
hw_ep = musb->endpoints + bEnd;
for (epnum = 1; epnum < MUSB_C_NUM_EPS; epnum++) {
MGC_SelectEnd(mbase, epnum);
hw_ep = musb->endpoints + epnum;
/* read from core using indexed model */
reg = musb_readb(hw_ep->regs, 0x10 + MGC_O_HDRC_FIFOSIZE);
......@@ -1197,7 +1197,7 @@ static int __init ep_config_from_hw(struct musb *musb)
break;
}
musb->nr_endpoints++;
musb->wEndMask |= (1 << bEnd);
musb->wEndMask |= (1 << epnum);
hw_ep->wMaxPacketSizeTx = 1 << (reg & 0x0f);
......
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