Merge with /home/tmlind/src/kernel/linux-omap-2.6

arch/arm/boot/.gitignore

+Image
+zImage

arch/arm/boot/compressed/.gitignore

+piggy.gz

arch/arm/mach-omap2/clock.c

@@ -913,7 +913,7 @@ static int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
 static int omap2_select_table_rate(struct clk * clk, unsigned long rate)
 {
 	u32 flags, cur_rate, done_rate, bypass = 0;
-	u8 cpu_mask;
+	u8 cpu_mask = 0;
 	struct prcm_config *prcm;
 	unsigned long found_speed = 0;
 
@@ -929,7 +929,7 @@ static int omap2_select_table_rate(struct clk * clk, unsigned long rate)
 	for (prcm = rate_table; prcm->mpu_speed; prcm++) {
 		if (!(prcm->flags & cpu_mask))
 			continue;
-			
+
 		if (prcm->xtal_speed != sys_ck.rate)
 			continue;
 
@@ -941,7 +941,7 @@ static int omap2_select_table_rate(struct clk * clk, unsigned long rate)
 
 	if (!found_speed) {
 		printk(KERN_INFO "Could not set MPU rate to %luMHz\n",
-		       rate / 1000000); 
+	 rate / 1000000);
 		return -EINVAL;
 	}
 

arch/arm/mach-omap2/clock.h

@@ -17,9 +17,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H
 #define __ARCH_ARM_MACH_OMAP2_CLOCK_H
 
-/* FIXME: This will go away when the cpu detection is done for 24xx */
-#define cpu_is_omap2430()	0
-
 static void omap2_sys_clk_recalc(struct clk * clk);
 static void omap2_clksel_recalc(struct clk * clk);
 static void omap2_followparent_recalc(struct clk * clk);

arch/arm/mach-omap2/timer-gp.c

@@ -92,20 +92,20 @@ static struct irqaction omap2_gp_timer_irq = {
 
 static void __init omap2_gp_timer_init(void)
 {
-	struct clk * osc_ck;
+	struct clk * sys_ck;
 	u32 tick_period = 120000;
 	u32 l;
 
 	/* Reset clock and prescale value */
 	timer_write_reg(OS_TIMER_NR, GP_TIMER_TCLR, 0);
 
-	osc_ck = clk_get(NULL, "osc_ck");
-	if (IS_ERR(osc_ck))
-		printk(KERN_ERR "Could not get osc_ck\n");
+	sys_ck = clk_get(NULL, "sys_ck");
+	if (IS_ERR(sys_ck))
+		printk(KERN_ERR "Could not get sys_ck\n");
 	else {
-		clk_use(osc_ck);
-		tick_period = clk_get_rate(osc_ck) / 100;
-		clk_put(osc_ck);
+		clk_use(sys_ck);
+		tick_period = clk_get_rate(sys_ck) / 100;
+		clk_put(sys_ck);
 	}
 
 	tick_period /= 2;	/* Minimum prescale divider is 2 */

arch/arm/plat-omap/usb.c

@@ -91,6 +91,8 @@ EXPORT_SYMBOL(otg_set_transceiver);
 
 /*-------------------------------------------------------------------------*/
 
+#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
+
 static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
 {
 	u32	syscon1 = 0;
@@ -271,6 +273,8 @@ static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
 	return syscon1 << 24;
 }
 
+#endif
+
 /*-------------------------------------------------------------------------*/
 
 #if	defined(CONFIG_USB_GADGET_OMAP) || \

drivers/media/video/omap/omap16xxcam.c

@@ -174,10 +174,10 @@ omap16xx_cam_link_open(struct omap16xxcam *data)
                 return ret;
         }
  	data->next_dmach = data->dma_channel_number1;
-	omap_writew(data->dma_channel_number2, 
-				OMAP_DMA_CLNK_CTRL(data->dma_channel_number1));
-	omap_writew(data->dma_channel_number1, 
-				OMAP_DMA_CLNK_CTRL(data->dma_channel_number2));
+	OMAP_DMA_CLNK_CTRL_REG(data->dma_channel_number1) =
+		data->dma_channel_number2;
+	OMAP_DMA_CLNK_CTRL_REG(data->dma_channel_number2) =
+		data->dma_channel_number1;
 
 	return 0;
 }
@@ -222,7 +222,7 @@ omap16xx_cam_dma_link_callback(int lch, unsigned short ch_status, void *data)
 
 	while (cam->free_dmach < 2)
 	{
-		if ((omap_readw(OMAP_DMA_CCR(lch)) & (1 << 7) ))
+		if (OMAP_DMA_CCR_REG(lch) & (1 << 7))
 			break;	
 
 		count = (lch == cam->dma_channel_number2) ? 1 : 0;
@@ -341,10 +341,8 @@ omap16xxcam_start_dma(struct sgdma_state *sgdma,
 			sg_dma_len(sglist)/(4 * FIFO_TRIGGER_LVL), 
  			OMAP_DMA_SYNC_FRAME,
 			0, 0);
-	
 
-	omap_writew(omap_readw(OMAP_DMA_CLNK_CTRL(dmach)) & ~(1<<15), 
-					OMAP_DMA_CLNK_CTRL(dmach));
+	OMAP_DMA_CLNK_CTRL_REG(dmach) &= ~( 1<< 15);
 
 	prev_dmach = (dmach == data->dma_channel_number2) ? 
 		data->dma_channel_number1 : data->dma_channel_number2;
@@ -353,11 +351,8 @@ omap16xxcam_start_dma(struct sgdma_state *sgdma,
 		data->new = 0;
 		omap16xx_cam_waitfor_syncedge(data, EN_V_UP);
 	} else {
-		if (omap_readw(OMAP_DMA_CCR(prev_dmach)) & (1 << 7)) {
-			omap_writew((omap_readw(OMAP_DMA_CLNK_CTRL(prev_dmach)) |
-					 (1 << 15)),
-			OMAP_DMA_CLNK_CTRL(prev_dmach));
-		}
+		if (OMAP_DMA_CCR_REG(prev_dmach) & (1 << 7))
+			OMAP_DMA_CLNK_CTRL_REG(prev_dmach) |= (1 << 15);
 		else {
 			/* no transfer is in progress */
   			omap_start_dma(dmach);

drivers/net/irda/omap1610-ir.c

@@ -404,8 +404,8 @@ omap1610_irda_irq(int irq, void *dev_id, struct pt_regs *hw_regs)
 
 		skb_reserve(skb, 1);
 
-		w = omap_readw(OMAP_DMA_CDAC(si->rx_dma_channel));
-		w -= omap_readw(OMAP_DMA_CDSA_L(si->rx_dma_channel));
+		w = OMAP_DMA_CDAC_REG(si->rx_dma_channel);
+		w -= OMAP_DMA_CDSA_L_REG(si->rx_dma_channel);
 
 		if (si->speed != 4000000) {
 			memcpy(skb_put(skb, w - 2), si->rx_buf_dma_virt, w - 2);	/* Copy DMA buffer to skb */

drivers/usb/gadget/omap_udc.c

@@ -544,9 +544,9 @@ static inline dma_addr_t dma_csac(unsigned lch)
 	/* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
 	 * read before the DMA controller finished disabling the channel.
 	 */
-	csac = omap_readw(OMAP_DMA_CSAC(lch));
+	csac = OMAP_DMA_CSAC_REG(lch);
 	if (csac == 0)
-		csac = omap_readw(OMAP_DMA_CSAC(lch));
+		csac = OMAP_DMA_CSAC_REG(lch);
 	return csac;
 }
 
@@ -557,9 +557,9 @@ static inline dma_addr_t dma_cdac(unsigned lch)
 	/* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
 	 * read before the DMA controller finished disabling the channel.
 	 */
-	cdac = omap_readw(OMAP_DMA_CDAC(lch));
+	cdac = OMAP_DMA_CDAC_REG(lch);
 	if (cdac == 0)
-		cdac = omap_readw(OMAP_DMA_CDAC(lch));
+		cdac = OMAP_DMA_CDAC_REG(lch);
 	return cdac;
 }
 
@@ -584,7 +584,7 @@ static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
 }
 
 #define DMA_DEST_LAST(x) (cpu_is_omap15xx() \
-		? omap_readw(OMAP_DMA_CSAC(x)) /* really: CPC */ \
+		? OMAP_DMA_CSAC_REG(x) /* really: CPC */ \
 		: dma_cdac(x))
 
 static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start)
@@ -854,7 +854,7 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
 
 		/* channel type P: hw synch (fifo) */
 		if (!cpu_is_omap15xx())
-			omap_writew(2, OMAP_DMA_LCH_CTRL(ep->lch));
+			OMAP1_DMA_LCH_CTRL_REG(ep->lch) = 2;
 	}
 
 just_restart:
@@ -901,7 +901,7 @@ static void dma_channel_release(struct omap_ep *ep)
 	else
 		req = NULL;
 
-	active = ((1 << 7) & omap_readl(OMAP_DMA_CCR(ep->lch))) != 0;
+	active = ((1 << 7) & OMAP_DMA_CCR_REG(ep->lch)) != 0;
 
 	DBG("%s release %s %cxdma%d %p\n", ep->ep.name,
 			active ? "active" : "idle",

include/asm-arm/.gitignore

+arch
+asm-offsets.h
+mach-types.h

include/asm-arm/arch-omap/dma.h

@@ -22,6 +22,7 @@
 #define __ASM_ARCH_DMA_H
 
 #define MAX_DMA_ADDRESS			0xffffffff
+#define MAX_DMA_CHANNELS		0
 
 /* Hardware registers for omap1 */
 #define OMAP_DMA_BASE			(0xfffed800)

sound/arm/omap-alsa-dma.c

@@ -428,8 +428,7 @@ static void sound_dma_irq_handler(int sound_curr_lch, u16 ch_status,
 		sound_curr_lch, ch_status, dma_status, data);
 
 	if (dma_status & (DCSR_ERROR)) {
-		omap_writew(omap_readw(OMAP_DMA_CCR(sound_curr_lch)) &
-			    ~DCCR_EN, OMAP_DMA_CCR(sound_curr_lch));
+		OMAP_DMA_CCR_REG(sound_curr_lch) &= ~DCCR_EN;
 		ERR("DCSR_ERROR!\n");
 		FN_OUT(-1);
 		return;

sound/oss/omap-audio-dma-intfc.c

@@ -847,8 +847,7 @@ static void sound_dma_irq_handler(int sound_curr_lch, u16 ch_status, void *data)
 		ch_status, dma_status, data);
 
 	if (dma_status & (DCSR_ERROR)) {
-		omap_writew(omap_readw(OMAP_DMA_CCR(sound_curr_lch)) & ~DCCR_EN,
-			    OMAP_DMA_CCR(sound_curr_lch));
+		OMAP_DMA_CCR_REG(sound_curr_lch) &= ~DCCR_EN;
 		ERR("DCSR_ERROR!\n");
 		FN_OUT(-1);
 		return;