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linux
linux-davinci-2.6.23
Commits
ac111bfa
Commit
ac111bfa
authored
Nov 09, 2005
by
Linus Torvalds
Browse files
Options
Browse Files
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Plain Diff
Merge master.kernel.org:/home/rmk/linux-2.6-arm
parents
19da9b8b
861e37ad
Changes
16
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Inline
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Showing
16 changed files
with
379 additions
and
24 deletions
+379
-24
arch/arm/Kconfig
arch/arm/Kconfig
+1
-1
arch/arm/kernel/process.c
arch/arm/kernel/process.c
+1
-1
arch/arm/lib/bitops.h
arch/arm/lib/bitops.h
+2
-2
arch/arm/mach-realview/Makefile
arch/arm/mach-realview/Makefile
+2
-0
arch/arm/mach-realview/core.c
arch/arm/mach-realview/core.c
+1
-1
arch/arm/mach-realview/hotplug.c
arch/arm/mach-realview/hotplug.c
+138
-0
arch/arm/mach-realview/localtimer.c
arch/arm/mach-realview/localtimer.c
+130
-0
arch/arm/mach-realview/platsmp.c
arch/arm/mach-realview/platsmp.c
+5
-0
arch/arm/mach-s3c2410/mach-anubis.c
arch/arm/mach-s3c2410/mach-anubis.c
+42
-9
arch/arm/mach-s3c2410/mach-rx3715.c
arch/arm/mach-s3c2410/mach-rx3715.c
+11
-2
arch/arm/mach-s3c2410/mach-smdk2440.c
arch/arm/mach-s3c2410/mach-smdk2440.c
+21
-2
include/asm-arm/arch-realview/entry-macro.S
include/asm-arm/arch-realview/entry-macro.S
+11
-0
include/asm-arm/arch-realview/irqs.h
include/asm-arm/arch-realview/irqs.h
+3
-0
include/asm-arm/arch-realview/platform.h
include/asm-arm/arch-realview/platform.h
+2
-3
include/asm-arm/assembler.h
include/asm-arm/assembler.h
+6
-3
include/asm-arm/mach/flash.h
include/asm-arm/mach/flash.h
+3
-0
No files found.
arch/arm/Kconfig
View file @
ac111bfa
...
...
@@ -358,7 +358,7 @@ config HOTPLUG_CPU
config LOCAL_TIMERS
bool "Use local timer interrupts"
depends on SMP &&
n
depends on SMP &&
REALVIEW_MPCORE
default y
help
Enable support for local timers on SMP platforms, rather then the
...
...
arch/arm/kernel/process.c
View file @
ac111bfa
...
...
@@ -359,7 +359,7 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long stack_start,
struct
thread_info
*
thread
=
p
->
thread_info
;
struct
pt_regs
*
childregs
;
childregs
=
(
(
struct
pt_regs
*
)((
unsigned
long
)
thread
+
THREAD_START_SP
))
-
1
;
childregs
=
(
void
*
)
thread
+
THREAD_START_SP
-
sizeof
(
*
regs
)
;
*
childregs
=
*
regs
;
childregs
->
ARM_r0
=
0
;
childregs
->
ARM_sp
=
stack_start
;
...
...
arch/arm/lib/bitops.h
View file @
ac111bfa
...
...
@@ -34,7 +34,7 @@
and
r2
,
r0
,
#
7
mov
r3
,
#
1
mov
r3
,
r3
,
lsl
r2
save_and_disable_irqs
ip
,
r2
save_and_disable_irqs
ip
ldrb
r2
,
[
r1
,
r0
,
lsr
#
3
]
\
instr
r2
,
r2
,
r3
strb
r2
,
[
r1
,
r0
,
lsr
#
3
]
...
...
@@ -54,7 +54,7 @@
add
r1
,
r1
,
r0
,
lsr
#
3
and
r3
,
r0
,
#
7
mov
r0
,
#
1
save_and_disable_irqs
ip
,
r2
save_and_disable_irqs
ip
ldrb
r2
,
[
r1
]
tst
r2
,
r0
,
lsl
r3
\
instr
r2
,
r2
,
r0
,
lsl
r3
...
...
arch/arm/mach-realview/Makefile
View file @
ac111bfa
...
...
@@ -5,3 +5,5 @@
obj-y
:=
core.o clock.o
obj-$(CONFIG_MACH_REALVIEW_EB)
+=
realview_eb.o
obj-$(CONFIG_SMP)
+=
platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU)
+=
hotplug.o
obj-$(CONFIG_LOCAL_TIMERS)
+=
localtimer.o
arch/arm/mach-realview/core.c
View file @
ac111bfa
...
...
@@ -550,7 +550,7 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id, struct pt_reg
timer_tick
(
regs
);
#if
def CONFIG_SMP
#if
defined(CONFIG_SMP) && !defined(CONFIG_LOCAL_TIMERS)
smp_send_timer
();
update_process_times
(
user_mode
(
regs
));
#endif
...
...
arch/arm/mach-realview/hotplug.c
0 → 100644
View file @
ac111bfa
/*
* linux/arch/arm/mach-realview/hotplug.c
*
* Copyright (C) 2002 ARM Ltd.
* All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/smp.h>
#include <linux/completion.h>
extern
volatile
int
pen_release
;
static
DECLARE_COMPLETION
(
cpu_killed
);
static
inline
void
cpu_enter_lowpower
(
void
)
{
unsigned
int
v
;
asm
volatile
(
"mcr p15, 0, %1, c7, c14, 0
\n
"
" mcr p15, 0, %1, c7, c5, 0
\n
"
" mcr p15, 0, %1, c7, c10, 4
\n
"
/*
* Turn off coherency
*/
" mrc p15, 0, %0, c1, c0, 1
\n
"
" bic %0, %0, #0x20
\n
"
" mcr p15, 0, %0, c1, c0, 1
\n
"
" mrc p15, 0, %0, c1, c0, 0
\n
"
" bic %0, %0, #0x04
\n
"
" mcr p15, 0, %0, c1, c0, 0
\n
"
:
"=&r"
(
v
)
:
"r"
(
0
)
:
"cc"
);
}
static
inline
void
cpu_leave_lowpower
(
void
)
{
unsigned
int
v
;
asm
volatile
(
"mrc p15, 0, %0, c1, c0, 0
\n
"
" orr %0, %0, #0x04
\n
"
" mcr p15, 0, %0, c1, c0, 0
\n
"
" mrc p15, 0, %0, c1, c0, 1
\n
"
" orr %0, %0, #0x20
\n
"
" mcr p15, 0, %0, c1, c0, 1
\n
"
:
"=&r"
(
v
)
:
:
"cc"
);
}
static
inline
void
platform_do_lowpower
(
unsigned
int
cpu
)
{
/*
* there is no power-control hardware on this platform, so all
* we can do is put the core into WFI; this is safe as the calling
* code will have already disabled interrupts
*/
for
(;;)
{
/*
* here's the WFI
*/
asm
(
".word 0xe320f003
\n
"
:
:
:
"memory"
,
"cc"
);
if
(
pen_release
==
cpu
)
{
/*
* OK, proper wakeup, we're done
*/
break
;
}
/*
* getting here, means that we have come out of WFI without
* having been woken up - this shouldn't happen
*
* The trouble is, letting people know about this is not really
* possible, since we are currently running incoherently, and
* therefore cannot safely call printk() or anything else
*/
#ifdef DEBUG
printk
(
"CPU%u: spurious wakeup call
\n
"
,
cpu
);
#endif
}
}
int
platform_cpu_kill
(
unsigned
int
cpu
)
{
return
wait_for_completion_timeout
(
&
cpu_killed
,
5000
);
}
/*
* platform-specific code to shutdown a CPU
*
* Called with IRQs disabled
*/
void
platform_cpu_die
(
unsigned
int
cpu
)
{
#ifdef DEBUG
unsigned
int
this_cpu
=
hard_smp_processor_id
();
if
(
cpu
!=
this_cpu
)
{
printk
(
KERN_CRIT
"Eek! platform_cpu_die running on %u, should be %u
\n
"
,
this_cpu
,
cpu
);
BUG
();
}
#endif
printk
(
KERN_NOTICE
"CPU%u: shutdown
\n
"
,
cpu
);
complete
(
&
cpu_killed
);
/*
* we're ready for shutdown now, so do it
*/
cpu_enter_lowpower
();
platform_do_lowpower
(
cpu
);
/*
* bring this CPU back into the world of cache
* coherency, and then restore interrupts
*/
cpu_leave_lowpower
();
}
int
mach_cpu_disable
(
unsigned
int
cpu
)
{
/*
* we don't allow CPU 0 to be shutdown (it is still too special
* e.g. clock tick interrupts)
*/
return
cpu
==
0
?
-
EPERM
:
0
;
}
arch/arm/mach-realview/localtimer.c
0 → 100644
View file @
ac111bfa
/*
* linux/arch/arm/mach-realview/localtimer.c
*
* Copyright (C) 2002 ARM Ltd.
* All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/smp.h>
#include <asm/mach/time.h>
#include <asm/hardware/arm_twd.h>
#include <asm/hardware/gic.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include "core.h"
#define TWD_BASE(cpu) (__io_address(REALVIEW_TWD_BASE) + \
((cpu) * REALVIEW_TWD_SIZE))
static
unsigned
long
mpcore_timer_rate
;
/*
* local_timer_ack: checks for a local timer interrupt.
*
* If a local timer interrupt has occured, acknowledge and return 1.
* Otherwise, return 0.
*/
int
local_timer_ack
(
void
)
{
void
__iomem
*
base
=
TWD_BASE
(
smp_processor_id
());
if
(
__raw_readl
(
base
+
TWD_TIMER_INTSTAT
))
{
__raw_writel
(
1
,
base
+
TWD_TIMER_INTSTAT
);
return
1
;
}
return
0
;
}
void
__cpuinit
local_timer_setup
(
unsigned
int
cpu
)
{
void
__iomem
*
base
=
TWD_BASE
(
cpu
);
unsigned
int
load
,
offset
;
u64
waitjiffies
;
unsigned
int
count
;
/*
* If this is the first time round, we need to work out how fast
* the timer ticks
*/
if
(
mpcore_timer_rate
==
0
)
{
printk
(
"Calibrating local timer... "
);
/* Wait for a tick to start */
waitjiffies
=
get_jiffies_64
()
+
1
;
while
(
get_jiffies_64
()
<
waitjiffies
)
udelay
(
10
);
/* OK, now the tick has started, let's get the timer going */
waitjiffies
+=
5
;
/* enable, no interrupt or reload */
__raw_writel
(
0x1
,
base
+
TWD_TIMER_CONTROL
);
/* maximum value */
__raw_writel
(
0xFFFFFFFFU
,
base
+
TWD_TIMER_COUNTER
);
while
(
get_jiffies_64
()
<
waitjiffies
)
udelay
(
10
);
count
=
__raw_readl
(
base
+
TWD_TIMER_COUNTER
);
mpcore_timer_rate
=
(
0xFFFFFFFFU
-
count
)
*
(
HZ
/
5
);
printk
(
"%lu.%02luMHz.
\n
"
,
mpcore_timer_rate
/
1000000
,
(
mpcore_timer_rate
/
100000
)
%
100
);
}
load
=
mpcore_timer_rate
/
HZ
;
__raw_writel
(
load
,
base
+
TWD_TIMER_LOAD
);
__raw_writel
(
0x7
,
base
+
TWD_TIMER_CONTROL
);
/*
* Now maneuver our local tick into the right part of the jiffy.
* Start by working out where within the tick our local timer
* interrupt should go.
*/
offset
=
((
mpcore_timer_rate
/
HZ
)
/
(
NR_CPUS
+
1
))
*
(
cpu
+
1
);
/*
* gettimeoffset() will return a number of us since the last tick.
* Convert this number of us to a local timer tick count.
* Be careful of integer overflow whilst keeping maximum precision.
*
* with HZ=100 and 1MHz (fpga) ~ 1GHz processor:
* load = 1 ~ 10,000
* mpcore_timer_rate/10000 = 100 ~ 100,000
*
* so the multiply value will be less than 10^9 always.
*/
load
=
(
system_timer
->
offset
()
*
(
mpcore_timer_rate
/
10000
))
/
100
;
/* Add on our offset to get the load value */
load
=
(
load
+
offset
)
%
(
mpcore_timer_rate
/
HZ
);
__raw_writel
(
load
,
base
+
TWD_TIMER_COUNTER
);
/* Make sure our local interrupt controller has this enabled */
__raw_writel
(
1
<<
IRQ_LOCALTIMER
,
__io_address
(
REALVIEW_GIC_DIST_BASE
)
+
GIC_DIST_ENABLE_SET
);
}
/*
* take a local timer down
*/
void
__cpuexit
local_timer_stop
(
unsigned
int
cpu
)
{
__raw_writel
(
0
,
TWD_BASE
(
cpu
)
+
TWD_TIMER_CONTROL
);
}
arch/arm/mach-realview/platsmp.c
View file @
ac111bfa
...
...
@@ -174,6 +174,11 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
if
(
max_cpus
>
ncores
)
max_cpus
=
ncores
;
/*
* Enable the local timer for primary CPU
*/
local_timer_setup
(
cpu
);
/*
* Initialise the possible/present maps.
* cpu_possible_map describes the set of CPUs which may be present
...
...
arch/arm/mach-s3c2410/mach-anubis.c
View file @
ac111bfa
...
...
@@ -56,8 +56,16 @@
static
struct
map_desc
anubis_iodesc
[]
__initdata
=
{
/* ISA IO areas */
{
(
u32
)
S3C24XX_VA_ISA_BYTE
,
0x0
,
SZ_16M
,
MT_DEVICE
},
{
(
u32
)
S3C24XX_VA_ISA_WORD
,
0x0
,
SZ_16M
,
MT_DEVICE
},
{
.
virtual
=
(
u32
)
S3C24XX_VA_ISA_BYTE
,
.
pfn
=
__phys_to_pfn
(
0x0
),
.
length
=
SZ_4M
,
.
type
=
MT_DEVICE
},
{
.
virtual
=
(
u32
)
S3C24XX_VA_ISA_WORD
,
.
pfn
=
__phys_to_pfn
(
0x0
),
.
length
=
SZ_4M
,
MT_DEVICE
},
/* we could possibly compress the next set down into a set of smaller tables
* pagetables, but that would mean using an L2 section, and it still means
...
...
@@ -66,16 +74,41 @@ static struct map_desc anubis_iodesc[] __initdata = {
/* CPLD control registers */
{
(
u32
)
ANUBIS_VA_CTRL1
,
ANUBIS_PA_CTRL1
,
SZ_4K
,
MT_DEVICE
},
{
(
u32
)
ANUBIS_VA_CTRL2
,
ANUBIS_PA_CTRL2
,
SZ_4K
,
MT_DEVICE
},
{
.
virtual
=
(
u32
)
ANUBIS_VA_CTRL1
,
.
pfn
=
__phys_to_pfn
(
ANUBIS_PA_CTRL1
),
.
length
=
SZ_4K
,
.
type
=
MT_DEVICE
},
{
.
virtual
=
(
u32
)
ANUBIS_VA_CTRL2
,
.
pfn
=
__phys_to_pfn
(
ANUBIS_PA_CTRL2
),
.
length
=
SZ_4K
,
.
type
=
MT_DEVICE
},
/* IDE drives */
{
(
u32
)
ANUBIS_IDEPRI
,
S3C2410_CS3
,
SZ_1M
,
MT_DEVICE
},
{
(
u32
)
ANUBIS_IDEPRIAUX
,
S3C2410_CS3
+
(
1
<<
26
),
SZ_1M
,
MT_DEVICE
},
{
(
u32
)
ANUBIS_IDESEC
,
S3C2410_CS4
,
SZ_1M
,
MT_DEVICE
},
{
(
u32
)
ANUBIS_IDESECAUX
,
S3C2410_CS4
+
(
1
<<
26
),
SZ_1M
,
MT_DEVICE
},
{
.
virtual
=
(
u32
)
ANUBIS_IDEPRI
,
.
pfn
=
__phys_to_pfn
(
S3C2410_CS3
),
.
length
=
SZ_1M
,
.
type
=
MT_DEVICE
},
{
.
virtual
=
(
u32
)
ANUBIS_IDEPRIAUX
,
.
pfn
=
__phys_to_pfn
(
S3C2410_CS3
+
(
1
<<
26
)),
.
length
=
SZ_1M
,
.
type
=
MT_DEVICE
},
{
.
virtual
=
(
u32
)
ANUBIS_IDESEC
,
.
pfn
=
__phys_to_pfn
(
S3C2410_CS4
),
.
length
=
SZ_1M
,
.
type
=
MT_DEVICE
},
{
.
virtual
=
(
u32
)
ANUBIS_IDESECAUX
,
.
pfn
=
__phys_to_pfn
(
S3C2410_CS4
+
(
1
<<
26
)),
.
length
=
SZ_1M
,
.
type
=
MT_DEVICE
},
};
#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
...
...
arch/arm/mach-s3c2410/mach-rx3715.c
View file @
ac111bfa
...
...
@@ -56,8 +56,17 @@
static
struct
map_desc
rx3715_iodesc
[]
__initdata
=
{
/* dump ISA space somewhere unused */
{
(
u32
)
S3C24XX_VA_ISA_WORD
,
S3C2410_CS3
,
SZ_16M
,
MT_DEVICE
},
{
(
u32
)
S3C24XX_VA_ISA_BYTE
,
S3C2410_CS3
,
SZ_16M
,
MT_DEVICE
},
{
.
virtual
=
(
u32
)
S3C24XX_VA_ISA_WORD
,
.
pfn
=
__phys_to_pfn
(
S3C2410_CS3
),
.
length
=
SZ_1M
,
.
type
=
MT_DEVICE
,
},
{
.
virtual
=
(
u32
)
S3C24XX_VA_ISA_BYTE
,
.
pfn
=
__phys_to_pfn
(
S3C2410_CS3
),
.
length
=
SZ_1M
,
.
type
=
MT_DEVICE
,
},
};
...
...
arch/arm/mach-s3c2410/mach-smdk2440.c
View file @
ac111bfa
...
...
@@ -58,8 +58,27 @@
static
struct
map_desc
smdk2440_iodesc
[]
__initdata
=
{
/* ISA IO Space map (memory space selected by A24) */
{
(
u32
)
S3C24XX_VA_ISA_WORD
,
S3C2410_CS2
,
SZ_16M
,
MT_DEVICE
},
{
(
u32
)
S3C24XX_VA_ISA_BYTE
,
S3C2410_CS2
,
SZ_16M
,
MT_DEVICE
},
{
.
virtual
=
(
u32
)
S3C24XX_VA_ISA_WORD
,
.
pfn
=
__phys_to_pfn
(
S3C2410_CS2
),
.
length
=
0x10000
,
.
type
=
MT_DEVICE
,
},
{
.
virtual
=
(
u32
)
S3C24XX_VA_ISA_WORD
+
0x10000
,
.
pfn
=
__phys_to_pfn
(
S3C2410_CS2
+
(
1
<<
24
)),
.
length
=
SZ_4M
,
.
type
=
MT_DEVICE
,
},
{
.
virtual
=
(
u32
)
S3C24XX_VA_ISA_BYTE
,
.
pfn
=
__phys_to_pfn
(
S3C2410_CS2
),
.
length
=
0x10000
,
.
type
=
MT_DEVICE
,
},
{
.
virtual
=
(
u32
)
S3C24XX_VA_ISA_BYTE
+
0x10000
,
.
pfn
=
__phys_to_pfn
(
S3C2410_CS2
+
(
1
<<
24
)),
.
length
=
SZ_4M
,
.
type
=
MT_DEVICE
,
}
};
#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
...
...
include/asm-arm/arch-realview/entry-macro.S
View file @
ac111bfa
...
...
@@ -61,3 +61,14 @@
strcc
\
irqstat
,
[
\
base
,
#
GIC_CPU_EOI
]
cmpcs
\
irqnr
,
\
irqnr
.
endm
/
*
As
above
,
this
assumes
that
irqstat
and
base
are
preserved
..
*/
.
macro
test_for_ltirq
,
irqnr
,
irqstat
,
base
,
tmp
bic
\
irqnr
,
\
irqstat
,
#
0x1c00
mov
\
tmp
,
#
0
cmp
\
irqnr
,
#
29
moveq
\
tmp
,
#
1
streq
\
irqstat
,
[
\
base
,
#
GIC_CPU_EOI
]
cmp
\
tmp
,
#
0
.
endm
include/asm-arm/arch-realview/irqs.h
View file @
ac111bfa
...
...
@@ -21,6 +21,9 @@
#include <asm/arch/platform.h>
#define IRQ_LOCALTIMER 29
#define IRQ_LOCALWDOG 30
/*
* IRQ interrupts definitions are the same the INT definitions
* held within platform.h
...
...
include/asm-arm/arch-realview/platform.h
View file @
ac111bfa
...
...
@@ -209,6 +209,8 @@
#else
#define REALVIEW_MPCORE_SCU_BASE 0x10100000
/* SCU registers */
#define REALVIEW_GIC_CPU_BASE 0x10100100
/* Generic interrupt controller CPU interface */
#define REALVIEW_TWD_BASE 0x10100700
#define REALVIEW_TWD_SIZE 0x00000100
#define REALVIEW_GIC_DIST_BASE 0x10101000
/* Generic interrupt controller distributor */
#endif
#define REALVIEW_SMC_BASE 0x10080000
/* SMC */
...
...
@@ -305,9 +307,6 @@
#define INT_TSPENINT 30
/* Touchscreen pen */
#define INT_TSKPADINT 31
/* Touchscreen keypad */
#else
#define INT_LOCALTIMER 29
#define INT_LOCALWDOG 30
#define INT_AACI 0
#define INT_TIMERINT0_1 1
#define INT_TIMERINT2_3 2
...
...
include/asm-arm/assembler.h
View file @
ac111bfa
...
...
@@ -83,10 +83,13 @@
* Save the current IRQ state and disable IRQs. Note that this macro
* assumes FIQs are enabled, and that the processor is in SVC mode.
*/
.
macro
save_and_disable_irqs
,
oldcpsr
,
temp
.
macro
save_and_disable_irqs
,
oldcpsr
mrs
\
oldcpsr
,
cpsr
mov
\
temp
,
#
PSR_I_BIT
|
MODE_SVC
msr
cpsr_c
,
\
temp
#if __LINUX_ARM_ARCH__ >= 6
cpsid
i
#else
msr
cpsr_c
,
#
PSR_I_BIT
|
MODE_SVC
#endif
.
endm
/*
...
...
include/asm-arm/mach/flash.h
View file @
ac111bfa
...
...
@@ -11,6 +11,7 @@
#define ASMARM_MACH_FLASH_H
struct
mtd_partition
;
struct
mtd_info
;
/*
* map_name: the map probe function name
...
...
@@ -19,6 +20,7 @@ struct mtd_partition;
* init: method called at driver/device initialisation
* exit: method called at driver/device removal
* set_vpp: method called to enable or disable VPP
* mmcontrol: method called to enable or disable Sync. Burst Read in OneNAND
* parts: optional array of mtd_partitions for static partitioning
* nr_parts: number of mtd_partitions for static partitoning
*/
...
...
@@ -29,6 +31,7 @@ struct flash_platform_data {
int
(
*
init
)(
void
);
void
(
*
exit
)(
void
);
void
(
*
set_vpp
)(
int
on
);
void
(
*
mmcontrol
)(
struct
mtd_info
*
mtd
,
int
sync_read
);
struct
mtd_partition
*
parts
;
unsigned
int
nr_parts
;
};
...
...
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