Commit 9b3627f3 authored by David S. Miller's avatar David S. Miller

[SPARC64]: Consolidate {sbus,pci}_iommu_arena.

Move to asm-sparc64/iommu.h and rename to plain "iommu_arena".
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 711b360d
...@@ -77,7 +77,7 @@ static inline void iopte_make_dummy(struct pci_iommu *iommu, iopte_t *iopte) ...@@ -77,7 +77,7 @@ static inline void iopte_make_dummy(struct pci_iommu *iommu, iopte_t *iopte)
/* Based largely upon the ppc64 iommu allocator. */ /* Based largely upon the ppc64 iommu allocator. */
static long pci_arena_alloc(struct pci_iommu *iommu, unsigned long npages) static long pci_arena_alloc(struct pci_iommu *iommu, unsigned long npages)
{ {
struct pci_iommu_arena *arena = &iommu->arena; struct iommu_arena *arena = &iommu->arena;
unsigned long n, i, start, end, limit; unsigned long n, i, start, end, limit;
int pass; int pass;
...@@ -116,7 +116,7 @@ again: ...@@ -116,7 +116,7 @@ again:
return n; return n;
} }
static void pci_arena_free(struct pci_iommu_arena *arena, unsigned long base, unsigned long npages) static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages)
{ {
unsigned long i; unsigned long i;
......
...@@ -110,7 +110,7 @@ static inline long pci_iommu_batch_end(void) ...@@ -110,7 +110,7 @@ static inline long pci_iommu_batch_end(void)
return pci_iommu_batch_flush(p); return pci_iommu_batch_flush(p);
} }
static long pci_arena_alloc(struct pci_iommu_arena *arena, unsigned long npages) static long pci_arena_alloc(struct iommu_arena *arena, unsigned long npages)
{ {
unsigned long n, i, start, end, limit; unsigned long n, i, start, end, limit;
int pass; int pass;
...@@ -149,7 +149,7 @@ again: ...@@ -149,7 +149,7 @@ again:
return n; return n;
} }
static void pci_arena_free(struct pci_iommu_arena *arena, unsigned long base, unsigned long npages) static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages)
{ {
unsigned long i; unsigned long i;
...@@ -707,7 +707,7 @@ static void pci_sun4v_scan_bus(struct pci_controller_info *p) ...@@ -707,7 +707,7 @@ static void pci_sun4v_scan_bus(struct pci_controller_info *p)
static unsigned long probe_existing_entries(struct pci_pbm_info *pbm, static unsigned long probe_existing_entries(struct pci_pbm_info *pbm,
struct pci_iommu *iommu) struct pci_iommu *iommu)
{ {
struct pci_iommu_arena *arena = &iommu->arena; struct iommu_arena *arena = &iommu->arena;
unsigned long i, cnt = 0; unsigned long i, cnt = 0;
u32 devhandle; u32 devhandle;
......
...@@ -26,16 +26,10 @@ ...@@ -26,16 +26,10 @@
#define MAP_BASE ((u32)0xc0000000) #define MAP_BASE ((u32)0xc0000000)
struct sbus_iommu_arena {
unsigned long *map;
unsigned int hint;
unsigned int limit;
};
struct sbus_iommu { struct sbus_iommu {
spinlock_t lock; spinlock_t lock;
struct sbus_iommu_arena arena; struct iommu_arena arena;
iopte_t *page_table; iopte_t *page_table;
unsigned long strbuf_regs; unsigned long strbuf_regs;
...@@ -123,7 +117,7 @@ static void sbus_strbuf_flush(struct sbus_iommu *iommu, u32 base, unsigned long ...@@ -123,7 +117,7 @@ static void sbus_strbuf_flush(struct sbus_iommu *iommu, u32 base, unsigned long
/* Based largely upon the ppc64 iommu allocator. */ /* Based largely upon the ppc64 iommu allocator. */
static long sbus_arena_alloc(struct sbus_iommu *iommu, unsigned long npages) static long sbus_arena_alloc(struct sbus_iommu *iommu, unsigned long npages)
{ {
struct sbus_iommu_arena *arena = &iommu->arena; struct iommu_arena *arena = &iommu->arena;
unsigned long n, i, start, end, limit; unsigned long n, i, start, end, limit;
int pass; int pass;
...@@ -162,7 +156,7 @@ again: ...@@ -162,7 +156,7 @@ again:
return n; return n;
} }
static void sbus_arena_free(struct sbus_iommu_arena *arena, unsigned long base, unsigned long npages) static void sbus_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages)
{ {
unsigned long i; unsigned long i;
......
...@@ -7,15 +7,21 @@ ...@@ -7,15 +7,21 @@
#define _SPARC64_IOMMU_H #define _SPARC64_IOMMU_H
/* The format of an iopte in the page tables. */ /* The format of an iopte in the page tables. */
#define IOPTE_VALID 0x8000000000000000UL /* IOPTE is valid */ #define IOPTE_VALID 0x8000000000000000UL
#define IOPTE_64K 0x2000000000000000UL /* IOPTE is for 64k page */ #define IOPTE_64K 0x2000000000000000UL
#define IOPTE_STBUF 0x1000000000000000UL /* DVMA can use streaming buffer */ #define IOPTE_STBUF 0x1000000000000000UL
#define IOPTE_INTRA 0x0800000000000000UL /* SBUS slot-->slot direct transfer*/ #define IOPTE_INTRA 0x0800000000000000UL
#define IOPTE_CONTEXT 0x07ff800000000000UL /* Context number */ #define IOPTE_CONTEXT 0x07ff800000000000UL
#define IOPTE_PAGE 0x00007fffffffe000UL /* Physical page number (PA[42:13])*/ #define IOPTE_PAGE 0x00007fffffffe000UL
#define IOPTE_CACHE 0x0000000000000010UL /* Cached (in UPA E-cache) */ #define IOPTE_CACHE 0x0000000000000010UL
#define IOPTE_WRITE 0x0000000000000002UL /* Writeable */ #define IOPTE_WRITE 0x0000000000000002UL
#define IOMMU_NUM_CTXS 4096 #define IOMMU_NUM_CTXS 4096
struct iommu_arena {
unsigned long *map;
unsigned int hint;
unsigned int limit;
};
#endif /* !(_SPARC_IOMMU_H) */ #endif /* !(_SPARC_IOMMU_H) */
...@@ -35,19 +35,13 @@ struct pci_controller_info; ...@@ -35,19 +35,13 @@ struct pci_controller_info;
/* This contains the software state necessary to drive a PCI /* This contains the software state necessary to drive a PCI
* controller's IOMMU. * controller's IOMMU.
*/ */
struct pci_iommu_arena {
unsigned long *map;
unsigned int hint;
unsigned int limit;
};
struct pci_iommu { struct pci_iommu {
/* This protects the controller's IOMMU and all /* This protects the controller's IOMMU and all
* streaming buffers underneath. * streaming buffers underneath.
*/ */
spinlock_t lock; spinlock_t lock;
struct pci_iommu_arena arena; struct iommu_arena arena;
/* IOMMU page table, a linear array of ioptes. */ /* IOMMU page table, a linear array of ioptes. */
iopte_t *page_table; /* The page table itself. */ iopte_t *page_table; /* The page table itself. */
......
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