Commit 8e010a5f authored by Kevin Hilman's avatar Kevin Hilman

Merge latest MUSB cleanups from OMAP tree.

parents de536cfe 0ba25d3a
This diff is collapsed.
...@@ -62,11 +62,11 @@ struct cppi_channel { ...@@ -62,11 +62,11 @@ struct cppi_channel {
struct dma_channel Channel; struct dma_channel Channel;
/* back pointer to the Dma Controller structure */ /* back pointer to the Dma Controller structure */
struct cppi *pController; struct cppi *controller;
/* which direction of which endpoint? */ /* which direction of which endpoint? */
struct musb_hw_ep *hw_ep; struct musb_hw_ep *hw_ep;
u8 bTransmit; u8 transmit;
u8 chNo; u8 chNo;
/* DMA modes: RNDIS or "transparent" */ /* DMA modes: RNDIS or "transparent" */
......
...@@ -77,16 +77,16 @@ void musb_platform_enable(struct musb *musb) ...@@ -77,16 +77,16 @@ void musb_platform_enable(struct musb *musb)
u32 tmp, old, val; u32 tmp, old, val;
/* workaround: setup irqs through both register sets */ /* workaround: setup irqs through both register sets */
tmp = (musb->wEndMask & DAVINCI_USB_TX_ENDPTS_MASK) tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK)
<< DAVINCI_USB_TXINT_SHIFT; << DAVINCI_USB_TXINT_SHIFT;
musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
old = tmp; old = tmp;
tmp = (musb->wEndMask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK)) tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK))
<< DAVINCI_USB_RXINT_SHIFT; << DAVINCI_USB_RXINT_SHIFT;
musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
tmp |= old; tmp |= old;
val = ~MGC_M_INTR_SOF; val = ~MUSB_INTR_SOF;
tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT); tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT);
musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
...@@ -116,7 +116,7 @@ void musb_platform_disable(struct musb *musb) ...@@ -116,7 +116,7 @@ void musb_platform_disable(struct musb *musb)
DAVINCI_USB_USBINT_MASK DAVINCI_USB_USBINT_MASK
| DAVINCI_USB_TXINT_MASK | DAVINCI_USB_TXINT_MASK
| DAVINCI_USB_RXINT_MASK); | DAVINCI_USB_RXINT_MASK);
musb_writeb(musb->mregs, MGC_O_HDRC_DEVCTL, 0); musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0); musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
if (is_dma_capable() && !dma_off) if (is_dma_capable() && !dma_off)
...@@ -207,7 +207,7 @@ static void otg_timer(unsigned long _musb) ...@@ -207,7 +207,7 @@ static void otg_timer(unsigned long _musb)
/* We poll because DaVinci's won't expose several OTG-critical /* We poll because DaVinci's won't expose several OTG-critical
* status change events (from the transceiver) otherwise. * status change events (from the transceiver) otherwise.
*/ */
devctl = musb_readb(mregs, MGC_O_HDRC_DEVCTL); devctl = musb_readb(mregs, MUSB_DEVCTL);
DBG(7, "poll devctl %02x (%s)\n", devctl, otg_state_string(musb)); DBG(7, "poll devctl %02x (%s)\n", devctl, otg_state_string(musb));
spin_lock_irqsave(&musb->lock, flags); spin_lock_irqsave(&musb->lock, flags);
...@@ -218,13 +218,13 @@ static void otg_timer(unsigned long _musb) ...@@ -218,13 +218,13 @@ static void otg_timer(unsigned long _musb)
* case "recover"), in routine "VBUS was valid by the time * case "recover"), in routine "VBUS was valid by the time
* VBUSERR got reported during enumeration" cases. * VBUSERR got reported during enumeration" cases.
*/ */
if (devctl & MGC_M_DEVCTL_VBUS) { if (devctl & MUSB_DEVCTL_VBUS) {
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
break; break;
} }
musb->xceiv.state = OTG_STATE_A_WAIT_VRISE; musb->xceiv.state = OTG_STATE_A_WAIT_VRISE;
musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
MGC_M_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT); MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
break; break;
case OTG_STATE_B_IDLE: case OTG_STATE_B_IDLE:
if (!is_peripheral_enabled(musb)) if (!is_peripheral_enabled(musb))
...@@ -241,10 +241,10 @@ static void otg_timer(unsigned long _musb) ...@@ -241,10 +241,10 @@ static void otg_timer(unsigned long _musb)
* NOTE setting the session flag is _supposed_ to trigger * NOTE setting the session flag is _supposed_ to trigger
* SRP, but clearly it doesn't. * SRP, but clearly it doesn't.
*/ */
musb_writeb(mregs, MGC_O_HDRC_DEVCTL, musb_writeb(mregs, MUSB_DEVCTL,
devctl | MGC_M_DEVCTL_SESSION); devctl | MUSB_DEVCTL_SESSION);
devctl = musb_readb(mregs, MGC_O_HDRC_DEVCTL); devctl = musb_readb(mregs, MUSB_DEVCTL);
if (devctl & MGC_M_DEVCTL_BDEVICE) if (devctl & MUSB_DEVCTL_BDEVICE)
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
else else
musb->xceiv.state = OTG_STATE_A_IDLE; musb->xceiv.state = OTG_STATE_A_IDLE;
...@@ -310,11 +310,11 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci) ...@@ -310,11 +310,11 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci)
if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) { if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) {
int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG); int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);
void *__iomem mregs = musb->mregs; void *__iomem mregs = musb->mregs;
u8 devctl = musb_readb(mregs, MGC_O_HDRC_DEVCTL); u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
int err = musb->int_usb & MGC_M_INTR_VBUSERROR; int err = musb->int_usb & MUSB_INTR_VBUSERROR;
err = is_host_enabled(musb) err = is_host_enabled(musb)
&& (musb->int_usb & MGC_M_INTR_VBUSERROR); && (musb->int_usb & MUSB_INTR_VBUSERROR);
if (err) { if (err) {
/* The Mentor core doesn't debounce VBUS as needed /* The Mentor core doesn't debounce VBUS as needed
* to cope with device connect current spikes. This * to cope with device connect current spikes. This
...@@ -326,7 +326,7 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci) ...@@ -326,7 +326,7 @@ static irqreturn_t davinci_interrupt(int irq, void *__hci)
* without waiting (on EVM, a **long** time) for VBUS * without waiting (on EVM, a **long** time) for VBUS
* to stop registering in devctl. * to stop registering in devctl.
*/ */
musb->int_usb &= ~MGC_M_INTR_VBUSERROR; musb->int_usb &= ~MUSB_INTR_VBUSERROR;
musb->xceiv.state = OTG_STATE_A_WAIT_VFALL; musb->xceiv.state = OTG_STATE_A_WAIT_VFALL;
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
WARN("VBUS error workaround (delay coming)\n"); WARN("VBUS error workaround (delay coming)\n");
...@@ -440,19 +440,19 @@ int musb_platform_exit(struct musb *musb) ...@@ -440,19 +440,19 @@ int musb_platform_exit(struct musb *musb)
* long time to fall, especially on EVM with huge C133. * long time to fall, especially on EVM with huge C133.
*/ */
do { do {
devctl = musb_readb(musb->mregs, MGC_O_HDRC_DEVCTL); devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
if (!(devctl & MGC_M_DEVCTL_VBUS)) if (!(devctl & MUSB_DEVCTL_VBUS))
break; break;
if ((devctl & MGC_M_DEVCTL_VBUS) != warn) { if ((devctl & MUSB_DEVCTL_VBUS) != warn) {
warn = devctl & MGC_M_DEVCTL_VBUS; warn = devctl & MUSB_DEVCTL_VBUS;
DBG(1, "VBUS %d\n", warn >> MGC_S_DEVCTL_VBUS); DBG(1, "VBUS %d\n", warn >> MUSB_DEVCTL_VBUS_SHIFT);
} }
msleep(1000); msleep(1000);
maxdelay--; maxdelay--;
} while (maxdelay > 0); } while (maxdelay > 0);
/* in OTG mode, another host might be connected */ /* in OTG mode, another host might be connected */
if (devctl & MGC_M_DEVCTL_VBUS) if (devctl & MUSB_DEVCTL_VBUS)
DBG(1, "VBUS off timeout (devctl %02x)\n", devctl); DBG(1, "VBUS off timeout (devctl %02x)\n", devctl);
} }
......
/****************************************************************** /*
* MUSB OTG driver debug defines
*
* Copyright 2005 Mentor Graphics Corporation * Copyright 2005 Mentor Graphics Corporation
* Copyright (C) 2005-2006 by Texas Instruments * Copyright (C) 2005-2006 by Texas Instruments
* Copyright (C) 2006-2007 Nokia Corporation
* *
* This file is part of the Inventra Controller Driver for Linux. * This program is free software; you can redistribute it and/or
* * modify it under the terms of the GNU General Public License
* The Inventra Controller Driver for Linux is free software; you * version 2 as published by the Free Software Foundation.
* can redistribute it and/or modify it under the terms of the GNU
* General Public License version 2 as published by the Free Software
* Foundation.
* *
* The Inventra Controller Driver for Linux is distributed in * This program is distributed in the hope that it will be useful, but
* the hope that it will be useful, but WITHOUT ANY WARRANTY; * WITHOUT ANY WARRANTY; without even the implied warranty of
* without even the implied warranty of MERCHANTABILITY or * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public * General Public License for more details.
* License for more details.
* *
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with The Inventra Controller Driver for Linux ; if not, * along with this program; if not, write to the Free Software
* write to the Free Software Foundation, Inc., 59 Temple Place, * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* Suite 330, Boston, MA 02111-1307 USA * 02110-1301 USA
*
* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
* ANY DOWNLOAD, USE, REPRODUCTION, MODIFICATION OR DISTRIBUTION */
* OF THIS DRIVER INDICATES YOUR COMPLETE AND UNCONDITIONAL ACCEPTANCE
* OF THOSE TERMS.THIS DRIVER IS PROVIDED "AS IS" AND MENTOR GRAPHICS
* MAKES NO WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THIS DRIVER.
* MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES
* OF MERCHANTABILITY; FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. MENTOR GRAPHICS DOES NOT PROVIDE SUPPORT
* SERVICES OR UPDATES FOR THIS DRIVER, EVEN IF YOU ARE A MENTOR
* GRAPHICS SUPPORT CUSTOMER.
******************************************************************/
#ifndef __MUSB_LINUX_DEBUG_H__ #ifndef __MUSB_LINUX_DEBUG_H__
#define __MUSB_LINUX_DEBUG_H__ #define __MUSB_LINUX_DEBUG_H__
......
/****************************************************************** /*
* MUSB OTG driver DMA controller abstraction
*
* Copyright 2005 Mentor Graphics Corporation * Copyright 2005 Mentor Graphics Corporation
* Copyright (C) 2005-2006 by Texas Instruments * Copyright (C) 2005-2006 by Texas Instruments
* Copyright (C) 2006-2007 Nokia Corporation
* *
* This file is part of the Inventra Controller Driver for Linux. * This program is free software; you can redistribute it and/or
* * modify it under the terms of the GNU General Public License
* The Inventra Controller Driver for Linux is free software; you * version 2 as published by the Free Software Foundation.
* can redistribute it and/or modify it under the terms of the GNU
* General Public License version 2 as published by the Free Software
* Foundation.
* *
* The Inventra Controller Driver for Linux is distributed in * This program is distributed in the hope that it will be useful, but
* the hope that it will be useful, but WITHOUT ANY WARRANTY; * WITHOUT ANY WARRANTY; without even the implied warranty of
* without even the implied warranty of MERCHANTABILITY or * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public * General Public License for more details.
* License for more details.
* *
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with The Inventra Controller Driver for Linux ; if not, * along with this program; if not, write to the Free Software
* write to the Free Software Foundation, Inc., 59 Temple Place, * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* Suite 330, Boston, MA 02111-1307 USA * 02110-1301 USA
* *
* ANY DOWNLOAD, USE, REPRODUCTION, MODIFICATION OR DISTRIBUTION * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* OF THIS DRIVER INDICATES YOUR COMPLETE AND UNCONDITIONAL ACCEPTANCE * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* OF THOSE TERMS.THIS DRIVER IS PROVIDED "AS IS" AND MENTOR GRAPHICS * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* MAKES NO WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THIS DRIVER. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* OF MERCHANTABILITY; FITNESS FOR A PARTICULAR PURPOSE AND * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* NON-INFRINGEMENT. MENTOR GRAPHICS DOES NOT PROVIDE SUPPORT * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* SERVICES OR UPDATES FOR THIS DRIVER, EVEN IF YOU ARE A MENTOR * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* GRAPHICS SUPPORT CUSTOMER. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
******************************************************************/ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef __MUSB_DMA_H__ #ifndef __MUSB_DMA_H__
#define __MUSB_DMA_H__ #define __MUSB_DMA_H__
...@@ -85,15 +86,15 @@ struct musb_hw_ep; ...@@ -85,15 +86,15 @@ struct musb_hw_ep;
*/ */
enum dma_channel_status { enum dma_channel_status {
/* unallocated */ /* unallocated */
MGC_DMA_STATUS_UNKNOWN, MUSB_DMA_STATUS_UNKNOWN,
/* allocated ... but not busy, no errors */ /* allocated ... but not busy, no errors */
MGC_DMA_STATUS_FREE, MUSB_DMA_STATUS_FREE,
/* busy ... transactions are active */ /* busy ... transactions are active */
MGC_DMA_STATUS_BUSY, MUSB_DMA_STATUS_BUSY,
/* transaction(s) aborted due to ... dma or memory bus error */ /* transaction(s) aborted due to ... dma or memory bus error */
MGC_DMA_STATUS_BUS_ABORT, MUSB_DMA_STATUS_BUS_ABORT,
/* transaction(s) aborted due to ... core error or USB fault */ /* transaction(s) aborted due to ... core error or USB fault */
MGC_DMA_STATUS_CORE_ABORT MUSB_DMA_STATUS_CORE_ABORT
}; };
struct dma_controller; struct dma_controller;
...@@ -101,7 +102,7 @@ struct dma_controller; ...@@ -101,7 +102,7 @@ struct dma_controller;
/** /**
* struct dma_channel - A DMA channel. * struct dma_channel - A DMA channel.
* @private_data: channel-private data * @private_data: channel-private data
* @wMaxLength: the maximum number of bytes the channel can move in one * @max_len: the maximum number of bytes the channel can move in one
* transaction (typically representing many USB maximum-sized packets) * transaction (typically representing many USB maximum-sized packets)
* @actual_len: how many bytes have been transferred * @actual_len: how many bytes have been transferred
* @status: current channel status (updated e.g. on interrupt) * @status: current channel status (updated e.g. on interrupt)
...@@ -119,27 +120,6 @@ struct dma_channel { ...@@ -119,27 +120,6 @@ struct dma_channel {
u8 desired_mode; u8 desired_mode;
}; };
/*
* Program a DMA channel to move data at the core's request.
* The local core endpoint and direction should already be known,
* since they are specified in the channel_alloc call.
*
* @channel: pointer to a channel obtained by channel_alloc
* @maxpacket: the maximum packet size
* @mode: TRUE if mode 1; FALSE if mode 0
* @dma_addr: base address of data (in DMA space)
* @length: the number of bytes to transfer; no larger than the channel's
* reported max_len
*
* Returns TRUE on success, else FALSE
*/
typedef int (*dma_program_channel) (
struct dma_channel *channel,
u16 maxpacket,
u8 mode,
dma_addr_t dma_addr,
u32 length);
/* /*
* dma_channel_status - return status of dma channel * dma_channel_status - return status of dma channel
* @c: the channel * @c: the channel
...@@ -151,7 +131,7 @@ typedef int (*dma_program_channel) ( ...@@ -151,7 +131,7 @@ typedef int (*dma_program_channel) (
static inline enum dma_channel_status static inline enum dma_channel_status
dma_channel_status(struct dma_channel *c) dma_channel_status(struct dma_channel *c)
{ {
return (is_dma_capable() && c) ? c->status : MGC_DMA_STATUS_UNKNOWN; return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
} }
/** /**
...@@ -175,12 +155,15 @@ struct dma_controller { ...@@ -175,12 +155,15 @@ struct dma_controller {
struct dma_channel *(*channel_alloc)(struct dma_controller *, struct dma_channel *(*channel_alloc)(struct dma_controller *,
struct musb_hw_ep *, u8 is_tx); struct musb_hw_ep *, u8 is_tx);
void (*channel_release)(struct dma_channel *); void (*channel_release)(struct dma_channel *);
dma_program_channel channel_program; int (*channel_program)(struct dma_channel *channel,
u16 maxpacket, u8 mode,
dma_addr_t dma_addr,
u32 length);
int (*channel_abort)(struct dma_channel *); int (*channel_abort)(struct dma_channel *);
}; };
/* called after channel_program(), may indicate a fault */ /* called after channel_program(), may indicate a fault */
extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 bTransmit); extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
extern struct dma_controller *__init extern struct dma_controller *__init
......
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/****************************************************************** /*
* MUSB OTG driver peripheral defines
*
* Copyright 2005 Mentor Graphics Corporation * Copyright 2005 Mentor Graphics Corporation
* Copyright (C) 2005-2006 by Texas Instruments * Copyright (C) 2005-2006 by Texas Instruments
* Copyright (C) 2006-2007 Nokia Corporation
* *
* This file is part of the Inventra Controller Driver for Linux. * This program is free software; you can redistribute it and/or
* * modify it under the terms of the GNU General Public License
* The Inventra Controller Driver for Linux is free software; you * version 2 as published by the Free Software Foundation.
* can redistribute it and/or modify it under the terms of the GNU
* General Public License version 2 as published by the Free Software
* Foundation.
* *
* The Inventra Controller Driver for Linux is distributed in * This program is distributed in the hope that it will be useful, but
* the hope that it will be useful, but WITHOUT ANY WARRANTY; * WITHOUT ANY WARRANTY; without even the implied warranty of
* without even the implied warranty of MERCHANTABILITY or * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public * General Public License for more details.
* License for more details.
* *
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with The Inventra Controller Driver for Linux ; if not, * along with this program; if not, write to the Free Software
* write to the Free Software Foundation, Inc., 59 Temple Place, * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* Suite 330, Boston, MA 02111-1307 USA * 02110-1301 USA
* *
* ANY DOWNLOAD, USE, REPRODUCTION, MODIFICATION OR DISTRIBUTION * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* OF THIS DRIVER INDICATES YOUR COMPLETE AND UNCONDITIONAL ACCEPTANCE * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* OF THOSE TERMS.THIS DRIVER IS PROVIDED "AS IS" AND MENTOR GRAPHICS * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* MAKES NO WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THIS DRIVER. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* OF MERCHANTABILITY; FITNESS FOR A PARTICULAR PURPOSE AND * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* NON-INFRINGEMENT. MENTOR GRAPHICS DOES NOT PROVIDE SUPPORT * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* SERVICES OR UPDATES FOR THIS DRIVER, EVEN IF YOU ARE A MENTOR * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* GRAPHICS SUPPORT CUSTOMER. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
******************************************************************/ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef __MUSB_GADGET_H #ifndef __MUSB_GADGET_H
#define __MUSB_GADGET_H #define __MUSB_GADGET_H
......
This diff is collapsed.
/****************************************************************** /*
* MUSB OTG driver host defines
*
* Copyright 2005 Mentor Graphics Corporation * Copyright 2005 Mentor Graphics Corporation
* Copyright (C) 2005-2006 by Texas Instruments * Copyright (C) 2005-2006 by Texas Instruments
* Copyright (C) 2006-2007 Nokia Corporation
* *
* This file is part of the Inventra Controller Driver for Linux. * This program is free software; you can redistribute it and/or
* * modify it under the terms of the GNU General Public License
* The Inventra Controller Driver for Linux is free software; you * version 2 as published by the Free Software Foundation.
* can redistribute it and/or modify it under the terms of the GNU
* General Public License version 2 as published by the Free Software
* Foundation.
* *
* The Inventra Controller Driver for Linux is distributed in * This program is distributed in the hope that it will be useful, but
* the hope that it will be useful, but WITHOUT ANY WARRANTY; * WITHOUT ANY WARRANTY; without even the implied warranty of
* without even the implied warranty of MERCHANTABILITY or * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public * General Public License for more details.
* License for more details.
* *
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with The Inventra Controller Driver for Linux ; if not, * along with this program; if not, write to the Free Software
* write to the Free Software Foundation, Inc., 59 Temple Place, * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* Suite 330, Boston, MA 02111-1307 USA * 02110-1301 USA
* *
* ANY DOWNLOAD, USE, REPRODUCTION, MODIFICATION OR DISTRIBUTION * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* OF THIS DRIVER INDICATES YOUR COMPLETE AND UNCONDITIONAL ACCEPTANCE * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* OF THOSE TERMS.THIS DRIVER IS PROVIDED "AS IS" AND MENTOR GRAPHICS * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* MAKES NO WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THIS DRIVER. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* OF MERCHANTABILITY; FITNESS FOR A PARTICULAR PURPOSE AND * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* NON-INFRINGEMENT. MENTOR GRAPHICS DOES NOT PROVIDE SUPPORT * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* SERVICES OR UPDATES FOR THIS DRIVER, EVEN IF YOU ARE A MENTOR * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* GRAPHICS SUPPORT CUSTOMER. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
******************************************************************/ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef _MUSB_HOST_H #ifndef _MUSB_HOST_H
#define _MUSB_HOST_H #define _MUSB_HOST_H
......
/****************************************************************** /*
* MUSB OTG driver debug support
*
* Copyright 2005 Mentor Graphics Corporation * Copyright 2005 Mentor Graphics Corporation
* Copyright (C) 2005-2006 by Texas Instruments * Copyright (C) 2005-2006 by Texas Instruments
* Copyright (C) 2006-2007 Nokia Corporation
* *
* This file is part of the Inventra Controller Driver for Linux. * This program is free software; you can redistribute it and/or
* * modify it under the terms of the GNU General Public License
* The Inventra Controller Driver for Linux is free software; you * version 2 as published by the Free Software Foundation.
* can redistribute it and/or modify it under the terms of the GNU
* General Public License version 2 as published by the Free Software
* Foundation.
* *
* The Inventra Controller Driver for Linux is distributed in * This program is distributed in the hope that it will be useful, but
* the hope that it will be useful, but WITHOUT ANY WARRANTY; * WITHOUT ANY WARRANTY; without even the implied warranty of
* without even the implied warranty of MERCHANTABILITY or * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public * General Public License for more details.
* License for more details.
* *
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with The Inventra Controller Driver for Linux ; if not, * along with this program; if not, write to the Free Software
* write to the Free Software Foundation, Inc., 59 Temple Place, * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* Suite 330, Boston, MA 02111-1307 USA * 02110-1301 USA
* *
* ANY DOWNLOAD, USE, REPRODUCTION, MODIFICATION OR DISTRIBUTION * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* OF THIS DRIVER INDICATES YOUR COMPLETE AND UNCONDITIONAL ACCEPTANCE * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* OF THOSE TERMS.THIS DRIVER IS PROVIDED "AS IS" AND MENTOR GRAPHICS * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* MAKES NO WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THIS DRIVER. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* OF MERCHANTABILITY; FITNESS FOR A PARTICULAR PURPOSE AND * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* NON-INFRINGEMENT. MENTOR GRAPHICS DOES NOT PROVIDE SUPPORT * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* SERVICES OR UPDATES FOR THIS DRIVER, EVEN IF YOU ARE A MENTOR * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* GRAPHICS SUPPORT CUSTOMER. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
******************************************************************/ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* /*
* Inventra Controller Driver (ICD) for Linux. * Inventra Controller Driver (ICD) for Linux.
...@@ -157,11 +158,11 @@ static int dump_ep(struct musb_ep *ep, char *buffer, unsigned max) ...@@ -157,11 +158,11 @@ static int dump_ep(struct musb_ep *ep, char *buffer, unsigned max)
mode, ep->dma ? " dma" : "", mode, ep->dma ? " dma" : "",
musb_readw(regs, musb_readw(regs,
(ep->is_in || !ep->current_epnum) (ep->is_in || !ep->current_epnum)
? MGC_O_HDRC_TXCSR ? MUSB_TXCSR
: MGC_O_HDRC_RXCSR), : MUSB_RXCSR),
musb_readw(regs, ep->is_in musb_readw(regs, ep->is_in
? MGC_O_HDRC_TXMAXP ? MUSB_TXMAXP
: MGC_O_HDRC_RXMAXP) : MUSB_RXMAXP)
); );
if (code <= 0) if (code <= 0)
break; break;
...@@ -279,20 +280,20 @@ dump_end_info(struct musb *musb, u8 epnum, char *aBuffer, unsigned max) ...@@ -279,20 +280,20 @@ dump_end_info(struct musb *musb, u8 epnum, char *aBuffer, unsigned max)
epnum, epnum,
hw_ep->rx_double_buffered hw_ep->rx_double_buffered
? "2buf" : "1buf", ? "2buf" : "1buf",
musb_readw(regs, MGC_O_HDRC_RXCSR), musb_readw(regs, MUSB_RXCSR),
musb_readb(regs, MGC_O_HDRC_RXINTERVAL), musb_readb(regs, MUSB_RXINTERVAL),
musb_readw(regs, MGC_O_HDRC_RXMAXP), musb_readw(regs, MUSB_RXMAXP),
musb_readb(regs, MGC_O_HDRC_RXTYPE), musb_readb(regs, MUSB_RXTYPE),
/* FIXME: assumes multipoint */ /* FIXME: assumes multipoint */
musb_readb(musb->mregs, musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(epnum, MUSB_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_RXFUNCADDR)), MUSB_RXFUNCADDR)),
musb_readb(musb->mregs, musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(epnum, MUSB_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_RXHUBADDR)), MUSB_RXHUBADDR)),
musb_readb(musb->mregs, musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(epnum, MUSB_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_RXHUBPORT)) MUSB_RXHUBPORT))
); );
if (code <= 0) if (code <= 0)
break; break;
...@@ -367,20 +368,20 @@ dump_end_info(struct musb *musb, u8 epnum, char *aBuffer, unsigned max) ...@@ -367,20 +368,20 @@ dump_end_info(struct musb *musb, u8 epnum, char *aBuffer, unsigned max)
epnum, epnum,
hw_ep->tx_double_buffered hw_ep->tx_double_buffered
? "2buf" : "1buf", ? "2buf" : "1buf",
musb_readw(regs, MGC_O_HDRC_TXCSR), musb_readw(regs, MUSB_TXCSR),
musb_readb(regs, MGC_O_HDRC_TXINTERVAL), musb_readb(regs, MUSB_TXINTERVAL),
musb_readw(regs, MGC_O_HDRC_TXMAXP), musb_readw(regs, MUSB_TXMAXP),
musb_readb(regs, MGC_O_HDRC_TXTYPE), musb_readb(regs, MUSB_TXTYPE),
/* FIXME: assumes multipoint */ /* FIXME: assumes multipoint */
musb_readb(musb->mregs, musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(epnum, MUSB_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_TXFUNCADDR)), MUSB_TXFUNCADDR)),
musb_readb(musb->mregs, musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(epnum, MUSB_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_TXHUBADDR)), MUSB_TXHUBADDR)),
musb_readb(musb->mregs, musb_readb(musb->mregs,
MGC_BUSCTL_OFFSET(epnum, MUSB_BUSCTL_OFFSET(epnum,
MGC_O_HDRC_TXHUBPORT)) MUSB_TXHUBPORT))
); );
if (code <= 0) if (code <= 0)
break; break;
...@@ -491,8 +492,8 @@ static int dump_header_stats(struct musb *musb, char *buffer) ...@@ -491,8 +492,8 @@ static int dump_header_stats(struct musb *musb, char *buffer)
count = sprintf(buffer, "Status: %sHDRC, Mode=%s " count = sprintf(buffer, "Status: %sHDRC, Mode=%s "
"(Power=%02x, DevCtl=%02x)\n", "(Power=%02x, DevCtl=%02x)\n",
(musb->is_multipoint ? "M" : ""), MUSB_MODE(musb), (musb->is_multipoint ? "M" : ""), MUSB_MODE(musb),
musb_readb(mbase, MGC_O_HDRC_POWER), musb_readb(mbase, MUSB_POWER),
musb_readb(mbase, MGC_O_HDRC_DEVCTL)); musb_readb(mbase, MUSB_DEVCTL));
if (count <= 0) if (count <= 0)
return 0; return 0;
buffer += count; buffer += count;
...@@ -536,7 +537,7 @@ static int dump_header_stats(struct musb *musb, char *buffer) ...@@ -536,7 +537,7 @@ static int dump_header_stats(struct musb *musb, char *buffer)
#ifdef CONFIG_USB_GADGET_MUSB_HDRC #ifdef CONFIG_USB_GADGET_MUSB_HDRC
code = sprintf(buffer, "Peripheral address: %02x\n", code = sprintf(buffer, "Peripheral address: %02x\n",
musb_readb(musb, MGC_O_HDRC_FADDR)); musb_readb(musb, MUSB_FADDR));
if (code <= 0) if (code <= 0)
goto done; goto done;
buffer += code; buffer += code;
...@@ -651,7 +652,7 @@ static int musb_proc_write(struct file *file, const char __user *buffer, ...@@ -651,7 +652,7 @@ static int musb_proc_write(struct file *file, const char __user *buffer,
unsigned long count, void *data) unsigned long count, void *data)
{ {
char cmd; char cmd;
u8 bReg; u8 reg;
struct musb *musb = (struct musb *)data; struct musb *musb = (struct musb *)data;
void __iomem *mbase = musb->mregs; void __iomem *mbase = musb->mregs;
...@@ -663,47 +664,47 @@ static int musb_proc_write(struct file *file, const char __user *buffer, ...@@ -663,47 +664,47 @@ static int musb_proc_write(struct file *file, const char __user *buffer,
switch (cmd) { switch (cmd) {
case 'C': case 'C':
if (mbase) { if (mbase) {
bReg = musb_readb(mbase, MGC_O_HDRC_POWER) reg = musb_readb(mbase, MUSB_POWER)
| MGC_M_POWER_SOFTCONN; | MUSB_POWER_SOFTCONN;
musb_writeb(mbase, MGC_O_HDRC_POWER, bReg); musb_writeb(mbase, MUSB_POWER, reg);
} }
break; break;
case 'c': case 'c':
if (mbase) { if (mbase) {
bReg = musb_readb(mbase, MGC_O_HDRC_POWER) reg = musb_readb(mbase, MUSB_POWER)
& ~MGC_M_POWER_SOFTCONN; & ~MUSB_POWER_SOFTCONN;
musb_writeb(mbase, MGC_O_HDRC_POWER, bReg); musb_writeb(mbase, MUSB_POWER, reg);
} }
break; break;
case 'I': case 'I':
if (mbase) { if (mbase) {
bReg = musb_readb(mbase, MGC_O_HDRC_POWER) reg = musb_readb(mbase, MUSB_POWER)
| MGC_M_POWER_HSENAB; | MUSB_POWER_HSENAB;
musb_writeb(mbase, MGC_O_HDRC_POWER, bReg); musb_writeb(mbase, MUSB_POWER, reg);
} }
break; break;
case 'i': case 'i':
if (mbase) { if (mbase) {
bReg = musb_readb(mbase, MGC_O_HDRC_POWER) reg = musb_readb(mbase, MUSB_POWER)
& ~MGC_M_POWER_HSENAB; & ~MUSB_POWER_HSENAB;
musb_writeb(mbase, MGC_O_HDRC_POWER, bReg); musb_writeb(mbase, MUSB_POWER, reg);
} }
break; break;
case 'F': case 'F':
bReg = musb_readb(mbase, MGC_O_HDRC_DEVCTL); reg = musb_readb(mbase, MUSB_DEVCTL);
bReg |= MGC_M_DEVCTL_SESSION; reg |= MUSB_DEVCTL_SESSION;
musb_writeb(mbase, MGC_O_HDRC_DEVCTL, bReg); musb_writeb(mbase, MUSB_DEVCTL, reg);
break; break;
case 'H': case 'H':
if (mbase) { if (mbase) {
bReg = musb_readb(mbase, MGC_O_HDRC_DEVCTL); reg = musb_readb(mbase, MUSB_DEVCTL);
bReg |= MGC_M_DEVCTL_HR; reg |= MUSB_DEVCTL_HR;
musb_writeb(mbase, MGC_O_HDRC_DEVCTL, bReg); musb_writeb(mbase, MUSB_DEVCTL, reg);
//MUSB_HST_MODE( ((struct musb*)data) ); //MUSB_HST_MODE( ((struct musb*)data) );
//WARN("Host Mode\n"); //WARN("Host Mode\n");
} }
...@@ -711,17 +712,17 @@ static int musb_proc_write(struct file *file, const char __user *buffer, ...@@ -711,17 +712,17 @@ static int musb_proc_write(struct file *file, const char __user *buffer,
case 'h': case 'h':
if (mbase) { if (mbase) {
bReg = musb_readb(mbase, MGC_O_HDRC_DEVCTL); reg = musb_readb(mbase, MUSB_DEVCTL);
bReg &= ~MGC_M_DEVCTL_HR; reg &= ~MUSB_DEVCTL_HR;
musb_writeb(mbase, MGC_O_HDRC_DEVCTL, bReg); musb_writeb(mbase, MUSB_DEVCTL, reg);
} }
break; break;
case 'T': case 'T':
if (mbase) { if (mbase) {
musb_load_testpacket(musb); musb_load_testpacket(musb);
musb_writeb(mbase, MGC_O_HDRC_TESTMODE, musb_writeb(mbase, MUSB_TESTMODE,
MGC_M_TEST_PACKET); MUSB_TEST_PACKET);
} }
break; break;
......
/****************************************************************** /*
* MUSB OTG driver defines
*
* Copyright 2005 Mentor Graphics Corporation * Copyright 2005 Mentor Graphics Corporation
* Copyright (C) 2005-2006 by Texas Instruments * Copyright (C) 2005-2006 by Texas Instruments
* Copyright (C) 2006-2007 Nokia Corporation
* *
* This file is part of the Inventra Controller Driver for Linux. * This program is free software; you can redistribute it and/or
* * modify it under the terms of the GNU General Public License
* The Inventra Controller Driver for Linux is free software; you * version 2 as published by the Free Software Foundation.
* can redistribute it and/or modify it under the terms of the GNU
* General Public License version 2 as published by the Free Software
* Foundation.
* *
* The Inventra Controller Driver for Linux is distributed in * This program is distributed in the hope that it will be useful, but
* the hope that it will be useful, but WITHOUT ANY WARRANTY; * WITHOUT ANY WARRANTY; without even the implied warranty of
* without even the implied warranty of MERCHANTABILITY or * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public * General Public License for more details.
* License for more details.
* *
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with The Inventra Controller Driver for Linux ; if not, * along with this program; if not, write to the Free Software
* write to the Free Software Foundation, Inc., 59 Temple Place, * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* Suite 330, Boston, MA 02111-1307 USA * 02110-1301 USA
* *
* ANY DOWNLOAD, USE, REPRODUCTION, MODIFICATION OR DISTRIBUTION * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
* OF THIS DRIVER INDICATES YOUR COMPLETE AND UNCONDITIONAL ACCEPTANCE * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* OF THOSE TERMS.THIS DRIVER IS PROVIDED "AS IS" AND MENTOR GRAPHICS * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* MAKES NO WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THIS DRIVER. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* OF MERCHANTABILITY; FITNESS FOR A PARTICULAR PURPOSE AND * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* NON-INFRINGEMENT. MENTOR GRAPHICS DOES NOT PROVIDE SUPPORT * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* SERVICES OR UPDATES FOR THIS DRIVER, EVEN IF YOU ARE A MENTOR * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* GRAPHICS SUPPORT CUSTOMER. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
******************************************************************/ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef __MUSB_MUSBDEFS_H__ #ifndef __MUSB_MUSBDEFS_H__
#define __MUSB_MUSBDEFS_H__ #define __MUSB_MUSBDEFS_H__
...@@ -175,7 +176,7 @@ static inline void musb_host_rx(struct musb *m, u8 e) {} ...@@ -175,7 +176,7 @@ static inline void musb_host_rx(struct musb *m, u8 e) {}
#endif #endif
#ifndef MUSB_MAX_END0_PACKET #ifndef MUSB_MAX_END0_PACKET
#define MUSB_MAX_END0_PACKET ((u16)MGC_END0_FIFOSIZE) #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
#endif #endif
/* host side ep0 states */ /* host side ep0 states */
...@@ -219,19 +220,19 @@ enum musb_g_ep0_state { ...@@ -219,19 +220,19 @@ enum musb_g_ep0_state {
/* TUSB mapping: "flat" plus ep0 special cases */ /* TUSB mapping: "flat" plus ep0 special cases */
#if defined(CONFIG_USB_TUSB6010) #if defined(CONFIG_USB_TUSB6010)
#define musb_ep_select(_mbase, _epnum) \ #define musb_ep_select(_mbase, _epnum) \
musb_writeb((_mbase), MGC_O_HDRC_INDEX, (_epnum)) musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define MGC_END_OFFSET MGC_TUSB_OFFSET #define MGC_END_OFFSET MUSB_TUSB_OFFSET
/* "flat" mapping: each endpoint has its own i/o address */ /* "flat" mapping: each endpoint has its own i/o address */
#elif defined(MUSB_FLAT_REG) #elif defined(MUSB_FLAT_REG)
#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)),((void)(_epnum))) #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)),((void)(_epnum)))
#define MGC_END_OFFSET MGC_FLAT_OFFSET #define MGC_END_OFFSET MUSB_FLAT_OFFSET
/* "indexed" mapping: INDEX register controls register bank select */ /* "indexed" mapping: INDEX register controls register bank select */
#else #else
#define musb_ep_select(_mbase, _epnum) \ #define musb_ep_select(_mbase, _epnum) \
musb_writeb((_mbase), MGC_O_HDRC_INDEX, (_epnum)) musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define MGC_END_OFFSET MGC_INDEXED_OFFSET #define MGC_END_OFFSET MUSB_INDEXED_OFFSET
#endif #endif
/****************************** FUNCTIONS ********************************/ /****************************** FUNCTIONS ********************************/
...@@ -242,7 +243,7 @@ enum musb_g_ep0_state { ...@@ -242,7 +243,7 @@ enum musb_g_ep0_state {
{ (_musb)->is_host=FALSE; } { (_musb)->is_host=FALSE; }
#define test_devctl_hst_mode(_x) \ #define test_devctl_hst_mode(_x) \
(musb_readb((_x)->mregs, MGC_O_HDRC_DEVCTL)&MGC_M_DEVCTL_HM) (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
...@@ -382,7 +383,7 @@ struct musb { ...@@ -382,7 +383,7 @@ struct musb {
#define VBUSERR_RETRY_COUNT 3 #define VBUSERR_RETRY_COUNT 3
u16 vbuserr_retry; u16 vbuserr_retry;
u16 wEndMask; u16 epmask;
u8 nr_endpoints; u8 nr_endpoints;
u8 board_mode; /* enum musb_mode */ u8 board_mode; /* enum musb_mode */
......
This diff is collapsed.
This diff is collapsed.
...@@ -59,13 +59,13 @@ static void omap_set_vbus(struct musb *musb, int is_on) ...@@ -59,13 +59,13 @@ static void omap_set_vbus(struct musb *musb, int is_on)
* that must be ignored. * that must be ignored.
*/ */
devctl = musb_readb(musb->mregs, MGC_O_HDRC_DEVCTL); devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
if (is_on) { if (is_on) {
musb->is_active = 1; musb->is_active = 1;
musb->xceiv.default_a = 1; musb->xceiv.default_a = 1;
musb->xceiv.state = OTG_STATE_A_WAIT_VRISE; musb->xceiv.state = OTG_STATE_A_WAIT_VRISE;
devctl |= MGC_M_DEVCTL_SESSION; devctl |= MUSB_DEVCTL_SESSION;
MUSB_HST_MODE(musb); MUSB_HST_MODE(musb);
} else { } else {
...@@ -77,16 +77,16 @@ static void omap_set_vbus(struct musb *musb, int is_on) ...@@ -77,16 +77,16 @@ static void omap_set_vbus(struct musb *musb, int is_on)
musb->xceiv.default_a = 0; musb->xceiv.default_a = 0;
musb->xceiv.state = OTG_STATE_B_IDLE; musb->xceiv.state = OTG_STATE_B_IDLE;
devctl &= ~MGC_M_DEVCTL_SESSION; devctl &= ~MUSB_DEVCTL_SESSION;
MUSB_DEV_MODE(musb); MUSB_DEV_MODE(musb);
} }
musb_writeb(musb->mregs, MGC_O_HDRC_DEVCTL, devctl); musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
DBG(1, "VBUS %s, devctl %02x " DBG(1, "VBUS %s, devctl %02x "
/* otg %3x conf %08x prcm %08x */ "\n", /* otg %3x conf %08x prcm %08x */ "\n",
otg_state_string(musb), otg_state_string(musb),
musb_readb(musb->mregs, MGC_O_HDRC_DEVCTL)); musb_readb(musb->mregs, MUSB_DEVCTL));
} }
static int omap_set_power(struct otg_transceiver *x, unsigned mA) static int omap_set_power(struct otg_transceiver *x, unsigned mA)
{ {
......
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...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
#define LCD_PANEL_BACKLIGHT_GPIO 91 #define LCD_PANEL_BACKLIGHT_GPIO 91
#define LCD_PANEL_ENABLE_GPIO 154 #define LCD_PANEL_ENABLE_GPIO 154
#define LCD_PIXCLOCK_MAX 5400 /* freq 5.4 MHz */ #define LCD_PIXCLOCK_MAX 5400 /* freq 5.4 MHz */
#define PM_RECEIVER TWL4030_MODULE_PM_RECIEVER #define PM_RECEIVER TWL4030_MODULE_PM_RECEIVER
#define ENABLE_VAUX2_DEDICATED 0x09 #define ENABLE_VAUX2_DEDICATED 0x09
#define ENABLE_VAUX2_DEV_GRP 0x20 #define ENABLE_VAUX2_DEV_GRP 0x20
......
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